This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- MAINTAINERS | 18 +++++------ arch/arm/cpu/armv7/start.S | 4 +-- arch/arm/cpu/armv7/{tegra2 => tegra20}/Makefile | 8 ++--- arch/arm/cpu/armv7/{tegra2 => tegra20}/ap20.c | 22 +++++++------- arch/arm/cpu/armv7/{tegra2 => tegra20}/board.c | 18 +++++------ arch/arm/cpu/armv7/{tegra2 => tegra20}/clock.c | 10 +++--- .../cpu/armv7/{tegra2 => tegra20}/cmd_enterrcm.c | 4 +-- arch/arm/cpu/armv7/{tegra2 => tegra20}/config.mk | 2 +- arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.c | 0 arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.h | 0 arch/arm/cpu/armv7/{tegra2 => tegra20}/emc.c | 2 +- arch/arm/cpu/armv7/{tegra2 => tegra20}/funcmux.c | 2 +- .../cpu/armv7/{tegra2 => tegra20}/lowlevel_init.S | 0 arch/arm/cpu/armv7/{tegra2 => tegra20}/pinmux.c | 4 +-- arch/arm/cpu/armv7/{tegra2 => tegra20}/pmu.c | 2 +- arch/arm/cpu/armv7/{tegra2 => tegra20}/sys_info.c | 2 +- arch/arm/cpu/armv7/{tegra2 => tegra20}/timer.c | 2 +- arch/arm/cpu/armv7/{tegra2 => tegra20}/usb.c | 2 +- arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot.c | 18 +++++------ .../cpu/armv7/{tegra2 => tegra20}/warmboot_avp.c | 4 +-- .../cpu/armv7/{tegra2 => tegra20}/warmboot_avp.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/ap20.h | 4 +-- .../asm/{arch-tegra2 => arch-tegra20}/apb_misc.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/board.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/clk_rst.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/clock.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/emc.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/flow.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/funcmux.h | 2 +- .../asm/{arch-tegra2 => arch-tegra20}/fuse.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/gp_padctrl.h | 2 +- .../asm/{arch-tegra2 => arch-tegra20}/gpio.h | 2 +- .../asm/{arch-tegra2 => arch-tegra20}/mmc.h | 8 ++--- .../asm/{arch-tegra2 => arch-tegra20}/pinmux.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/pmc.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/pmu.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/scu.h | 0 .../{arch-tegra2 => arch-tegra20}/sdram_param.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/sys_proto.h | 4 +-- .../tegra2.h => arch-tegra20/tegra20.h} | 18 +++++------ .../asm/{arch-tegra2 => arch-tegra20}/tegra_i2c.h | 2 +- .../asm/{arch-tegra2 => arch-tegra20}/tegra_spi.h | 4 +-- .../asm/{arch-tegra2 => arch-tegra20}/timer.h | 6 ++-- .../uart-spi-switch.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/uart.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/usb.h | 0 .../asm/{arch-tegra2 => arch-tegra20}/warmboot.h | 0 board/avionic-design/common/tamonten.c | 4 +-- .../dts/{tegra2-medcom.dts => tegra20-medcom.dts} | 0 .../dts/{tegra2-plutux.dts => tegra20-plutux.dts} | 0 .../dts/{tegra2-tec.dts => tegra20-tec.dts} | 0 .../dts/{tegra2-paz00.dts => tegra20-paz00.dts} | 0 board/compal/paz00/paz00.c | 6 ++-- ...{tegra2-trimslice.dts => tegra20-trimslice.dts} | 0 board/compulab/trimslice/trimslice.c | 6 ++-- board/nvidia/common/board.c | 12 ++++---- board/nvidia/common/emc.c | 2 +- board/nvidia/common/uart-spi-switch.c | 2 +- .../{tegra2-harmony.dts => tegra20-harmony.dts} | 2 +- .../{tegra2-seaboard.dts => tegra20-seaboard.dts} | 0 .../{tegra2-ventana.dts => tegra20-ventana.dts} | 2 +- .../{tegra2-whistler.dts => tegra20-whistler.dts} | 2 +- board/nvidia/harmony/harmony.c | 6 ++-- board/nvidia/seaboard/seaboard.c | 6 ++-- board/nvidia/whistler/whistler.c | 6 ++-- boards.cfg | 18 +++++------ drivers/gpio/tegra_gpio.c | 12 ++++---- drivers/i2c/tegra_i2c.c | 12 ++++---- drivers/input/Makefile | 2 +- drivers/mmc/tegra_mmc.c | 32 ++++++++++---------- drivers/mmc/tegra_mmc.h | 12 ++++---- drivers/spi/tegra_spi.c | 10 +++--- include/configs/harmony.h | 14 ++++----- include/configs/medcom.h | 12 ++++---- include/configs/paz00.h | 12 ++++---- include/configs/plutux.h | 12 ++++---- include/configs/seaboard.h | 20 ++++++------ include/configs/tec.h | 10 +++--- ...{tegra2-common-post.h => tegra20-common-post.h} | 8 ++--- .../configs/{tegra2-common.h => tegra20-common.h} | 20 ++++++------ include/configs/trimslice.h | 14 ++++----- include/configs/ventana.h | 12 ++++---- include/configs/whistler.h | 14 ++++----- include/fdtdec.h | 12 ++++---- include/serial.h | 2 +- 85 files changed, 246 insertions(+), 246 deletions(-) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/Makefile (87%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/ap20.c (94%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/board.c (90%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/clock.c (99%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/cmd_enterrcm.c (94%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/config.mk (98%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.c (100%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.h (100%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/emc.c (99%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/funcmux.c (99%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/lowlevel_init.S (100%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/pinmux.c (99%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/pmu.c (98%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/sys_info.c (98%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/timer.c (98%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/usb.c (99%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot.c (95%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot_avp.c (98%) rename arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot_avp.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/ap20.h (98%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/apb_misc.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/board.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/clk_rst.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/clock.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/emc.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/flow.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/funcmux.h (97%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/fuse.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/gp_padctrl.h (98%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/gpio.h (99%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/mmc.h (84%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/pinmux.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/pmc.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/pmu.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/scu.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/sdram_param.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/sys_proto.h (93%) rename arch/arm/include/asm/{arch-tegra2/tegra2.h => arch-tegra20/tegra20.h} (87%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/tegra_i2c.h (99%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/tegra_spi.h (96%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/timer.h (92%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/uart-spi-switch.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/uart.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/usb.h (100%) rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/warmboot.h (100%) rename board/avionic-design/dts/{tegra2-medcom.dts => tegra20-medcom.dts} (100%) rename board/avionic-design/dts/{tegra2-plutux.dts => tegra20-plutux.dts} (100%) rename board/avionic-design/dts/{tegra2-tec.dts => tegra20-tec.dts} (100%) rename board/compal/dts/{tegra2-paz00.dts => tegra20-paz00.dts} (100%) rename board/compulab/dts/{tegra2-trimslice.dts => tegra20-trimslice.dts} (100%) rename board/nvidia/dts/{tegra2-harmony.dts => tegra20-harmony.dts} (92%) rename board/nvidia/dts/{tegra2-seaboard.dts => tegra20-seaboard.dts} (100%) rename board/nvidia/dts/{tegra2-ventana.dts => tegra20-ventana.dts} (92%) rename board/nvidia/dts/{tegra2-whistler.dts => tegra20-whistler.dts} (94%) rename include/configs/{tegra2-common-post.h => tegra20-common-post.h} (96%) rename include/configs/{tegra2-common.h => tegra20-common.h} (93%)

diff --git a/MAINTAINERS b/MAINTAINERS index fd0c65c..399ae4c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -811,9 +811,9 @@ Sricharan R r.sricharan@ti.com

Thierry Reding thierry.reding@avionic-design.de

- plutux Tegra2 (ARM7 & A9 Dual Core) - medcom Tegra2 (ARM7 & A9 Dual Core) - tec Tegra2 (ARM7 & A9 Dual Core) + plutux Tegra20 (ARM7 & A9 Dual Core) + medcom Tegra20 (ARM7 & A9 Dual Core) + tec Tegra20 (ARM7 & A9 Dual Core)

Christian Riesch christian.riesch@omicron.at Manfred Rudigier manfred.rudigier@omicron.at @@ -917,16 +917,16 @@ Michael Walle michael@walle.cc

Tom Warren twarren@nvidia.com

- harmony Tegra2 (ARM7 & A9 Dual Core) - seaboard Tegra2 (ARM7 & A9 Dual Core) + harmony Tegra20 (ARM7 & A9 Dual Core) + seaboard Tegra20 (ARM7 & A9 Dual Core)

Tom Warren twarren@nvidia.com Stephen Warren swarren@nvidia.com

- ventana Tegra2 (ARM7 & A9 Dual Core) - paz00 Tegra2 (ARM7 & A9 Dual Core) - trimslice Tegra2 (ARM7 & A9 Dual Core) - whistler Tegra2 (ARM7 & A9 Dual Core) + ventana Tegra20 (ARM7 & A9 Dual Core) + paz00 Tegra20 (ARM7 & A9 Dual Core) + trimslice Tegra20 (ARM7 & A9 Dual Core) + whistler Tegra20 (ARM7 & A9 Dual Core)

Thomas Weber weber@corscience.de

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 22a3ced..6cfdfd2 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -133,7 +133,7 @@ reset: orr r0, r0, #0xd3 msr cpsr,r0

-#if !defined(CONFIG_TEGRA2) +#if !defined(CONFIG_TEGRA20) /* * Setup vector: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. @@ -149,7 +149,7 @@ reset: ldr r0, =_start mcr p15, 0, r0, c12, c0, 0 @Set VBAR #endif -#endif /* !Tegra2 */ +#endif /* !Tegra20 */

/* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT diff --git a/arch/arm/cpu/armv7/tegra2/Makefile b/arch/arm/cpu/armv7/tegra20/Makefile similarity index 87% rename from arch/arm/cpu/armv7/tegra2/Makefile rename to arch/arm/cpu/armv7/tegra20/Makefile index 80da453..da62646 100644 --- a/arch/arm/cpu/armv7/tegra2/Makefile +++ b/arch/arm/cpu/armv7/tegra20/Makefile @@ -25,9 +25,9 @@

# The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. -CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/warmboot_avp.o += -march=armv4t +CFLAGS_arch/arm/cpu/armv7/tegra20/ap20.o += -march=armv4t +CFLAGS_arch/arm/cpu/armv7/tegra20/clock.o += -march=armv4t +CFLAGS_arch/arm/cpu/armv7/tegra20/warmboot_avp.o += -march=armv4t

include $(TOPDIR)/config.mk

@@ -38,7 +38,7 @@ COBJS-y := ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o COBJS-$(CONFIG_TEGRA_PMU) += pmu.o COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o -COBJS-$(CONFIG_TEGRA2_LP0) += crypto.o warmboot.o warmboot_avp.o +COBJS-$(CONFIG_TEGRA20_LP0) += crypto.o warmboot.o warmboot_avp.o COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o

COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra20/ap20.c similarity index 94% rename from arch/arm/cpu/armv7/tegra2/ap20.c rename to arch/arm/cpu/armv7/tegra20/ap20.c index 1aad387..8b6afbc 100644 --- a/arch/arm/cpu/armv7/tegra2/ap20.c +++ b/arch/arm/cpu/armv7/tegra20/ap20.c @@ -22,7 +22,7 @@ */

#include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/ap20.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> @@ -37,7 +37,7 @@ int tegra_get_chip_type(void) { struct apb_misc_gp_ctlr *gp; - struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE; + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA20_FUSE_BASE; uint tegra_sku_id, rev;

/* @@ -45,13 +45,13 @@ int tegra_get_chip_type(void) * APB_MISC + 0x804, and has value 0x20 for Tegra20, 0x30 for * Tegra30 */ - gp = (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + gp = (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE; rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;

tegra_sku_id = readl(&fuse->sku_info) & 0xff;

switch (rev) { - case CHIPID_TEGRA2: + case CHIPID_TEGRA20: switch (tegra_sku_id) { case SKU_ID_T20: return TEGRA_SOC_T20; @@ -144,14 +144,14 @@ static void enable_cpu_clock(int enable)

static int is_cpu_powered(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE;

return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; }

static void remove_cpu_io_clamps(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg;

/* Remove the clamps on the CPU I/O signals */ @@ -165,7 +165,7 @@ static void remove_cpu_io_clamps(void)

static void powerup_cpu(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg; int timeout = IO_STABILIZATION_DELAY;

@@ -196,7 +196,7 @@ static void powerup_cpu(void)

static void enable_cpu_power_rail(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg;

reg = readl(&pmc->pmc_cntrl); @@ -334,7 +334,7 @@ static u32 get_odmdata(void)

void init_pmc_scratch(void) { - struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 odmdata; int i;

@@ -346,13 +346,13 @@ void init_pmc_scratch(void) odmdata = get_odmdata(); writel(odmdata, &pmc->pmc_scratch20);

-#ifdef CONFIG_TEGRA2_LP0 +#ifdef CONFIG_TEGRA20_LP0 /* save Sdram params to PMC 2, 4, and 24 for WB0 */ warmboot_save_sdram_params(); #endif }

-void tegra2_start(void) +void tegra20_start(void) { struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;

diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra20/board.c similarity index 90% rename from arch/arm/cpu/armv7/tegra2/board.c rename to arch/arm/cpu/armv7/tegra20/board.c index 923678d..e595ff9 100644 --- a/arch/arm/cpu/armv7/tegra2/board.c +++ b/arch/arm/cpu/armv7/tegra20/board.c @@ -28,7 +28,7 @@ #include <asm/arch/funcmux.h> #include <asm/arch/pmc.h> #include <asm/arch/sys_proto.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -47,7 +47,7 @@ enum {

unsigned int query_sdram_size(void) { - struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg;

reg = readl(&pmc->pmc_scratch20); @@ -89,7 +89,7 @@ int checkboard(void) int arch_cpu_init(void) { /* Fire up the Cortex A9 */ - tegra2_start(); + tegra20_start();

/* We didn't do this init in start.S, so do it now */ cpu_init_cp15(); @@ -102,11 +102,11 @@ int arch_cpu_init(void) #endif

static int uart_configs[] = { -#if defined(CONFIG_TEGRA2_UARTA_UAA_UAB) +#if defined(CONFIG_TEGRA20_UARTA_UAA_UAB) FUNCMUX_UART1_UAA_UAB, -#elif defined(CONFIG_TEGRA2_UARTA_GPU) +#elif defined(CONFIG_TEGRA20_UARTA_GPU) FUNCMUX_UART1_GPU, -#elif defined(CONFIG_TEGRA2_UARTA_SDIO1) +#elif defined(CONFIG_TEGRA20_UARTA_SDIO1) FUNCMUX_UART1_SDIO1, #else FUNCMUX_UART1_IRRX_IRTX, @@ -146,13 +146,13 @@ void board_init_uart_f(void) { int uart_ids = 0; /* bit mask of which UART ids to enable */

-#ifdef CONFIG_TEGRA2_ENABLE_UARTA +#ifdef CONFIG_TEGRA20_ENABLE_UARTA uart_ids |= UARTA; #endif -#ifdef CONFIG_TEGRA2_ENABLE_UARTB +#ifdef CONFIG_TEGRA20_ENABLE_UARTB uart_ids |= UARTB; #endif -#ifdef CONFIG_TEGRA2_ENABLE_UARTD +#ifdef CONFIG_TEGRA20_ENABLE_UARTD uart_ids |= UARTD; #endif setup_uarts(uart_ids); diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra20/clock.c similarity index 99% rename from arch/arm/cpu/armv7/tegra2/clock.c rename to arch/arm/cpu/armv7/tegra20/clock.c index 602589c..2403874 100644 --- a/arch/arm/cpu/armv7/tegra2/clock.c +++ b/arch/arm/cpu/armv7/tegra20/clock.c @@ -19,13 +19,13 @@ * MA 02111-1307 USA */

-/* Tegra2 Clock control functions */ +/* Tegra20 Clock control functions */

#include <asm/io.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/timer.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <common.h> #include <div64.h> #include <fdtdec.h> @@ -49,7 +49,7 @@ static unsigned osc_freq[CLOCK_OSC_FREQ_COUNT] = { };

/* - * Clock types that we can use as a source. The Tegra2 has muxes for the + * Clock types that we can use as a source. The Tegra20 has muxes for the * peripheral clocks, and in most cases there are four options for the clock * source. This gives us a clock 'type' and exploits what commonality exists * in the device. @@ -848,7 +848,7 @@ void reset_cmplx_set_enable(int cpu, int which, int reset) (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; u32 mask;

- /* Form the mask, which depends on the cpu chosen. Tegra2 has 2 */ + /* Form the mask, which depends on the cpu chosen. Tegra20 has 2 */ assert(cpu >= 0 && cpu < 2); mask = which << cpu;

@@ -976,7 +976,7 @@ void clock_ll_start_uart(enum periph_id periph_id) * the same but we are very cautious so we check that a valid clock ID is * provided. * - * @param clk_id Clock ID according to tegra2 device tree binding + * @param clk_id Clock ID according to tegra20 device tree binding * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid */ static enum periph_id clk_id_to_periph_id(int clk_id) diff --git a/arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c b/arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c similarity index 94% rename from arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c rename to arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c index 2fcd107..75cadb0 100644 --- a/arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c +++ b/arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c @@ -40,13 +40,13 @@ */

#include <common.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/pmc.h>

static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE;

puts("Entering RCM...\n"); udelay(50000); diff --git a/arch/arm/cpu/armv7/tegra2/config.mk b/arch/arm/cpu/armv7/tegra20/config.mk similarity index 98% rename from arch/arm/cpu/armv7/tegra2/config.mk rename to arch/arm/cpu/armv7/tegra20/config.mk index 4dd8cb8..714daaf 100644 --- a/arch/arm/cpu/armv7/tegra2/config.mk +++ b/arch/arm/cpu/armv7/tegra20/config.mk @@ -26,7 +26,7 @@

# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build these # files with compatible flags -ifdef CONFIG_TEGRA2 +ifdef CONFIG_TEGRA20 CFLAGS_arch/arm/lib/board.o += -march=armv4t CFLAGS_arch/arm/lib/memset.o += -march=armv4t CFLAGS_lib/string.o += -march=armv4t diff --git a/arch/arm/cpu/armv7/tegra2/crypto.c b/arch/arm/cpu/armv7/tegra20/crypto.c similarity index 100% rename from arch/arm/cpu/armv7/tegra2/crypto.c rename to arch/arm/cpu/armv7/tegra20/crypto.c diff --git a/arch/arm/cpu/armv7/tegra2/crypto.h b/arch/arm/cpu/armv7/tegra20/crypto.h similarity index 100% rename from arch/arm/cpu/armv7/tegra2/crypto.h rename to arch/arm/cpu/armv7/tegra20/crypto.h diff --git a/arch/arm/cpu/armv7/tegra2/emc.c b/arch/arm/cpu/armv7/tegra20/emc.c similarity index 99% rename from arch/arm/cpu/armv7/tegra2/emc.c rename to arch/arm/cpu/armv7/tegra20/emc.c index c0e5c56..ffc05e4 100644 --- a/arch/arm/cpu/armv7/tegra2/emc.c +++ b/arch/arm/cpu/armv7/tegra20/emc.c @@ -27,7 +27,7 @@ #include <asm/arch/apb_misc.h> #include <asm/arch/clock.h> #include <asm/arch/emc.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h>

/* * The EMC registers have shadow registers. When the EMC clock is updated diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra20/funcmux.c similarity index 99% rename from arch/arm/cpu/armv7/tegra2/funcmux.c rename to arch/arm/cpu/armv7/tegra20/funcmux.c index 4a31a4c..8cfed64 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra20/funcmux.c @@ -19,7 +19,7 @@ * MA 02111-1307 USA */

-/* Tegra2 high-level function multiplexing */ +/* Tegra20 high-level function multiplexing */ #include <common.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra20/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/armv7/tegra2/lowlevel_init.S rename to arch/arm/cpu/armv7/tegra20/lowlevel_init.S diff --git a/arch/arm/cpu/armv7/tegra2/pinmux.c b/arch/arm/cpu/armv7/tegra20/pinmux.c similarity index 99% rename from arch/arm/cpu/armv7/tegra2/pinmux.c rename to arch/arm/cpu/armv7/tegra20/pinmux.c index b053f90..70e84df 100644 --- a/arch/arm/cpu/armv7/tegra2/pinmux.c +++ b/arch/arm/cpu/armv7/tegra20/pinmux.c @@ -19,10 +19,10 @@ * MA 02111-1307 USA */

-/* Tegra2 pin multiplexing functions */ +/* Tegra20 pin multiplexing functions */

#include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/pinmux.h> #include <common.h>

diff --git a/arch/arm/cpu/armv7/tegra2/pmu.c b/arch/arm/cpu/armv7/tegra20/pmu.c similarity index 98% rename from arch/arm/cpu/armv7/tegra2/pmu.c rename to arch/arm/cpu/armv7/tegra20/pmu.c index 4673802..53505e9 100644 --- a/arch/arm/cpu/armv7/tegra2/pmu.c +++ b/arch/arm/cpu/armv7/tegra20/pmu.c @@ -25,7 +25,7 @@ #include <tps6586x.h> #include <asm/io.h> #include <asm/arch/ap20.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/tegra_i2c.h> #include <asm/arch/sys_proto.h>

diff --git a/arch/arm/cpu/armv7/tegra2/sys_info.c b/arch/arm/cpu/armv7/tegra20/sys_info.c similarity index 98% rename from arch/arm/cpu/armv7/tegra2/sys_info.c rename to arch/arm/cpu/armv7/tegra20/sys_info.c index 6d11dc1..1a0bb56 100644 --- a/arch/arm/cpu/armv7/tegra2/sys_info.c +++ b/arch/arm/cpu/armv7/tegra20/sys_info.c @@ -27,7 +27,7 @@ /* Print CPU information */ int print_cpuinfo(void) { - puts("TEGRA2\n"); + puts("TEGRA20\n");

/* TBD: Add printf of major/minor rev info, stepping, etc. */ return 0; diff --git a/arch/arm/cpu/armv7/tegra2/timer.c b/arch/arm/cpu/armv7/tegra20/timer.c similarity index 98% rename from arch/arm/cpu/armv7/tegra2/timer.c rename to arch/arm/cpu/armv7/tegra20/timer.c index b12b12c..562e414 100644 --- a/arch/arm/cpu/armv7/tegra2/timer.c +++ b/arch/arm/cpu/armv7/tegra20/timer.c @@ -37,7 +37,7 @@

#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/timer.h>

DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/cpu/armv7/tegra2/usb.c b/arch/arm/cpu/armv7/tegra20/usb.c similarity index 99% rename from arch/arm/cpu/armv7/tegra2/usb.c rename to arch/arm/cpu/armv7/tegra20/usb.c index 5f2b243..178bb13 100644 --- a/arch/arm/cpu/armv7/tegra2/usb.c +++ b/arch/arm/cpu/armv7/tegra20/usb.c @@ -24,7 +24,7 @@ #include <common.h> #include <asm/io.h> #include <asm-generic/gpio.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/gpio.h> diff --git a/arch/arm/cpu/armv7/tegra2/warmboot.c b/arch/arm/cpu/armv7/tegra20/warmboot.c similarity index 95% rename from arch/arm/cpu/armv7/tegra2/warmboot.c rename to arch/arm/cpu/armv7/tegra20/warmboot.c index 25d8968..809ea01 100644 --- a/arch/arm/cpu/armv7/tegra2/warmboot.c +++ b/arch/arm/cpu/armv7/tegra20/warmboot.c @@ -29,7 +29,7 @@ #include <asm/arch/clock.h> #include <asm/arch/pmc.h> #include <asm/arch/pinmux.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/fuse.h> #include <asm/arch/emc.h> #include <asm/arch/gp_padctrl.h> @@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;

#ifndef CONFIG_TEGRA_CLOCK_SCALING -#error "You must enable CONFIG_TEGRA_CLOCK_SCALING to use CONFIG_TEGRA2_LP0" +#error "You must enable CONFIG_TEGRA_CLOCK_SCALING to use CONFIG_TEGRA20_LP0" #endif

/* @@ -139,9 +139,9 @@ int warmboot_save_sdram_params(void) u32 ram_code; struct sdram_params sdram; struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; struct apb_misc_gp_ctlr *gp = - (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE; struct emc_ctlr *emc = emc_get_controller(gd->fdt_blob); union scratch2_reg scratch2; union scratch4_reg scratch4; @@ -205,7 +205,7 @@ static u32 get_major_version(void) { u32 major_id; struct apb_misc_gp_ctlr *gp = - (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE;

major_id = (readl(&gp->hidrev) & HIDREV_MAJORPREV_MASK) >> HIDREV_MAJORPREV_SHIFT; @@ -229,7 +229,7 @@ static int is_failure_analysis_mode(struct fuse_regs *fuse)

static int ap20_is_odm_production_mode(void) { - struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE; + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA20_FUSE_BASE;

if (!is_failure_analysis_mode(fuse) && is_odm_production_mode_fuse_set(fuse)) @@ -240,7 +240,7 @@ static int ap20_is_odm_production_mode(void)

static int ap20_is_production_mode(void) { - struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE; + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA20_FUSE_BASE;

if (get_major_version() == 0) return 1; @@ -257,11 +257,11 @@ static enum fuse_operating_mode fuse_get_operation_mode(void) { u32 chip_id; struct apb_misc_gp_ctlr *gp = - (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE;

chip_id = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT; - if (chip_id == CHIPID_TEGRA2) { + if (chip_id == CHIPID_TEGRA20) { if (ap20_is_odm_production_mode()) { printf("!! odm_production_mode is not supported !!\n"); return MODE_UNDEFINED; diff --git a/arch/arm/cpu/armv7/tegra2/warmboot_avp.c b/arch/arm/cpu/armv7/tegra20/warmboot_avp.c similarity index 98% rename from arch/arm/cpu/armv7/tegra2/warmboot_avp.c rename to arch/arm/cpu/armv7/tegra20/warmboot_avp.c index 70bcd8e..cd01908 100644 --- a/arch/arm/cpu/armv7/tegra2/warmboot_avp.c +++ b/arch/arm/cpu/armv7/tegra20/warmboot_avp.c @@ -29,7 +29,7 @@ #include <asm/arch/flow.h> #include <asm/arch/pinmux.h> #include <asm/arch/pmc.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/warmboot.h> #include "warmboot_avp.h"

@@ -38,7 +38,7 @@ void wb_start(void) { struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; diff --git a/arch/arm/cpu/armv7/tegra2/warmboot_avp.h b/arch/arm/cpu/armv7/tegra20/warmboot_avp.h similarity index 100% rename from arch/arm/cpu/armv7/tegra2/warmboot_avp.h rename to arch/arm/cpu/armv7/tegra20/warmboot_avp.h diff --git a/arch/arm/include/asm/arch-tegra2/ap20.h b/arch/arm/include/asm/arch-tegra20/ap20.h similarity index 98% rename from arch/arm/include/asm/arch-tegra2/ap20.h rename to arch/arm/include/asm/arch-tegra20/ap20.h index d222c44..c84d22f 100644 --- a/arch/arm/include/asm/arch-tegra2/ap20.h +++ b/arch/arm/include/asm/arch-tegra20/ap20.h @@ -95,8 +95,8 @@ #define HALT_COP_EVENT_IRQ_1 (1 << 11) #define HALT_COP_EVENT_FIQ_1 (1 << 9)

-/* Start up the tegra2 SOC */ -void tegra2_start(void); +/* Start up the tegra20 SOC */ +void tegra20_start(void);

/* This is the main entry into U-Boot, used by the Cortex-A9 */ extern void _start(void); diff --git a/arch/arm/include/asm/arch-tegra2/apb_misc.h b/arch/arm/include/asm/arch-tegra20/apb_misc.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/apb_misc.h rename to arch/arm/include/asm/arch-tegra20/apb_misc.h diff --git a/arch/arm/include/asm/arch-tegra2/board.h b/arch/arm/include/asm/arch-tegra20/board.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/board.h rename to arch/arm/include/asm/arch-tegra20/board.h diff --git a/arch/arm/include/asm/arch-tegra2/clk_rst.h b/arch/arm/include/asm/arch-tegra20/clk_rst.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/clk_rst.h rename to arch/arm/include/asm/arch-tegra20/clk_rst.h diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra20/clock.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/clock.h rename to arch/arm/include/asm/arch-tegra20/clock.h diff --git a/arch/arm/include/asm/arch-tegra2/emc.h b/arch/arm/include/asm/arch-tegra20/emc.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/emc.h rename to arch/arm/include/asm/arch-tegra20/emc.h diff --git a/arch/arm/include/asm/arch-tegra2/flow.h b/arch/arm/include/asm/arch-tegra20/flow.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/flow.h rename to arch/arm/include/asm/arch-tegra20/flow.h diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h b/arch/arm/include/asm/arch-tegra20/funcmux.h similarity index 97% rename from arch/arm/include/asm/arch-tegra2/funcmux.h rename to arch/arm/include/asm/arch-tegra20/funcmux.h index dcd512f..258f7b6 100644 --- a/arch/arm/include/asm/arch-tegra2/funcmux.h +++ b/arch/arm/include/asm/arch-tegra20/funcmux.h @@ -19,7 +19,7 @@ * MA 02111-1307 USA */

-/* Tegra2 high-level function multiplexing */ +/* Tegra20 high-level function multiplexing */

#ifndef __FUNCMUX_H #define __FUNCMUX_H diff --git a/arch/arm/include/asm/arch-tegra2/fuse.h b/arch/arm/include/asm/arch-tegra20/fuse.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/fuse.h rename to arch/arm/include/asm/arch-tegra20/fuse.h diff --git a/arch/arm/include/asm/arch-tegra2/gp_padctrl.h b/arch/arm/include/asm/arch-tegra20/gp_padctrl.h similarity index 98% rename from arch/arm/include/asm/arch-tegra2/gp_padctrl.h rename to arch/arm/include/asm/arch-tegra20/gp_padctrl.h index 1755ab2..865af5b 100644 --- a/arch/arm/include/asm/arch-tegra2/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra20/gp_padctrl.h @@ -68,6 +68,6 @@ struct apb_misc_gp_ctlr { #define HIDREV_MAJORPREV_MASK (0xf << HIDREV_MAJORPREV_SHIFT)

/* CHIPID field returned from APB_MISC_GP_HIDREV register */ -#define CHIPID_TEGRA2 0x20 +#define CHIPID_TEGRA20 0x20

#endif diff --git a/arch/arm/include/asm/arch-tegra2/gpio.h b/arch/arm/include/asm/arch-tegra20/gpio.h similarity index 99% rename from arch/arm/include/asm/arch-tegra2/gpio.h rename to arch/arm/include/asm/arch-tegra20/gpio.h index 40ddb02..06be4c2 100644 --- a/arch/arm/include/asm/arch-tegra2/gpio.h +++ b/arch/arm/include/asm/arch-tegra20/gpio.h @@ -281,7 +281,7 @@ enum gpio_pin { };

/* - * Tegra2-specific GPIO API + * Tegra20-specific GPIO API */

void gpio_info(void); diff --git a/arch/arm/include/asm/arch-tegra2/mmc.h b/arch/arm/include/asm/arch-tegra20/mmc.h similarity index 84% rename from arch/arm/include/asm/arch-tegra2/mmc.h rename to arch/arm/include/asm/arch-tegra20/mmc.h index c1f12db..916a353 100644 --- a/arch/arm/include/asm/arch-tegra2/mmc.h +++ b/arch/arm/include/asm/arch-tegra20/mmc.h @@ -19,9 +19,9 @@ * MA 02111-1307 USA */

-#ifndef _TEGRA2_MMC_H_ -#define _TEGRA2_MMC_H_ +#ifndef _TEGRA20_MMC_H_ +#define _TEGRA20_MMC_H_

-int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio); +int tegra20_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio);

-#endif /* TEGRA2_MMC_H_ */ +#endif /* TEGRA20_MMC_H_ */ diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h b/arch/arm/include/asm/arch-tegra20/pinmux.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/pinmux.h rename to arch/arm/include/asm/arch-tegra20/pinmux.h diff --git a/arch/arm/include/asm/arch-tegra2/pmc.h b/arch/arm/include/asm/arch-tegra20/pmc.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/pmc.h rename to arch/arm/include/asm/arch-tegra20/pmc.h diff --git a/arch/arm/include/asm/arch-tegra2/pmu.h b/arch/arm/include/asm/arch-tegra20/pmu.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/pmu.h rename to arch/arm/include/asm/arch-tegra20/pmu.h diff --git a/arch/arm/include/asm/arch-tegra2/scu.h b/arch/arm/include/asm/arch-tegra20/scu.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/scu.h rename to arch/arm/include/asm/arch-tegra20/scu.h diff --git a/arch/arm/include/asm/arch-tegra2/sdram_param.h b/arch/arm/include/asm/arch-tegra20/sdram_param.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/sdram_param.h rename to arch/arm/include/asm/arch-tegra20/sdram_param.h diff --git a/arch/arm/include/asm/arch-tegra2/sys_proto.h b/arch/arm/include/asm/arch-tegra20/sys_proto.h similarity index 93% rename from arch/arm/include/asm/arch-tegra2/sys_proto.h rename to arch/arm/include/asm/arch-tegra20/sys_proto.h index c11534e..643d542 100644 --- a/arch/arm/include/asm/arch-tegra2/sys_proto.h +++ b/arch/arm/include/asm/arch-tegra20/sys_proto.h @@ -24,12 +24,12 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_

-struct tegra2_sysinfo { +struct tegra20_sysinfo { char *board_string; };

void invalidate_dcache(void);

-extern const struct tegra2_sysinfo sysinfo; +extern const struct tegra20_sysinfo sysinfo;

#endif diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h b/arch/arm/include/asm/arch-tegra20/tegra20.h similarity index 87% rename from arch/arm/include/asm/arch-tegra2/tegra2.h rename to arch/arm/include/asm/arch-tegra20/tegra20.h index 13d68c0..6750754 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2.h +++ b/arch/arm/include/asm/arch-tegra20/tegra20.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */

-#ifndef _TEGRA2_H_ -#define _TEGRA2_H_ +#ifndef _TEGRA20_H_ +#define _TEGRA20_H_

#define NV_PA_SDRAM_BASE 0x00000000 #define NV_PA_ARM_PERIPHBASE 0x50040000 @@ -33,21 +33,21 @@ #define NV_PA_GPIO_BASE 0x6000D000 #define NV_PA_EVP_BASE 0x6000F000 #define NV_PA_APB_MISC_BASE 0x70000000 -#define TEGRA2_APB_MISC_GP_BASE (NV_PA_APB_MISC_BASE + 0x0800) +#define TEGRA20_APB_MISC_GP_BASE (NV_PA_APB_MISC_BASE + 0x0800) #define NV_PA_APB_UARTA_BASE (NV_PA_APB_MISC_BASE + 0x6000) #define NV_PA_APB_UARTB_BASE (NV_PA_APB_MISC_BASE + 0x6040) #define NV_PA_APB_UARTC_BASE (NV_PA_APB_MISC_BASE + 0x6200) #define NV_PA_APB_UARTD_BASE (NV_PA_APB_MISC_BASE + 0x6300) #define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400) -#define TEGRA2_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380) -#define TEGRA2_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) -#define TEGRA2_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) +#define TEGRA20_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380) +#define TEGRA20_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) +#define TEGRA20_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) #define NV_PA_CSITE_BASE 0x70040000 #define TEGRA_USB1_BASE 0xC5000000 #define TEGRA_USB3_BASE 0xC5008000 #define TEGRA_USB_ADDR_MASK 0xFFFFC000

-#define TEGRA2_SDRC_CS0 NV_PA_SDRAM_BASE +#define TEGRA20_SDRC_CS0 NV_PA_SDRAM_BASE #define LOW_LEVEL_SRAM_STACK 0x4000FFFC #define EARLY_AVP_STACK (NV_PA_SDRAM_BASE + 0x20000) #define EARLY_CPU_STACK (EARLY_AVP_STACK - 4096) @@ -85,7 +85,7 @@ enum { };

#else /* __ASSEMBLY__ */ -#define PRM_RSTCTRL TEGRA2_PMC_BASE +#define PRM_RSTCTRL TEGRA20_PMC_BASE #endif

-#endif /* TEGRA2_H */ +#endif /* TEGRA20_H */ diff --git a/arch/arm/include/asm/arch-tegra2/tegra_i2c.h b/arch/arm/include/asm/arch-tegra20/tegra_i2c.h similarity index 99% rename from arch/arm/include/asm/arch-tegra2/tegra_i2c.h rename to arch/arm/include/asm/arch-tegra20/tegra_i2c.h index cfb136c..6abfe4e 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra20/tegra_i2c.h @@ -1,5 +1,5 @@ /* - * NVIDIA Tegra2 I2C controller + * NVIDIA Tegra20 I2C controller * * Copyright 2010-2011 NVIDIA Corporation * diff --git a/arch/arm/include/asm/arch-tegra2/tegra_spi.h b/arch/arm/include/asm/arch-tegra20/tegra_spi.h similarity index 96% rename from arch/arm/include/asm/arch-tegra2/tegra_spi.h rename to arch/arm/include/asm/arch-tegra20/tegra_spi.h index 892d90c..8978bea 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra_spi.h +++ b/arch/arm/include/asm/arch-tegra20/tegra_spi.h @@ -1,5 +1,5 @@ /* - * NVIDIA Tegra2 SPI-FLASH controller + * NVIDIA Tegra20 SPI-FLASH controller * * Copyright 2010-2012 NVIDIA Corporation * @@ -70,6 +70,6 @@ struct spi_tegra { #define SPI_STAT_CUR_BLKCNT (1 << 15)

#define SPI_TIMEOUT 1000 -#define TEGRA2_SPI_MAX_FREQ 52000000 +#define TEGRA20_SPI_MAX_FREQ 52000000

#endif /* _TEGRA_SPI_H_ */ diff --git a/arch/arm/include/asm/arch-tegra2/timer.h b/arch/arm/include/asm/arch-tegra20/timer.h similarity index 92% rename from arch/arm/include/asm/arch-tegra2/timer.h rename to arch/arm/include/asm/arch-tegra20/timer.h index adefa2c..43f7ab4 100644 --- a/arch/arm/include/asm/arch-tegra2/timer.h +++ b/arch/arm/include/asm/arch-tegra20/timer.h @@ -19,10 +19,10 @@ * MA 02111-1307 USA */

-/* Tegra2 timer functions */ +/* Tegra20 timer functions */

-#ifndef _TEGRA2_TIMER_H -#define _TEGRA2_TIMER_H +#ifndef _TEGRA20_TIMER_H +#define _TEGRA20_TIMER_H

/* returns the current monotonic timer value in microseconds */ unsigned long timer_get_us(void); diff --git a/arch/arm/include/asm/arch-tegra2/uart-spi-switch.h b/arch/arm/include/asm/arch-tegra20/uart-spi-switch.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/uart-spi-switch.h rename to arch/arm/include/asm/arch-tegra20/uart-spi-switch.h diff --git a/arch/arm/include/asm/arch-tegra2/uart.h b/arch/arm/include/asm/arch-tegra20/uart.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/uart.h rename to arch/arm/include/asm/arch-tegra20/uart.h diff --git a/arch/arm/include/asm/arch-tegra2/usb.h b/arch/arm/include/asm/arch-tegra20/usb.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/usb.h rename to arch/arm/include/asm/arch-tegra20/usb.h diff --git a/arch/arm/include/asm/arch-tegra2/warmboot.h b/arch/arm/include/asm/arch-tegra20/warmboot.h similarity index 100% rename from arch/arm/include/asm/arch-tegra2/warmboot.h rename to arch/arm/include/asm/arch-tegra20/warmboot.h diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c index 2c14462..a0a4d1d 100644 --- a/board/avionic-design/common/tamonten.c +++ b/board/avionic-design/common/tamonten.c @@ -28,7 +28,7 @@ #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/board.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/sys_proto.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> @@ -78,7 +78,7 @@ int board_mmc_init(bd_t *bd) pin_mux_mmc();

/* init dev 0, SD slot, with 4-bit bus */ - tegra2_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); + tegra20_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);

return 0; } diff --git a/board/avionic-design/dts/tegra2-medcom.dts b/board/avionic-design/dts/tegra20-medcom.dts similarity index 100% rename from board/avionic-design/dts/tegra2-medcom.dts rename to board/avionic-design/dts/tegra20-medcom.dts diff --git a/board/avionic-design/dts/tegra2-plutux.dts b/board/avionic-design/dts/tegra20-plutux.dts similarity index 100% rename from board/avionic-design/dts/tegra2-plutux.dts rename to board/avionic-design/dts/tegra20-plutux.dts diff --git a/board/avionic-design/dts/tegra2-tec.dts b/board/avionic-design/dts/tegra20-tec.dts similarity index 100% rename from board/avionic-design/dts/tegra2-tec.dts rename to board/avionic-design/dts/tegra20-tec.dts diff --git a/board/compal/dts/tegra2-paz00.dts b/board/compal/dts/tegra20-paz00.dts similarity index 100% rename from board/compal/dts/tegra2-paz00.dts rename to board/compal/dts/tegra20-paz00.dts diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index ec67874..cd684f2 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -16,7 +16,7 @@

#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/pinmux.h> #include <asm/arch/mmc.h> #include <asm/gpio.h> @@ -70,11 +70,11 @@ int board_mmc_init(bd_t *bd) debug("board_mmc_init: init eMMC\n"); /* init dev 0, eMMC chip, with 4-bit bus */ /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra2_mmc_init(0, 4, -1, -1); + tegra20_mmc_init(0, 4, -1, -1);

debug("board_mmc_init: init SD slot\n"); /* init dev 3, SD slot, with 4-bit bus */ - tegra2_mmc_init(3, 4, GPIO_PV1, GPIO_PV5); + tegra20_mmc_init(3, 4, GPIO_PV1, GPIO_PV5);

return 0; } diff --git a/board/compulab/dts/tegra2-trimslice.dts b/board/compulab/dts/tegra20-trimslice.dts similarity index 100% rename from board/compulab/dts/tegra2-trimslice.dts rename to board/compulab/dts/tegra20-trimslice.dts diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c index 1ac15f8..5dae15b 100644 --- a/board/compulab/trimslice/trimslice.c +++ b/board/compulab/trimslice/trimslice.c @@ -24,7 +24,7 @@ #include <common.h> #include <i2c.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> @@ -69,10 +69,10 @@ int board_mmc_init(bd_t *bd) pin_mux_mmc();

/* init dev 0 (SDMMC4), (micro-SD slot) with 4-bit bus */ - tegra2_mmc_init(0, 4, -1, GPIO_PP1); + tegra20_mmc_init(0, 4, -1, GPIO_PP1);

/* init dev 3 (SDMMC1), (SD slot) with 4-bit bus */ - tegra2_mmc_init(3, 4, -1, -1); + tegra20_mmc_init(3, 4, -1, -1);

return 0; } diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index e65fc9e..d1a7f3a 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -25,7 +25,7 @@ #include <ns16550.h> #include <linux/compiler.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/sys_proto.h>

#include <asm/arch/board.h> @@ -45,8 +45,8 @@

DECLARE_GLOBAL_DATA_PTR;

-const struct tegra2_sysinfo sysinfo = { - CONFIG_TEGRA2_BOARD_STRING +const struct tegra20_sysinfo sysinfo = { + CONFIG_TEGRA20_BOARD_STRING };

/* @@ -76,8 +76,8 @@ void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi"))); */ static void power_det_init(void) { -#if defined(CONFIG_TEGRA2) - struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; +#if defined(CONFIG_TEGRA20) + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE;

/* turn off power detects */ writel(0, &pmc->pmc_pwr_det_latch); @@ -130,7 +130,7 @@ int board_init(void) board_usb_init(gd->fdt_blob); #endif

-#ifdef CONFIG_TEGRA2_LP0 +#ifdef CONFIG_TEGRA20_LP0 /* prepare the WB code to LP0 location */ warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); #endif diff --git a/board/nvidia/common/emc.c b/board/nvidia/common/emc.c index 8e4290c..739d4bd 100644 --- a/board/nvidia/common/emc.c +++ b/board/nvidia/common/emc.c @@ -28,7 +28,7 @@ #include <asm/arch/emc.h> #include <asm/arch/pmu.h> #include <asm/arch/sys_proto.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h>

DECLARE_GLOBAL_DATA_PTR;

diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c index 307937a..6b21758 100644 --- a/board/nvidia/common/uart-spi-switch.c +++ b/board/nvidia/common/uart-spi-switch.c @@ -24,7 +24,7 @@ #include <asm/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch/uart-spi-switch.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/tegra_spi.h>

diff --git a/board/nvidia/dts/tegra2-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts similarity index 92% rename from board/nvidia/dts/tegra2-harmony.dts rename to board/nvidia/dts/tegra20-harmony.dts index 4f60a05..c351954 100644 --- a/board/nvidia/dts/tegra2-harmony.dts +++ b/board/nvidia/dts/tegra20-harmony.dts @@ -3,7 +3,7 @@ /include/ ARCH_CPU_DTS

/ { - model = "NVIDIA Tegra2 Harmony evaluation board"; + model = "NVIDIA Tegra20 Harmony evaluation board"; compatible = "nvidia,harmony", "nvidia,tegra20";

aliases { diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts similarity index 100% rename from board/nvidia/dts/tegra2-seaboard.dts rename to board/nvidia/dts/tegra20-seaboard.dts diff --git a/board/nvidia/dts/tegra2-ventana.dts b/board/nvidia/dts/tegra20-ventana.dts similarity index 92% rename from board/nvidia/dts/tegra2-ventana.dts rename to board/nvidia/dts/tegra20-ventana.dts index 900e871..38b7b13 100644 --- a/board/nvidia/dts/tegra2-ventana.dts +++ b/board/nvidia/dts/tegra20-ventana.dts @@ -3,7 +3,7 @@ /include/ ARCH_CPU_DTS

/ { - model = "NVIDIA Tegra2 Ventana evaluation board"; + model = "NVIDIA Tegra20 Ventana evaluation board"; compatible = "nvidia,ventana", "nvidia,tegra20";

aliases { diff --git a/board/nvidia/dts/tegra2-whistler.dts b/board/nvidia/dts/tegra20-whistler.dts similarity index 94% rename from board/nvidia/dts/tegra2-whistler.dts rename to board/nvidia/dts/tegra20-whistler.dts index b22d407..38599bd 100644 --- a/board/nvidia/dts/tegra2-whistler.dts +++ b/board/nvidia/dts/tegra20-whistler.dts @@ -3,7 +3,7 @@ /include/ ARCH_CPU_DTS

/ { - model = "NVIDIA Tegra2 Whistler evaluation board"; + model = "NVIDIA Tegra20 Whistler evaluation board"; compatible = "nvidia,whistler", "nvidia,tegra20";

aliases { diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index f27ad37..44977c7 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -23,7 +23,7 @@

#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> @@ -73,11 +73,11 @@ int board_mmc_init(bd_t *bd) debug("board_mmc_init: init SD slot J26\n"); /* init dev 0, SD slot J26, with 4-bit bus */ /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra2_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); + tegra20_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);

debug("board_mmc_init: init SD slot J5\n"); /* init dev 2, SD slot J5, with 4-bit bus */ - tegra2_mmc_init(2, 4, GPIO_PT3, GPIO_PI5); + tegra20_mmc_init(2, 4, GPIO_PT3, GPIO_PI5);

return 0; } diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 36039c4..3298a6b 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -23,7 +23,7 @@

#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> @@ -81,11 +81,11 @@ int board_mmc_init(bd_t *bd) debug("board_mmc_init: init eMMC\n"); /* init dev 0, eMMC chip, with 4-bit bus */ /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra2_mmc_init(0, 4, -1, -1); + tegra20_mmc_init(0, 4, -1, -1);

debug("board_mmc_init: init SD slot\n"); /* init dev 1, SD slot, with 4-bit bus */ - tegra2_mmc_init(1, 4, GPIO_PI6, GPIO_PI5); + tegra20_mmc_init(1, 4, GPIO_PI6, GPIO_PI5);

return 0; } diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c index 3ec24df..c0a114d 100644 --- a/board/nvidia/whistler/whistler.c +++ b/board/nvidia/whistler/whistler.c @@ -24,7 +24,7 @@ #include <common.h> #include <i2c.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> @@ -81,10 +81,10 @@ int board_mmc_init(bd_t *bd) pin_mux_mmc();

/* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */ - tegra2_mmc_init(0, 8, -1, -1); + tegra20_mmc_init(0, 8, -1, -1);

/* init dev 1 (SDMMC3), (J40 "SDIO3") with 8-bit bus */ - tegra2_mmc_init(1, 8, -1, -1); + tegra20_mmc_init(1, 8, -1, -1);

return 0; } diff --git a/boards.cfg b/boards.cfg index 2d36d83..70507ad 100644 --- a/boards.cfg +++ b/boards.cfg @@ -251,10 +251,10 @@ s5pc210_universal arm armv7 universal_c210 samsung smdk5250 arm armv7 smdk5250 samsung exynos smdkv310 arm armv7 smdkv310 samsung exynos trats arm armv7 trats samsung exynos -harmony arm armv7 harmony nvidia tegra2 -seaboard arm armv7 seaboard nvidia tegra2 -ventana arm armv7 ventana nvidia tegra2 -whistler arm armv7 whistler nvidia tegra2 +harmony arm armv7 harmony nvidia tegra20 +seaboard arm armv7 seaboard nvidia tegra20 +ventana arm armv7 ventana nvidia tegra20 +whistler arm armv7 whistler nvidia tegra20 u8500_href arm armv7 u8500 st-ericsson u8500 actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB @@ -280,11 +280,11 @@ xaeniax arm pxa zipitz2 arm pxa colibri_pxa270 arm pxa - toradex jornada arm sa1100 -plutux arm armv7 plutux avionic-design tegra2 -medcom arm armv7 medcom avionic-design tegra2 -tec arm armv7 tec avionic-design tegra2 -paz00 arm armv7 paz00 compal tegra2 -trimslice arm armv7 trimslice compulab tegra2 +plutux arm armv7 plutux avionic-design tegra20 +medcom arm armv7 medcom avionic-design tegra20 +tec arm armv7 tec avionic-design tegra20 +paz00 arm armv7 paz00 compal tegra20 +trimslice arm armv7 trimslice compulab tegra20 atngw100 avr32 at32ap - atmel at32ap700x atstk1002 avr32 at32ap atstk1000 atmel at32ap700x atstk1003 avr32 at32ap atstk1000 atmel at32ap700x diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c index 60ec6e3..8cfcf82 100644 --- a/drivers/gpio/tegra_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -1,5 +1,5 @@ /* - * NVIDIA Tegra2 GPIO handling. + * NVIDIA Tegra20 GPIO handling. * (C) Copyright 2010-2012 * NVIDIA Corporation <www.nvidia.com> * @@ -30,14 +30,14 @@ #include <common.h> #include <asm/io.h> #include <asm/bitops.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/gpio.h>

enum { - TEGRA2_CMD_INFO, - TEGRA2_CMD_PORT, - TEGRA2_CMD_OUTPUT, - TEGRA2_CMD_INPUT, + TEGRA20_CMD_INFO, + TEGRA20_CMD_PORT, + TEGRA20_CMD_OUTPUT, + TEGRA20_CMD_INPUT, };

static struct gpio_names { diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index 5b6ea0e..b4eb491 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -262,7 +262,7 @@ exit: return error; }

-static int tegra2_i2c_write_data(u32 addr, u8 *data, u32 len) +static int tegra20_i2c_write_data(u32 addr, u8 *data, u32 len) { int error; struct i2c_trans_info trans_info; @@ -275,12 +275,12 @@ static int tegra2_i2c_write_data(u32 addr, u8 *data, u32 len)

error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info); if (error) - debug("tegra2_i2c_write_data: Error (%d) !!!\n", error); + debug("tegra20_i2c_write_data: Error (%d) !!!\n", error);

return error; }

-static int tegra2_i2c_read_data(u32 addr, u8 *data, u32 len) +static int tegra20_i2c_read_data(u32 addr, u8 *data, u32 len) { int error; struct i2c_trans_info trans_info; @@ -293,7 +293,7 @@ static int tegra2_i2c_read_data(u32 addr, u8 *data, u32 len)

error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info); if (error) - debug("tegra2_i2c_read_data: Error (%d) !!!\n", error); + debug("tegra20_i2c_read_data: Error (%d) !!!\n", error);

return error; } @@ -438,7 +438,7 @@ int i2c_write_data(uchar chip, uchar *buffer, int len) debug("\n");

/* Shift 7-bit address over for lower-level i2c functions */ - rc = tegra2_i2c_write_data(chip << 1, buffer, len); + rc = tegra20_i2c_write_data(chip << 1, buffer, len); if (rc) debug("i2c_write_data(): rc=%d\n", rc);

@@ -452,7 +452,7 @@ int i2c_read_data(uchar chip, uchar *buffer, int len)

debug("inside i2c_read_data():\n"); /* Shift 7-bit address over for lower-level i2c functions */ - rc = tegra2_i2c_read_data(chip << 1, buffer, len); + rc = tegra20_i2c_read_data(chip << 1, buffer, len); if (rc) { debug("i2c_read_data(): rc=%d\n", rc); return rc; diff --git a/drivers/input/Makefile b/drivers/input/Makefile index 5c831b2..68c6a16 100644 --- a/drivers/input/Makefile +++ b/drivers/input/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libinput.o

COBJS-$(CONFIG_I8042_KBD) += i8042.o -COBJS-$(CONFIG_TEGRA2_KEYBOARD) += tegra-kbc.o +COBJS-$(CONFIG_TEGRA20_KEYBOARD) += tegra-kbc.o ifdef CONFIG_PS2KBD COBJS-y += keyboard.o pc_keyb.o COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 29bf583..ddfa727 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -39,31 +39,31 @@ struct mmc_host mmc_host[4]; * @param host Structure to fill in (base, reg, mmc_id) * @param dev_index Device index (0-3) */ -static void tegra2_get_setup(struct mmc_host *host, int dev_index) +static void tegra20_get_setup(struct mmc_host *host, int dev_index) { - debug("tegra2_get_base_mmc: dev_index = %d\n", dev_index); + debug("tegra20_get_base_mmc: dev_index = %d\n", dev_index);

switch (dev_index) { case 1: - host->base = TEGRA2_SDMMC3_BASE; + host->base = TEGRA20_SDMMC3_BASE; host->mmc_id = PERIPH_ID_SDMMC3; break; case 2: - host->base = TEGRA2_SDMMC2_BASE; + host->base = TEGRA20_SDMMC2_BASE; host->mmc_id = PERIPH_ID_SDMMC2; break; case 3: - host->base = TEGRA2_SDMMC1_BASE; + host->base = TEGRA20_SDMMC1_BASE; host->mmc_id = PERIPH_ID_SDMMC1; break; case 0: default: - host->base = TEGRA2_SDMMC4_BASE; + host->base = TEGRA20_SDMMC4_BASE; host->mmc_id = PERIPH_ID_SDMMC4; break; }

- host->reg = (struct tegra2_mmc *)host->base; + host->reg = (struct tegra20_mmc *)host->base; }

static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data) @@ -345,7 +345,7 @@ static void mmc_change_clock(struct mmc_host *host, uint clock) debug(" mmc_change_clock called\n");

/* - * Change Tegra2 SDMMCx clock divisor here. Source is 216MHz, + * Change Tegra20 SDMMCx clock divisor here. Source is 216MHz, * PLLP_OUT0 */ if (clock == 0) @@ -494,11 +494,11 @@ static int mmc_core_init(struct mmc *mmc) return 0; }

-int tegra2_mmc_getcd(struct mmc *mmc) +int tegra20_mmc_getcd(struct mmc *mmc) { struct mmc_host *host = (struct mmc_host *)mmc->priv;

- debug("tegra2_mmc_getcd called\n"); + debug("tegra20_mmc_getcd called\n");

if (host->cd_gpio >= 0) return !gpio_get_value(host->cd_gpio); @@ -506,13 +506,13 @@ int tegra2_mmc_getcd(struct mmc *mmc) return 1; }

-int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) +int tegra20_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) { struct mmc_host *host; char gpusage[12]; /* "SD/MMCn PWR" or "SD/MMCn CD" */ struct mmc *mmc;

- debug(" tegra2_mmc_init: index %d, bus width %d " + debug(" tegra20_mmc_init: index %d, bus width %d " "pwr_gpio %d cd_gpio %d\n", dev_index, bus_width, pwr_gpio, cd_gpio);

@@ -521,7 +521,7 @@ int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) host->clock = 0; host->pwr_gpio = pwr_gpio; host->cd_gpio = cd_gpio; - tegra2_get_setup(host, dev_index); + tegra20_get_setup(host, dev_index);

clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 20000000);

@@ -539,12 +539,12 @@ int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)

mmc = &mmc_dev[dev_index];

- sprintf(mmc->name, "Tegra2 SD/MMC"); + sprintf(mmc->name, "Tegra20 SD/MMC"); mmc->priv = host; mmc->send_cmd = mmc_send_cmd; mmc->set_ios = mmc_set_ios; mmc->init = mmc_core_init; - mmc->getcd = tegra2_mmc_getcd; + mmc->getcd = tegra20_mmc_getcd;

mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; if (bus_width == 8) @@ -559,7 +559,7 @@ int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio) * max freq is highest HS eMMC clock as per the SD/MMC spec * (actually 52MHz) * Both of these are the closest equivalents w/216MHz source - * clock and Tegra2 SDMMC divisors. + * clock and Tegra20 SDMMC divisors. */ mmc->f_min = 375000; mmc->f_max = 48000000; diff --git a/drivers/mmc/tegra_mmc.h b/drivers/mmc/tegra_mmc.h index f9cdcaa..b1f2564 100644 --- a/drivers/mmc/tegra_mmc.h +++ b/drivers/mmc/tegra_mmc.h @@ -22,13 +22,13 @@ #ifndef __TEGRA_MMC_H_ #define __TEGRA_MMC_H_

-#define TEGRA2_SDMMC1_BASE 0xC8000000 -#define TEGRA2_SDMMC2_BASE 0xC8000200 -#define TEGRA2_SDMMC3_BASE 0xC8000400 -#define TEGRA2_SDMMC4_BASE 0xC8000600 +#define TEGRA20_SDMMC1_BASE 0xC8000000 +#define TEGRA20_SDMMC2_BASE 0xC8000200 +#define TEGRA20_SDMMC3_BASE 0xC8000400 +#define TEGRA20_SDMMC4_BASE 0xC8000600

#ifndef __ASSEMBLY__ -struct tegra2_mmc { +struct tegra20_mmc { unsigned int sysad; /* _SYSTEM_ADDRESS_0 */ unsigned short blksize; /* _BLOCK_SIZE_BLOCK_COUNT_0 15:00 */ unsigned short blkcnt; /* _BLOCK_SIZE_BLOCK_COUNT_0 31:16 */ @@ -118,7 +118,7 @@ struct tegra2_mmc { #define TEGRA_MMC_NORINTSIGEN_XFER_COMPLETE (1 << 1)

struct mmc_host { - struct tegra2_mmc *reg; + struct tegra20_mmc *reg; unsigned int version; /* SDHCI spec. version */ unsigned int clock; /* Current clock (MHz) */ unsigned int base; /* Base address, SDMMC1/2/3/4 */ diff --git a/drivers/spi/tegra_spi.c b/drivers/spi/tegra_spi.c index 4a3e799..2355e02 100644 --- a/drivers/spi/tegra_spi.c +++ b/drivers/spi/tegra_spi.c @@ -54,7 +54,7 @@ static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)

int spi_cs_is_valid(unsigned int bus, unsigned int cs) { - /* Tegra2 SPI-Flash - only 1 device ('bus/cs') */ + /* Tegra20 SPI-Flash - only 1 device ('bus/cs') */ if (bus != 0 || cs != 0) return 0; else @@ -72,9 +72,9 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, return NULL; }

- if (max_hz > TEGRA2_SPI_MAX_FREQ) { + if (max_hz > TEGRA20_SPI_MAX_FREQ) { printf("SPI error: unsupported frequency %d Hz. Max frequency" - " is %d Hz\n", max_hz, TEGRA2_SPI_MAX_FREQ); + " is %d Hz\n", max_hz, TEGRA20_SPI_MAX_FREQ); return NULL; }

@@ -86,7 +86,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, spi->slave.bus = bus; spi->slave.cs = cs; spi->freq = max_hz; - spi->regs = (struct spi_tegra *)TEGRA2_SPI_BASE; + spi->regs = (struct spi_tegra *)TEGRA20_SPI_BASE; spi->mode = mode;

return &spi->slave; @@ -130,7 +130,7 @@ int spi_claim_bus(struct spi_slave *slave) debug("spi_init: COMMAND = %08x\n", readl(&regs->command));

/* - * SPI pins on Tegra2 are muxed - change pinmux later due to UART + * SPI pins on Tegra20 are muxed - change pinmux later due to UART * issue. */ pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH); diff --git a/include/configs/harmony.h b/include/configs/harmony.h index df5265a..d0555c1 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -25,24 +25,24 @@ #define __CONFIG_H

#include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for Harmony. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-harmony +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-harmony #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (Harmony) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Harmony" +#define V_PROMPT "Tegra20 (Harmony) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Harmony"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD +#define CONFIG_TEGRA20_ENABLE_UARTD

/* UARTD: keyboard satellite board UART, default */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -#ifdef CONFIG_TEGRA2_ENABLE_UARTA +#ifdef CONFIG_TEGRA20_ENABLE_UARTA /* UARTA: debug board UART */ #define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE #endif @@ -80,6 +80,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/configs/medcom.h b/include/configs/medcom.h index c84db03..bce03a4 100644 --- a/include/configs/medcom.h +++ b/include/configs/medcom.h @@ -26,20 +26,20 @@ #ifndef __CONFIG_H #define __CONFIG_H

-#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for Medcom. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-medcom +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (Medcom) # " -#define CONFIG_TEGRA2_BOARD_STRING "Avionic Design Medcom" +#define V_PROMPT "Tegra20 (Medcom) # " +#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Medcom"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD /* UARTD: debug UART */ +#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE

#define CONFIG_BOARD_EARLY_INIT_F @@ -78,6 +78,6 @@ "ext2load mmc 0 0x17000000 /boot/uImage;" \ "bootm"

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 0dd1e83..0eb9f3b 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -18,20 +18,20 @@ #define __CONFIG_H

#include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for Paz00. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-paz00 +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-paz00 #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (Paz00) MOD # " -#define CONFIG_TEGRA2_BOARD_STRING "Compal Paz00" +#define V_PROMPT "Tegra20 (Paz00) MOD # " +#define CONFIG_TEGRA20_BOARD_STRING "Compal Paz00"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTA +#define CONFIG_TEGRA20_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE

#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00 @@ -68,6 +68,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 9870590..42291d4 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -26,20 +26,20 @@ #ifndef __CONFIG_H #define __CONFIG_H

-#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for Plutux. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-plutux +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-plutux #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (Plutux) # " -#define CONFIG_TEGRA2_BOARD_STRING "Avionic Design Plutux" +#define V_PROMPT "Tegra20 (Plutux) # " +#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Plutux"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD /* UARTD: debug UART */ +#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE

#define CONFIG_BOARD_EARLY_INIT_F @@ -78,6 +78,6 @@ "ext2load mmc 0 0x17000000 /boot/uImage;" \ "bootm"

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index f661583..afc4a85 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -27,26 +27,26 @@ #include <asm/sizes.h>

/* LP0 suspend / resume */ -#define CONFIG_TEGRA2_LP0 +#define CONFIG_TEGRA20_LP0 #define CONFIG_AES #define CONFIG_TEGRA_PMU #define CONFIG_TPS6586X_POWER #define CONFIG_TEGRA_CLOCK_SCALING

-#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-seaboard +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (SeaBoard) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard" +#define V_PROMPT "Tegra20 (SeaBoard) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Seaboard"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD +#define CONFIG_TEGRA20_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE

/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ @@ -95,14 +95,14 @@ #define CONFIG_CMD_DHCP

/* Enable keyboard */ -#define CONFIG_TEGRA2_KEYBOARD +#define CONFIG_TEGRA20_KEYBOARD #define CONFIG_KEYBOARD

-#undef TEGRA2_DEVICE_SETTINGS -#define TEGRA2_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ +#undef TEGRA20_DEVICE_SETTINGS +#define TEGRA20_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ "stdout=serial\0" \ "stderr=serial\0"

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/configs/tec.h b/include/configs/tec.h index 3d0a788..39400d9 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -26,21 +26,21 @@ #ifndef __CONFIG_H #define __CONFIG_H

-#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for TEC. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-tec +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-tec #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (TEC) # " -#define CONFIG_TEGRA2_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" +#define V_PROMPT "Tegra20 (TEC) # " +#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" #define CONFIG_SYS_BOARD_ODMDATA 0x2b0d8011

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD /* UARTD: debug UART */ +#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE

#define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/tegra2-common-post.h b/include/configs/tegra20-common-post.h similarity index 96% rename from include/configs/tegra2-common-post.h rename to include/configs/tegra20-common-post.h index c21fc28..e8badb9 100644 --- a/include/configs/tegra2-common-post.h +++ b/include/configs/tegra20-common-post.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */

-#ifndef __TEGRA2_COMMON_POST_H -#define __TEGRA2_COMMON_POST_H +#ifndef __TEGRA20_COMMON_POST_H +#define __TEGRA20_COMMON_POST_H

#ifdef CONFIG_BOOTCOMMAND

@@ -141,9 +141,9 @@ #endif

#define CONFIG_EXTRA_ENV_SETTINGS \ - TEGRA2_DEVICE_SETTINGS \ + TEGRA20_DEVICE_SETTINGS \ "fdt_load=0x01000000\0" \ "fdt_high=01100000\0" \ BOOTCMDS_COMMON

-#endif /* __TEGRA2_COMMON_POST_H */ +#endif /* __TEGRA20_COMMON_POST_H */ diff --git a/include/configs/tegra2-common.h b/include/configs/tegra20-common.h similarity index 93% rename from include/configs/tegra2-common.h rename to include/configs/tegra20-common.h index 6807762..91cf28c 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra20-common.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */

-#ifndef __TEGRA2_COMMON_H -#define __TEGRA2_COMMON_H +#ifndef __TEGRA20_COMMON_H +#define __TEGRA20_COMMON_H #include <asm/sizes.h>

/* @@ -37,7 +37,7 @@ * High Level Configuration Options */ #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ -#define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */ +#define CONFIG_TEGRA20 /* in a NVidia Tegra20 core */ #define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */

@@ -45,7 +45,7 @@

#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */

-#include <asm/arch/tegra2.h> /* get chip and board defs */ +#include <asm/arch/tegra20.h> /* get chip and board defs */

/* * Display CPU and Board information @@ -58,7 +58,7 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_OF_LIBFDT /* enable passing of devicetree */

-#ifdef CONFIG_TEGRA2_LP0 +#ifdef CONFIG_TEGRA20_LP0 #define TEGRA_LP0_ADDR 0x1C406000 #define TEGRA_LP0_SIZE 0x2000 #define TEGRA_LP0_VEC \ @@ -112,7 +112,7 @@ #define CONFIG_EHCI_IS_TDI #define CONFIG_EHCI_DCACHE

-/* Total I2C ports on Tegra2 */ +/* Total I2C ports on Tegra20 */ #define TEGRA_I2C_NUM_CONTROLLERS 4

/* include default commands */ @@ -136,7 +136,7 @@ /* Environment information, boards can override if required */ #define CONFIG_CONSOLE_MUX #define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define TEGRA2_DEVICE_SETTINGS "stdin=serial\0" \ +#define TEGRA20_DEVICE_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0"

@@ -161,7 +161,7 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)

-#define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000) +#define CONFIG_SYS_MEMTEST_START (TEGRA20_SDRC_CS0 + 0x600000) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)

#define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */ @@ -179,7 +179,7 @@ * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 TEGRA2_SDRC_CS0 +#define PHYS_SDRAM_1 TEGRA20_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */

#define CONFIG_SYS_TEXT_BASE 0x00108000 @@ -195,4 +195,4 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_ENTERRCM #define CONFIG_CMD_BOOTZ -#endif /* __TEGRA2_COMMON_H */ +#endif /* __TEGRA20_COMMON_H */ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 34be8a9..b3c5249 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -25,21 +25,21 @@ #define __CONFIG_H

#include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for TrimSlice. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-trimslice +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-trimslice #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (TrimSlice) # " -#define CONFIG_TEGRA2_BOARD_STRING "Compulab Trimslice" +#define V_PROMPT "Tegra20 (TrimSlice) # " +#define CONFIG_TEGRA20_BOARD_STRING "Compulab Trimslice"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTA -#define CONFIG_TEGRA2_UARTA_GPU +#define CONFIG_TEGRA20_ENABLE_UARTA +#define CONFIG_TEGRA20_UARTA_GPU #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE

#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE @@ -94,6 +94,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 5e4d538..25ec2eb 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -25,20 +25,20 @@ #define __CONFIG_H

#include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for Ventana. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-ventana +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-ventana #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (Ventana) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Ventana" +#define V_PROMPT "Tegra20 (Ventana) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Ventana"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD +#define CONFIG_TEGRA20_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE

#define CONFIG_MACH_TYPE MACH_TYPE_VENTANA @@ -75,6 +75,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/configs/whistler.h b/include/configs/whistler.h index f2952d5..b747d0e 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -25,21 +25,21 @@ #define __CONFIG_H

#include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h"

/* Enable fdt support for Whistler. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-whistler +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-whistler #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE

/* High-level configuration options */ -#define V_PROMPT "Tegra2 (Whistler) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Whistler" +#define V_PROMPT "Tegra20 (Whistler) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Whistler"

/* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTA -#define CONFIG_TEGRA2_UARTA_UAA_UAB +#define CONFIG_TEGRA20_ENABLE_UARTA +#define CONFIG_TEGRA20_UARTA_UAA_UAB #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE

#define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER @@ -89,6 +89,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP

-#include "tegra2-common-post.h" +#include "tegra20-common-post.h"

#endif /* __CONFIG_H */ diff --git a/include/fdtdec.h b/include/fdtdec.h index fab577e..a8f783f 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -57,12 +57,12 @@ struct fdt_memory { */ enum fdt_compat_id { COMPAT_UNKNOWN, - COMPAT_NVIDIA_TEGRA20_USB, /* Tegra2 USB port */ - COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra2 i2c */ - COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra2 dvc (really just i2c) */ - COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra2 memory controller */ - COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra2 memory timing table */ - COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra2 Keyboard */ + COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */ + COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra20 i2c */ + COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra20 dvc (really just i2c) */ + COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */ + COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */ + COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra20 Keyboard */

COMPAT_COUNT, }; diff --git a/include/serial.h b/include/serial.h index 5173499..cbdf8a9 100644 --- a/include/serial.h +++ b/include/serial.h @@ -31,7 +31,7 @@ extern struct serial_device *default_serial_console(void); defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \ defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \ - defined(CONFIG_TEGRA2) || defined(CONFIG_SYS_COREBOOT) + defined(CONFIG_TEGRA20) || defined(CONFIG_SYS_COREBOOT) extern struct serial_device serial0_device; extern struct serial_device serial1_device; #if defined(CONFIG_SYS_NS16550_SERIAL)

In preparation for splitting out the armv4t code from tegra20, move the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- Makefile | 3 ++ arch/arm/cpu/armv7/tegra20/Makefile | 15 ++-------- .../cpu/{armv7/tegra20 => tegra20-common}/Makefile | 31 +++++++++----------- .../cpu/{armv7/tegra20 => tegra20-common}/ap20.c | 0 .../cpu/{armv7/tegra20 => tegra20-common}/board.c | 0 .../cpu/{armv7/tegra20 => tegra20-common}/clock.c | 0 .../cpu/{armv7/tegra20 => tegra20-common}/crypto.c | 0 .../cpu/{armv7/tegra20 => tegra20-common}/crypto.h | 0 .../cpu/{armv7/tegra20 => tegra20-common}/emc.c | 0 .../{armv7/tegra20 => tegra20-common}/funcmux.c | 0 .../tegra20 => tegra20-common}/lowlevel_init.S | 0 .../cpu/{armv7/tegra20 => tegra20-common}/pinmux.c | 0 .../cpu/{armv7/tegra20 => tegra20-common}/pmu.c | 0 .../{armv7/tegra20 => tegra20-common}/sys_info.c | 0 .../cpu/{armv7/tegra20 => tegra20-common}/timer.c | 0 .../{armv7/tegra20 => tegra20-common}/warmboot.c | 0 .../tegra20 => tegra20-common}/warmboot_avp.c | 0 .../tegra20 => tegra20-common}/warmboot_avp.h | 0 spl/Makefile | 4 +++ 19 files changed, 23 insertions(+), 30 deletions(-) copy arch/arm/cpu/{armv7/tegra20 => tegra20-common}/Makefile (66%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/ap20.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/board.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/clock.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/crypto.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/crypto.h (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/emc.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/funcmux.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/lowlevel_init.S (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/pinmux.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/pmu.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/sys_info.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/timer.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/warmboot.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/warmboot_avp.c (100%) rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/warmboot_avp.h (100%)

diff --git a/Makefile b/Makefile index 85e36ec..0ff6b3c 100644 --- a/Makefile +++ b/Makefile @@ -322,6 +322,9 @@ endif ifeq ($(SOC),exynos) LIBS += $(CPUDIR)/s5p-common/libs5p-common.o endif +ifeq ($(SOC),tegra20) +LIBS += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +endif

LIBS := $(addprefix $(obj),$(sort $(LIBS))) .PHONY : $(LIBS) diff --git a/arch/arm/cpu/armv7/tegra20/Makefile b/arch/arm/cpu/armv7/tegra20/Makefile index da62646..5f4035d 100644 --- a/arch/arm/cpu/armv7/tegra20/Makefile +++ b/arch/arm/cpu/armv7/tegra20/Makefile @@ -23,27 +23,16 @@ # MA 02111-1307 USA #

-# The AVP is ARMv4T architecture so we must use special compiler -# flags for any startup files it might use. -CFLAGS_arch/arm/cpu/armv7/tegra20/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra20/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra20/warmboot_avp.o += -march=armv4t - include $(TOPDIR)/config.mk

LIB = $(obj)lib$(SOC).o

-SOBJS := lowlevel_init.o -COBJS-y := ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o -COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o -COBJS-$(CONFIG_TEGRA_PMU) += pmu.o COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o -COBJS-$(CONFIG_TEGRA20_LP0) += crypto.o warmboot.o warmboot_avp.o COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o

COBJS := $(COBJS-y) -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS))

all: $(obj).depend $(LIB)

diff --git a/arch/arm/cpu/armv7/tegra20/Makefile b/arch/arm/cpu/tegra20-common/Makefile similarity index 66% copy from arch/arm/cpu/armv7/tegra20/Makefile copy to arch/arm/cpu/tegra20-common/Makefile index da62646..60be2a6 100644 --- a/arch/arm/cpu/armv7/tegra20/Makefile +++ b/arch/arm/cpu/tegra20-common/Makefile @@ -1,7 +1,7 @@ # # (C) Copyright 2010,2011 Nvidia Corporation. # -# (C) Copyright 2000-2003 +# (C) Copyright 2000-2008 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -14,7 +14,7 @@ # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License @@ -23,29 +23,26 @@ # MA 02111-1307 USA #

+include $(TOPDIR)/config.mk + # The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. -CFLAGS_arch/arm/cpu/armv7/tegra20/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra20/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra20/warmboot_avp.o += -march=armv4t - -include $(TOPDIR)/config.mk +CFLAGS_arch/arm/cpu/tegra20-common/ap20.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra20-common/clock.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra20-common/warmboot_avp.o += -march=armv4t

-LIB = $(obj)lib$(SOC).o +LIB = $(obj)lib$(SOC)-common.o

-SOBJS := lowlevel_init.o -COBJS-y := ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o +SOBJS += lowlevel_init.o +COBJS-y += ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o +COBJS-$(CONFIG_TEGRA20_LP0) += warmboot.o crypto.o warmboot_avp.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o COBJS-$(CONFIG_TEGRA_PMU) += pmu.o -COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o -COBJS-$(CONFIG_TEGRA20_LP0) += crypto.o warmboot.o warmboot_avp.o -COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o

-COBJS := $(COBJS-y) -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))

-all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB)

$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) diff --git a/arch/arm/cpu/armv7/tegra20/ap20.c b/arch/arm/cpu/tegra20-common/ap20.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/ap20.c rename to arch/arm/cpu/tegra20-common/ap20.c diff --git a/arch/arm/cpu/armv7/tegra20/board.c b/arch/arm/cpu/tegra20-common/board.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/board.c rename to arch/arm/cpu/tegra20-common/board.c diff --git a/arch/arm/cpu/armv7/tegra20/clock.c b/arch/arm/cpu/tegra20-common/clock.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/clock.c rename to arch/arm/cpu/tegra20-common/clock.c diff --git a/arch/arm/cpu/armv7/tegra20/crypto.c b/arch/arm/cpu/tegra20-common/crypto.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/crypto.c rename to arch/arm/cpu/tegra20-common/crypto.c diff --git a/arch/arm/cpu/armv7/tegra20/crypto.h b/arch/arm/cpu/tegra20-common/crypto.h similarity index 100% rename from arch/arm/cpu/armv7/tegra20/crypto.h rename to arch/arm/cpu/tegra20-common/crypto.h diff --git a/arch/arm/cpu/armv7/tegra20/emc.c b/arch/arm/cpu/tegra20-common/emc.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/emc.c rename to arch/arm/cpu/tegra20-common/emc.c diff --git a/arch/arm/cpu/armv7/tegra20/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/funcmux.c rename to arch/arm/cpu/tegra20-common/funcmux.c diff --git a/arch/arm/cpu/armv7/tegra20/lowlevel_init.S b/arch/arm/cpu/tegra20-common/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/armv7/tegra20/lowlevel_init.S rename to arch/arm/cpu/tegra20-common/lowlevel_init.S diff --git a/arch/arm/cpu/armv7/tegra20/pinmux.c b/arch/arm/cpu/tegra20-common/pinmux.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/pinmux.c rename to arch/arm/cpu/tegra20-common/pinmux.c diff --git a/arch/arm/cpu/armv7/tegra20/pmu.c b/arch/arm/cpu/tegra20-common/pmu.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/pmu.c rename to arch/arm/cpu/tegra20-common/pmu.c diff --git a/arch/arm/cpu/armv7/tegra20/sys_info.c b/arch/arm/cpu/tegra20-common/sys_info.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/sys_info.c rename to arch/arm/cpu/tegra20-common/sys_info.c diff --git a/arch/arm/cpu/armv7/tegra20/timer.c b/arch/arm/cpu/tegra20-common/timer.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/timer.c rename to arch/arm/cpu/tegra20-common/timer.c diff --git a/arch/arm/cpu/armv7/tegra20/warmboot.c b/arch/arm/cpu/tegra20-common/warmboot.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/warmboot.c rename to arch/arm/cpu/tegra20-common/warmboot.c diff --git a/arch/arm/cpu/armv7/tegra20/warmboot_avp.c b/arch/arm/cpu/tegra20-common/warmboot_avp.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/warmboot_avp.c rename to arch/arm/cpu/tegra20-common/warmboot_avp.c diff --git a/arch/arm/cpu/armv7/tegra20/warmboot_avp.h b/arch/arm/cpu/tegra20-common/warmboot_avp.h similarity index 100% rename from arch/arm/cpu/armv7/tegra20/warmboot_avp.h rename to arch/arm/cpu/tegra20-common/warmboot_avp.h diff --git a/spl/Makefile b/spl/Makefile index ea7d475..d04d2f2 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -62,6 +62,10 @@ ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif

+ifeq ($(SOC),tegra20) +LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +endif + START := $(addprefix $(SPLTREE)/,$(START)) LIBS := $(addprefix $(SPLTREE)/,$(sort $(LIBS-y)))

Add tegra20-common-post.h to be consistent with other tegra20 boards.

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Thierry Reding thierry.reding@avionic-design.de Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- include/configs/tec.h | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/include/configs/tec.h b/include/configs/tec.h index 39400d9..9b3f88d 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -79,4 +79,6 @@ "ext2load mmc 0 0x17000000 /boot/uImage;" \ "bootm"

+#include "tegra20-common-post.h" + #endif /* __CONFIG_H */

Add support for specifying a different CPU for main u-boot and SPL u-boot builds. This is done by adding an optional SPL CPU after the main CPU in boards.cfg as follows:

normal_cpu:spl_cpu

This this case CPU will be set to "normal_cpu" during the main u-boot build and "spl_cpu" during the SPL build.

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- boards.cfg | 5 +++++ doc/README.SPL | 12 ++++++++++++ mkconfig | 24 ++++++++++++++++-------- 3 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/boards.cfg b/boards.cfg index 70507ad..35f9737 100644 --- a/boards.cfg +++ b/boards.cfg @@ -11,6 +11,11 @@ # Lines starting with '#' are comments. # Blank lines are ignored. # +# The CPU field takes the form: +# cpu[:spl_cpu] +# If spl_cpu is specified the make variable CPU will be set to this +# during the SPL build. +# # The options field takes the form: # <board config name>[:comma separated config options] # Each config option has the form (value defaults to "1"): diff --git a/doc/README.SPL b/doc/README.SPL index 0276953..e4a5ac3 100644 --- a/doc/README.SPL +++ b/doc/README.SPL @@ -66,3 +66,15 @@ CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o) CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o) CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o) CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o) + + +Normally CPU is assumed to be the same between the SPL and normal +u-boot build. However it is possible to specify a different CPU for +the SPL build for cases where the SPL is expected to run on a +different CPU model from the main u-boot. This is done by specifying +an SPL CPU in boards.cfg as follows: + + normal_cpu:spl_cpu + +This this case CPU will be set to "normal_cpu" during the main u-boot +build and "spl_cpu" during the SPL build. diff --git a/mkconfig b/mkconfig index 801f921..07031c6 100755 --- a/mkconfig +++ b/mkconfig @@ -59,7 +59,8 @@ CONFIG_NAME="${1%_config}" [ "${BOARD_NAME}" ] || BOARD_NAME="${1%_config}"

arch="$2" -cpu="$3" +cpu=`echo $3 | awk 'BEGIN {FS = ":"} ; {print $1}'` +spl_cpu=`echo $3 | awk 'BEGIN {FS = ":"} ; {print $2}'` if [ "$4" = "-" ] ; then board=${BOARD_NAME} else @@ -130,13 +131,20 @@ fi # # Create include file for Make # -echo "ARCH = ${arch}" > config.mk -echo "CPU = ${cpu}" >> config.mk -echo "BOARD = ${board}" >> config.mk - -[ "${vendor}" ] && echo "VENDOR = ${vendor}" >> config.mk - -[ "${soc}" ] && echo "SOC = ${soc}" >> config.mk +( echo "ARCH = ${arch}" + if [ ! -z "$spl_cpu" ] ; then + echo 'ifeq ($(CONFIG_SPL_BUILD),y)' + echo "CPU = ${spl_cpu}" + echo "else" + echo "CPU = ${cpu}" + echo "endif" + else + echo "CPU = ${cpu}" + fi + echo "BOARD = ${board}" + + [ "${vendor}" ] && echo "VENDOR = ${vendor}" + [ "${soc}" ] && echo "SOC = ${soc}" ) > config.mk

# Assign board directory to BOARDIR variable if [ -z "${vendor}" ] ; then

Don't use timer_init from tegra board.c. This comes out of arm720t for the SPL build.

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- board/nvidia/common/board.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index d1a7f3a..6753f95 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -49,6 +49,7 @@ const struct tegra20_sysinfo sysinfo = { CONFIG_TEGRA20_BOARD_STRING };

+#ifndef CONFIG_SPL_BUILD /* * Routine: timer_init * Description: init the timestamp and lastinc value @@ -57,6 +58,7 @@ int timer_init(void) { return 0; } +#endif

void __pin_mux_usb(void) {

Move warmboot_save_sdram_params() to later in the boot sequence. This code relies on devicetree to get the address of the memory controller and with upcoming changes for SPL boot it gets called early in the boot process when devicetree is not initialized yet.

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- arch/arm/cpu/tegra20-common/ap20.c | 5 ----- board/nvidia/common/board.c | 3 +++ 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/tegra20-common/ap20.c b/arch/arm/cpu/tegra20-common/ap20.c index 8b6afbc..6ff71e0 100644 --- a/arch/arm/cpu/tegra20-common/ap20.c +++ b/arch/arm/cpu/tegra20-common/ap20.c @@ -345,11 +345,6 @@ void init_pmc_scratch(void) /* ODMDATA is for kernel use to determine RAM size, LP config, etc. */ odmdata = get_odmdata(); writel(odmdata, &pmc->pmc_scratch20); - -#ifdef CONFIG_TEGRA20_LP0 - /* save Sdram params to PMC 2, 4, and 24 for WB0 */ - warmboot_save_sdram_params(); -#endif }

void tegra20_start(void) diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 6753f95..7ab2040 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -133,6 +133,9 @@ int board_init(void) #endif

#ifdef CONFIG_TEGRA20_LP0 + /* save Sdram params to PMC 2, 4, and 24 for WB0 */ + warmboot_save_sdram_params(); + /* prepare the WB code to LP0 location */ warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); #endif

Enable the building of private libgcc for SPL

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- arch/arm/lib/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 39a9550..bd3b77f 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(ARCH).o LIBGCC = $(obj)libgcc.o

-ifndef CONFIG_SPL_BUILD GLSOBJS += _ashldi3.o GLSOBJS += _ashrdi3.o GLSOBJS += _divsi3.o @@ -37,6 +36,7 @@ GLSOBJS += _umodsi3.o

GLCOBJS += div0.o

+ifndef CONFIG_SPL_BUILD COBJS-y += board.o COBJS-y += bootm.o COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o

These flags were necessary when building tegra20 as a single binary that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support is split into a separate SPL, this is no longer necessary.

Signed-off-by: Allen Martin amartin@nvidia.com Acked-by: Stephen Warren swarren@wwwdotorg.org Tested-by: Thierry Reding thierry.reding@avionic-design.de --- arch/arm/cpu/armv7/tegra20/config.mk | 12 ------------ arch/arm/cpu/tegra20-common/Makefile | 2 -- 2 files changed, 14 deletions(-)

diff --git a/arch/arm/cpu/armv7/tegra20/config.mk b/arch/arm/cpu/armv7/tegra20/config.mk index 714daaf..6432e75 100644 --- a/arch/arm/cpu/armv7/tegra20/config.mk +++ b/arch/arm/cpu/armv7/tegra20/config.mk @@ -23,16 +23,4 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # - -# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build these -# files with compatible flags -ifdef CONFIG_TEGRA20 -CFLAGS_arch/arm/lib/board.o += -march=armv4t -CFLAGS_arch/arm/lib/memset.o += -march=armv4t -CFLAGS_lib/string.o += -march=armv4t -CFLAGS_common/cmd_nvedit.o += -march=armv4t -endif - -USE_PRIVATE_LIBGCC = yes - CONFIG_ARCH_DEVICE_TREE := tegra20 diff --git a/arch/arm/cpu/tegra20-common/Makefile b/arch/arm/cpu/tegra20-common/Makefile index 60be2a6..43c96c6 100644 --- a/arch/arm/cpu/tegra20-common/Makefile +++ b/arch/arm/cpu/tegra20-common/Makefile @@ -27,8 +27,6 @@ include $(TOPDIR)/config.mk

# The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. -CFLAGS_arch/arm/cpu/tegra20-common/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/tegra20-common/clock.o += -march=armv4t CFLAGS_arch/arm/cpu/tegra20-common/warmboot_avp.o += -march=armv4t

LIB = $(obj)lib$(SOC)-common.o