[U-Boot-Users] Fixed CD in serial.c, AT91RM9200

Hello all, is there a reason why the clock divisor in the baudrate generator register (us->US_BRGR) is set to a fixed value in serial_setbrg(void):
us->US_BRGR = CFG_AT91C_BRGR_DIVISOR
I changed the implementation of serial_setbrg(void) and i can now opperate at higher baudrates. (change baudrate with loadb).
Here is my version:
void serial_setbrg (void) { DECLARE_GLOBAL_DATA_PTR; int baudrate, baudRateGenDiv,i; unsigned long baudrate_table[] = CFG_BAUDRATE_TABLE; int n_baudrates = (sizeof(baudrate_table) / sizeof(baudrate_table[0]));
baudrate = gd->baudrate;
//check if value is supported for (i=0; i<n_baudrates; ++i) { if (baudrate == baudrate_table[i]) { baudRateGenDiv = AT91C_MASTER_CLOCK / baudrate / 16; //printf ("## Switched baudrate to %dbps.\n", baudrate); break; } }
if (baudRateGenDiv==0) { //using default value baudRateGenDiv = CFG_AT91C_BRGR_DIVISOR; printf ("## Baudrate %dbps not supported using default baudrate %dbps.\n", baudrate, CONFIG_BAUDRATE); }
us->US_BRGR = baudRateGenDiv; }
If you agree with my changes i can provide a patch.
wbr
Peter

In message 367ED8C46538D7119DAC000A0D106744520D6E@elmegmbh.elmedmn.com you wrote:
is there a reason why the clock divisor in the baudrate generator register (us->US_BRGR) is set to a fixed value in serial_setbrg(void):
us->US_BRGR = CFG_AT91C_BRGR_DIVISOR
I changed the implementation of serial_setbrg(void) and i can now opperate at higher baudrates. (change baudrate with loadb).
I have never seen any feedback or comments about this proposal.
Anybody out there?
Best regards,
Wolfgang Denk

Wolfgang Denk wrote:
In message 367ED8C46538D7119DAC000A0D106744520D6E@elmegmbh.elmedmn.com you wrote:
is there a reason why the clock divisor in the baudrate generator register (us->US_BRGR) is set to a fixed value in serial_setbrg(void):
us->US_BRGR = CFG_AT91C_BRGR_DIVISOR
I changed the implementation of serial_setbrg(void) and i can now opperate at higher baudrates. (change baudrate with loadb).
I have never seen any feedback or comments about this proposal.
Anybody out there?
I introduced this since it was originally hardcoded to
us->US_BRGR = 33
for the AT91RM9200DK. The comment says "hardcode so no __divsi3". I decdided that having a CFG_AT91C_BRGR_DIVISOR in your board specific header file would be enough.
I had no time to test Peter's patch yet. But go ahead and apply it. If I find problems I'll report them...

In message 410F7832.8070700@imc-berlin.de you wrote:
I introduced this since it was originally hardcoded to
us->US_BRGR = 33
for the AT91RM9200DK. The comment says "hardcode so no __divsi3".
This is what I remember, so I guess there was a problem?
I had no time to test Peter's patch yet. But go ahead and apply it. If I find problems I'll report them...
Ummm... please test it first, to avoid checking in something that doesn't work. Thanks.
Best regards,
Wolfgang Denk
participants (3)
-
Kögler Peter
-
Steven Scholz
-
Wolfgang Denk