On 2/23/22 14:21, Pali Rohár wrote:

If Armada 37xx watchdog is started before U-Boot then CNTR_CTRL_ACTIVE bit is set, U-Boot armada-37xx-wdt.c driver fails to initialize and so U-Boot is unable to use or kick this watchdog.

Do not check for CNTR_CTRL_ACTIVE bit and always initialize watchdog. Same behavior is implemented in Linux kernel driver.

This change allows to activate watchdog in firmware which loads U-Boot.

Signed-off-by: Pali Rohár pali@kernel.org

Applied to u-boot-watchdog/master

Thanks, Stefan

---

drivers/watchdog/armada-37xx-wdt.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-)

diff --git a/drivers/watchdog/armada-37xx-wdt.c b/drivers/watchdog/armada-37xx-wdt.c index 2e119b9b5aad..bacebbc7926a 100644 --- a/drivers/watchdog/armada-37xx-wdt.c +++ b/drivers/watchdog/armada-37xx-wdt.c @@ -58,13 +58,11 @@ static void counter_disable(struct a37xx_wdt *priv, int id) clrbits_le32(priv->reg + CNTR_CTRL(id), CNTR_CTRL_ENABLE); }

-static int init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src) +static void init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src) { u32 reg;

reg = readl(priv->reg + CNTR_CTRL(id));

• if (reg & CNTR_CTRL_ACTIVE)

• return -EBUSY;
  
  

  reg &= ~(CNTR_CTRL_MODE_MASK | CNTR_CTRL_PRESCALE_MASK | CNTR_CTRL_TRIG_SRC_MASK);

@@ -79,8 +77,6 @@ static int init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src) reg |= trig_src;

writel(reg, priv->reg + CNTR_CTRL(id));

• return 0; }

  static int a37xx_wdt_reset(struct udevice *dev)

@@ -116,16 +112,9 @@ static int a37xx_wdt_expire_now(struct udevice *dev, ulong flags) static int a37xx_wdt_start(struct udevice *dev, u64 ms, ulong flags) { struct a37xx_wdt *priv = dev_get_priv(dev);

• int err;

• err = init_counter(priv, 0, CNTR_CTRL_MODE_ONESHOT, 0);

• if (err < 0)

• return err;
  
  

• err = init_counter(priv, 1, CNTR_CTRL_MODE_HWSIG,

• 	   CNTR_CTRL_TRIG_SRC_PREV_CNTR);
  

• if (err < 0)

• return err;
  

• init_counter(priv, 0, CNTR_CTRL_MODE_ONESHOT, 0);

• init_counter(priv, 1, CNTR_CTRL_MODE_HWSIG, CNTR_CTRL_TRIG_SRC_PREV_CNTR);

  priv->timeout = ms * priv->clk_rate / 1000 / CNTR_CTRL_PRESCALE_MIN;

Viele Grüße, Stefan Roese