[PATCH v2 0/3] arm: mach-k3: am62: Add core number, gpu and pru autodetection FDT fixups

From: Francesco Dolcini francesco.dolcini@toradex.com
AM62x SoC is available in multiple variant: - CPU cores (Cortex-A) AM62x1 (1 core), AM62x2 (2 cores), AM62x4 (4 cores) - GPU AM625x with GPU, AM623x without GPU - PRU (Programmable RT unit) can be present or not on AM62x2/AM62x4
Remove the relevant FDT nodes by reading the actual configuration from the SoC registers, with that change is possible to have a single dts/dtb file handling the different variant at runtime. While removing GPU node and CPU nodes also the watchdog node in the same Module Domain is removed.
A similar approach is implemented for example on i.MX8 and STM32MP1 SoC.
Since we start using ft_system_setup on a SoC without msmc ram and fdt_fixup_msmc_ram function fails on those SoC (triggering a reset loop) the first commit fix it by calling that function only on specific SoC.
v2: - Moved fdt common functions to to common_fdt.c and ft_system_setup function to specific SoC files (eg. am654_fdt.c) and compile them using relevant configuration - Add GPU and PRU fdt fixup
v1: https://lore.kernel.org/all/20230712134730.30229-1-francesco@dolcini.it/
Emanuele Ghidoli (3): arm: k3: Fix ft_system_setup so it can be enabled on any SoC arm: mach-k3: am62: Add CTRLMMR_WKUP_JTAG_DEVICE_ID register definition arm: mach-k3: am62: Fixup CPU core, gpu and pru nodes in fdt
arch/arm/mach-k3/Makefile | 7 ++ arch/arm/mach-k3/am625_fdt.c | 71 +++++++++++ arch/arm/mach-k3/am654_fdt.c | 12 ++ arch/arm/mach-k3/common.c | 91 -------------- arch/arm/mach-k3/common_fdt.c | 113 ++++++++++++++++++ arch/arm/mach-k3/common_fdt.h | 11 ++ arch/arm/mach-k3/include/mach/am62_hardware.h | 22 ++++ arch/arm/mach-k3/j721e_fdt.c | 12 ++ arch/arm/mach-k3/j721s2_fdt.c | 12 ++ 9 files changed, 260 insertions(+), 91 deletions(-) create mode 100644 arch/arm/mach-k3/am625_fdt.c create mode 100644 arch/arm/mach-k3/am654_fdt.c create mode 100644 arch/arm/mach-k3/common_fdt.c create mode 100644 arch/arm/mach-k3/common_fdt.h create mode 100644 arch/arm/mach-k3/j721e_fdt.c create mode 100644 arch/arm/mach-k3/j721s2_fdt.c

From: Emanuele Ghidoli emanuele.ghidoli@toradex.com
ft_system_setup cannot be enabled on SoC without msmc sram otherwise fdt_fixup_msmc_ram function fails causing system reset.
Fix by moving fdt_fixup_msmc_ram to common_fdt.c file and creating SoC (AM654, J721E and J721S2) specific files for fdt fixups.
This change was verified to not change anything on any existing board (all the J721S2, AM654 and J721E boards requires it, none of the remaining k3 boards require it).
Fixes: 30e96a240156 ("arm: mach-k3: Move MSMC fixup to SoC level") Signed-off-by: Emanuele Ghidoli emanuele.ghidoli@toradex.com Signed-off-by: Francesco Dolcini francesco.dolcini@toradex.com --- v2: - Moved fdt common functions to to common_fdt.c and ft_system_setup function to specific SoC files (eg. am654_fdt.c) and compile them using relevant configuration --- arch/arm/mach-k3/Makefile | 6 +++ arch/arm/mach-k3/am654_fdt.c | 12 +++++ arch/arm/mach-k3/common.c | 91 --------------------------------- arch/arm/mach-k3/common_fdt.c | 95 +++++++++++++++++++++++++++++++++++ arch/arm/mach-k3/common_fdt.h | 11 ++++ arch/arm/mach-k3/j721e_fdt.c | 12 +++++ arch/arm/mach-k3/j721s2_fdt.c | 12 +++++ 7 files changed, 148 insertions(+), 91 deletions(-) create mode 100644 arch/arm/mach-k3/am654_fdt.c create mode 100644 arch/arm/mach-k3/common_fdt.c create mode 100644 arch/arm/mach-k3/common_fdt.h create mode 100644 arch/arm/mach-k3/j721e_fdt.c create mode 100644 arch/arm/mach-k3/j721s2_fdt.c
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index b5bc2367813c..499bdaa7153d 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -10,6 +10,12 @@ obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/ obj-$(CONFIG_ARM64) += arm64-mmu.o obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o obj-$(CONFIG_ARM64) += cache.o +obj-$(CONFIG_OF_LIBFDT) += common_fdt.o +ifeq ($(CONFIG_OF_LIBFDT)$(CONFIG_OF_SYSTEM_SETUP),yy) +obj-$(CONFIG_SOC_K3_AM654) += am654_fdt.o +obj-$(CONFIG_SOC_K3_J721E) += j721e_fdt.o +obj-$(CONFIG_SOC_K3_J721S2) += j721s2_fdt.o +endif ifeq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_SOC_K3_AM654) += am654_init.o obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o diff --git a/arch/arm/mach-k3/am654_fdt.c b/arch/arm/mach-k3/am654_fdt.c new file mode 100644 index 000000000000..652fe8d32bbb --- /dev/null +++ b/arch/arm/mach-k3/am654_fdt.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common_fdt.h" +#include <fdt_support.h> + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + return fdt_fixup_msmc_ram_k3(blob); +} diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 34737a43aa08..93c0e49e49b7 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -357,97 +357,6 @@ void board_fit_image_post_process(const void *fit, int node, void **p_image, } #endif
-#if defined(CONFIG_OF_LIBFDT) -int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) -{ - u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2]; - struct ti_sci_handle *ti_sci = get_ti_sci_handle(); - int ret, node, subnode, len, prev_node; - u32 range[4], addr, size; - const fdt32_t *sub_reg; - - ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end); - msmc_size = msmc_end - msmc_start + 1; - debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__, - msmc_start, msmc_size); - - /* find or create "msmc_sram node */ - ret = fdt_path_offset(blob, parent_path); - if (ret < 0) - return ret; - - node = fdt_find_or_add_subnode(blob, ret, node_name); - if (node < 0) - return node; - - ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram"); - if (ret < 0) - return ret; - - reg[0] = cpu_to_fdt64(msmc_start); - reg[1] = cpu_to_fdt64(msmc_size); - ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg)); - if (ret < 0) - return ret; - - fdt_setprop_cell(blob, node, "#address-cells", 1); - fdt_setprop_cell(blob, node, "#size-cells", 1); - - range[0] = 0; - range[1] = cpu_to_fdt32(msmc_start >> 32); - range[2] = cpu_to_fdt32(msmc_start & 0xffffffff); - range[3] = cpu_to_fdt32(msmc_size); - ret = fdt_setprop(blob, node, "ranges", range, sizeof(range)); - if (ret < 0) - return ret; - - subnode = fdt_first_subnode(blob, node); - prev_node = 0; - - /* Look for invalid subnodes and delete them */ - while (subnode >= 0) { - sub_reg = fdt_getprop(blob, subnode, "reg", &len); - addr = fdt_read_number(sub_reg, 1); - sub_reg++; - size = fdt_read_number(sub_reg, 1); - debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__, - subnode, addr, size); - if (addr + size > msmc_size || - !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) || - !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) { - fdt_del_node(blob, subnode); - debug("%s: deleting subnode %d\n", __func__, subnode); - if (!prev_node) - subnode = fdt_first_subnode(blob, node); - else - subnode = fdt_next_subnode(blob, prev_node); - } else { - prev_node = subnode; - subnode = fdt_next_subnode(blob, prev_node); - } - } - - return 0; -} - -#if defined(CONFIG_OF_SYSTEM_SETUP) -int ft_system_setup(void *blob, struct bd_info *bd) -{ - int ret; - - ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000"); - if (ret < 0) - ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000", - "sram@70000000"); - if (ret) - printf("%s: fixing up msmc ram failed %d\n", __func__, ret); - - return ret; -} -#endif - -#endif - #ifndef CONFIG_SYSRESET void reset_cpu(void) { diff --git a/arch/arm/mach-k3/common_fdt.c b/arch/arm/mach-k3/common_fdt.c new file mode 100644 index 000000000000..c86fe3a5890b --- /dev/null +++ b/arch/arm/mach-k3/common_fdt.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common.h" +#include <dm.h> +#include <fdt_support.h> +#include <linux/soc/ti/ti_sci_protocol.h> + +static int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) +{ + u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2]; + struct ti_sci_handle *ti_sci = get_ti_sci_handle(); + int ret, node, subnode, len, prev_node; + u32 range[4], addr, size; + const fdt32_t *sub_reg; + + ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end); + msmc_size = msmc_end - msmc_start + 1; + debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__, + msmc_start, msmc_size); + + /* find or create "msmc_sram node */ + ret = fdt_path_offset(blob, parent_path); + if (ret < 0) + return ret; + + node = fdt_find_or_add_subnode(blob, ret, node_name); + if (node < 0) + return node; + + ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram"); + if (ret < 0) + return ret; + + reg[0] = cpu_to_fdt64(msmc_start); + reg[1] = cpu_to_fdt64(msmc_size); + ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg)); + if (ret < 0) + return ret; + + fdt_setprop_cell(blob, node, "#address-cells", 1); + fdt_setprop_cell(blob, node, "#size-cells", 1); + + range[0] = 0; + range[1] = cpu_to_fdt32(msmc_start >> 32); + range[2] = cpu_to_fdt32(msmc_start & 0xffffffff); + range[3] = cpu_to_fdt32(msmc_size); + ret = fdt_setprop(blob, node, "ranges", range, sizeof(range)); + if (ret < 0) + return ret; + + subnode = fdt_first_subnode(blob, node); + prev_node = 0; + + /* Look for invalid subnodes and delete them */ + while (subnode >= 0) { + sub_reg = fdt_getprop(blob, subnode, "reg", &len); + addr = fdt_read_number(sub_reg, 1); + sub_reg++; + size = fdt_read_number(sub_reg, 1); + debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__, + subnode, addr, size); + if (addr + size > msmc_size || + !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) || + !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) { + fdt_del_node(blob, subnode); + debug("%s: deleting subnode %d\n", __func__, subnode); + if (!prev_node) + subnode = fdt_first_subnode(blob, node); + else + subnode = fdt_next_subnode(blob, prev_node); + } else { + prev_node = subnode; + subnode = fdt_next_subnode(blob, prev_node); + } + } + + return 0; +} + +int fdt_fixup_msmc_ram_k3(void *blob) +{ + int ret; + + ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000"); + if (ret < 0) + ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000", + "sram@70000000"); + if (ret) + printf("%s: fixing up msmc ram failed %d\n", __func__, ret); + + return ret; +} diff --git a/arch/arm/mach-k3/common_fdt.h b/arch/arm/mach-k3/common_fdt.h new file mode 100644 index 000000000000..46c3dc5e1197 --- /dev/null +++ b/arch/arm/mach-k3/common_fdt.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#ifndef _COMMON_FDT_H +#define _COMMON_FDT_H + +int fdt_fixup_msmc_ram_k3(void *blob); + +#endif /* _COMMON_FDT_H */ diff --git a/arch/arm/mach-k3/j721e_fdt.c b/arch/arm/mach-k3/j721e_fdt.c new file mode 100644 index 000000000000..652fe8d32bbb --- /dev/null +++ b/arch/arm/mach-k3/j721e_fdt.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common_fdt.h" +#include <fdt_support.h> + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + return fdt_fixup_msmc_ram_k3(blob); +} diff --git a/arch/arm/mach-k3/j721s2_fdt.c b/arch/arm/mach-k3/j721s2_fdt.c new file mode 100644 index 000000000000..652fe8d32bbb --- /dev/null +++ b/arch/arm/mach-k3/j721s2_fdt.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common_fdt.h" +#include <fdt_support.h> + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + return fdt_fixup_msmc_ram_k3(blob); +}

From: Emanuele Ghidoli emanuele.ghidoli@toradex.com
Add register address and relevant bitmasks and shifts. Allow reading these information: - device identification - number of cores (part of device identification) - features (currently: PRU / no PRU) - security - functional safety - speed grade - temperature grade - package
Signed-off-by: Emanuele Ghidoli emanuele.ghidoli@toradex.com Signed-off-by: Francesco Dolcini francesco.dolcini@toradex.com Reviewed-by: Andrew Davis afd@ti.com --- v2: - added reviewed-by afd - added GPU/PRU mask --- arch/arm/mach-k3/include/mach/am62_hardware.h | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h index 88d58947269a..acd2d109c2c5 100644 --- a/arch/arm/mach-k3/include/mach/am62_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h @@ -20,6 +20,28 @@ #define MCU_CTRL_MMR0_BASE 0x04500000 #define WKUP_CTRL_MMR0_BASE 0x43000000
+#define CTRLMMR_WKUP_JTAG_DEVICE_ID (WKUP_CTRL_MMR0_BASE + 0x18) +#define JTAG_DEV_ID_MASK GENMASK(31, 18) +#define JTAG_DEV_ID_SHIFT 18 +#define JTAG_DEV_CORE_NR_MASK GENMASK(21, 19) +#define JTAG_DEV_CORE_NR_SHIFT 19 +#define JTAG_DEV_GPU_MASK BIT(18) +#define JTAG_DEV_GPU_SHIFT 18 +#define JTAG_DEV_FEATURES_MASK GENMASK(17, 13) +#define JTAG_DEV_FEATURES_SHIFT 13 +#define JTAG_DEV_SECURITY_MASK BIT(12) +#define JTAG_DEV_SECURITY_SHIFT 12 +#define JTAG_DEV_SAFETY_MASK BIT(11) +#define JTAG_DEV_SAFETY_SHIFT 11 +#define JTAG_DEV_SPEED_MASK GENMASK(10, 6) +#define JTAG_DEV_SPEED_SHIFT 6 +#define JTAG_DEV_TEMP_MASK GENMASK(5, 3) +#define JTAG_DEV_TEMP_SHIFT 3 +#define JTAG_DEV_PKG_MASK GENMASK(2, 0) +#define JTAG_DEV_PKG_SHIFT 0 + +#define JTAG_DEV_FEATURE_NO_PRU 0x4 + #define CTRLMMR_MAIN_DEVSTAT (WKUP_CTRL_MMR0_BASE + 0x30) #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK GENMASK(6, 3) #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3

From: Emanuele Ghidoli emanuele.ghidoli@toradex.com
AM62x SoC is available in multiple variant: - CPU cores (Cortex-A) AM62x1 (1 core), AM62x2 (2 cores), AM62x4 (4 cores) - GPU AM625x with GPU, AM623x without GPU - PRU (Programmable RT unit) can be present or not on AM62x2/AM62x4
Remove the relevant FDT nodes by reading the actual configuration from the SoC registers, with that change is possible to have a single dts/dtb file handling the different variant at runtime. While removing GPU node and CPU nodes also the watchdog node in the same Module Domain is removed.
A similar approach is implemented for example on i.MX8 and STM32MP1 SoC.
Signed-off-by: Emanuele Ghidoli emanuele.ghidoli@toradex.com Signed-off-by: Francesco Dolcini francesco.dolcini@toradex.com --- v2: - add GPU/PRU fixups --- arch/arm/mach-k3/Makefile | 1 + arch/arm/mach-k3/am625_fdt.c | 71 +++++++++++++++++++++++++++++++++++ arch/arm/mach-k3/common_fdt.c | 18 +++++++++ 3 files changed, 90 insertions(+) create mode 100644 arch/arm/mach-k3/am625_fdt.c
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index 499bdaa7153d..fd77b8bbba5c 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -15,6 +15,7 @@ ifeq ($(CONFIG_OF_LIBFDT)$(CONFIG_OF_SYSTEM_SETUP),yy) obj-$(CONFIG_SOC_K3_AM654) += am654_fdt.o obj-$(CONFIG_SOC_K3_J721E) += j721e_fdt.o obj-$(CONFIG_SOC_K3_J721S2) += j721s2_fdt.o +obj-$(CONFIG_SOC_K3_AM625) += am625_fdt.o endif ifeq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_SOC_K3_AM654) += am654_init.o diff --git a/arch/arm/mach-k3/am625_fdt.c b/arch/arm/mach-k3/am625_fdt.c new file mode 100644 index 000000000000..37806907af1a --- /dev/null +++ b/arch/arm/mach-k3/am625_fdt.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include <asm/hardware.h> +#include "common_fdt.h" +#include <fdt_support.h> + +static void fdt_fixup_cores_nodes_am625(void *blob, int core_nr) +{ + char node_path[32]; + + if (core_nr < 1) + return; + + for (; core_nr < 4; core_nr++) { + snprintf(node_path, sizeof(node_path), "/cpus/cpu@%d", core_nr); + fdt_del_node_path(blob, node_path); + snprintf(node_path, sizeof(node_path), "/cpus/cpu-map/cluster0/core%d", core_nr); + fdt_del_node_path(blob, node_path); + snprintf(node_path, sizeof(node_path), "/bus@f0000/watchdog@e0%d0000", core_nr); + fdt_del_node_path(blob, node_path); + } +} + +static void fdt_fixup_gpu_nodes_am625(void *blob, int has_gpu) +{ + if (!has_gpu) { + fdt_del_node_path(blob, "/bus@f0000/gpu@fd00000"); + fdt_del_node_path(blob, "/bus@f0000/watchdog@e0f0000"); + } +} + +static void fdt_fixup_pru_node_am625(void *blob, int has_pru) +{ + if (!has_pru) + fdt_del_node_path(blob, "/bus@f0000/pruss@30040000"); +} + +static int k3_get_core_nr(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return (full_devid & JTAG_DEV_CORE_NR_MASK) >> JTAG_DEV_CORE_NR_SHIFT; +} + +static int k3_has_pru(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + u32 feature_mask = (full_devid & JTAG_DEV_FEATURES_MASK) >> + JTAG_DEV_FEATURES_SHIFT; + + return !(feature_mask & JTAG_DEV_FEATURE_NO_PRU); +} + +static int k3_has_gpu(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return (full_devid & JTAG_DEV_GPU_MASK) >> JTAG_DEV_GPU_SHIFT; +} + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr()); + fdt_fixup_gpu_nodes_am625(blob, k3_has_gpu()); + fdt_fixup_pru_node_am625(blob, k3_has_pru()); + + return 0; +} diff --git a/arch/arm/mach-k3/common_fdt.c b/arch/arm/mach-k3/common_fdt.c index c86fe3a5890b..9478f605441f 100644 --- a/arch/arm/mach-k3/common_fdt.c +++ b/arch/arm/mach-k3/common_fdt.c @@ -93,3 +93,21 @@ int fdt_fixup_msmc_ram_k3(void *blob)
return ret; } + +int fdt_del_node_path(void *blob, const char *path) +{ + int ret; + int nodeoff; + + nodeoff = fdt_path_offset(blob, path); + if (nodeoff < 0) + return 0; /* Not found, skip it */ + + ret = fdt_del_node(blob, nodeoff); + if (ret < 0) + printf("Unable to delete node %s, err=%s\n", path, fdt_strerror(ret)); + else + debug("Deleted node %s\n", path); + + return ret; +}

On Fri, 14 Jul 2023 17:23:07 +0200, Francesco Dolcini wrote:
From: Francesco Dolcini francesco.dolcini@toradex.com
AM62x SoC is available in multiple variant:
- CPU cores (Cortex-A) AM62x1 (1 core), AM62x2 (2 cores), AM62x4 (4 cores)
- GPU AM625x with GPU, AM623x without GPU
- PRU (Programmable RT unit) can be present or not on AM62x2/AM62x4
[...]
Applied to u-boot/master, thanks!
participants (2)
-
Francesco Dolcini
-
Tom Rini