Hi ,

This patch need to split into two patches,

one for rockchip rk3328 and on for dwc2.

Thanks, - Kever On 05/17/2017 06:26 PM, Meng Dongyang wrote:

Fix macro error of dwc2 driver, add macro definition to config force mode and HNP/SRP capability. Add gpio config to control vbus in host mode.

Signed-off-by: Meng Dongyang daniel.meng@rock-chips.com

board/rockchip/evb_rk3328/evb-rk3328.c | 42 +++++++++++++++++++++++++++++++--- drivers/usb/host/dwc2.c | 24 ++++++++++++++++++- drivers/usb/host/dwc2.h | 10 ++++---- 3 files changed, 68 insertions(+), 8 deletions(-)

diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c index a7895cb..e8e793c 100644 --- a/board/rockchip/evb_rk3328/evb-rk3328.c +++ b/board/rockchip/evb_rk3328/evb-rk3328.c @@ -31,12 +31,48 @@ int dram_init_banksize(void) return 0; }

-int usb_gadget_handle_interrupts(void) +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include <usb.h> +#include <usb/dwc2_udc.h>

+static struct dwc2_plat_otg_data rk3328_otg_data = {

• .rx_fifo_sz = 512,
• .np_tx_fifo_sz = 16,
• .tx_fifo_sz = 128,

+};

+int board_usb_init(int index, enum usb_init_type init) {

• return 0;

• int node;
• const char *mode;
• bool matched = false;
• const void *blob = gd->fdt_blob;
• /* find the usb_otg node */
• node = fdt_node_offset_by_compatible(blob, -1,

• 			"rockchip,rk3328-usb");
  

• while (node > 0) {

• mode = fdt_getprop(blob, node, "dr_mode", NULL);
  

• if (mode && strcmp(mode, "otg") == 0) {
  

• 	matched = true;
  

• 	break;
  

• }
  

• node = fdt_node_offset_by_compatible(blob, node,
  

• 			"rockchip,rk3328-usb");
  

• }
• if (!matched) {

• debug("Not found usb_otg device\n");
  

• return -ENODEV;
  

• }
• rk3328_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
• return dwc2_udc_probe(&rk3328_otg_data); }

-int board_usb_init(int index, enum usb_init_type init) +int board_usb_cleanup(int index, enum usb_init_type init) { return 0; } +#endif diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 0e5df15..ca6d950 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -16,6 +16,7 @@ #include <wait_bit.h> #include <asm/io.h> #include <power/regulator.h> +#include <asm/gpio.h>

#include "dwc2.h"

@@ -41,6 +42,7 @@ struct dwc2_priv { u8 in_data_toggle[MAX_DEVICE][MAX_ENDPOINT]; u8 out_data_toggle[MAX_DEVICE][MAX_ENDPOINT]; struct dwc2_core_regs *regs;

• struct gpio_desc vbus_gpio; int root_hub_devnum; bool ext_vbus; bool oc_disable;

@@ -370,7 +372,7 @@ static void dwc_otg_core_init(struct dwc2_priv *priv) usbcfg &= ~DWC2_GUSBCFG_DDRSEL; #endif } else { /* UTMI+ interface */ -#if (CONFIG_DWC2_UTMI_PHY_WIDTH == 16) +#if (CONFIG_DWC2_UTMI_WIDTH == 16) usbcfg |= DWC2_GUSBCFG_PHYIF; #endif } @@ -394,6 +396,11 @@ static void dwc_otg_core_init(struct dwc2_priv *priv) usbcfg |= DWC2_GUSBCFG_ULPI_CLK_SUS_M; } #endif

+#ifdef CONFIG_DWC2_FORCE_HOST_MODE

• usbcfg |= DWC2_GUSBCFG_FORCEHOSTMODE;

+#endif

• writel(usbcfg, &regs->gusbcfg);

  /* Program the GAHBCFG Register. */

@@ -422,8 +429,10 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)

writel(ahbcfg, &regs->gahbcfg);

+#ifdef CONFIG_DWC2_HNP_SRP_CAP /* Program the GUSBCFG register for HNP/SRP. */ setbits_le32(&regs->gusbcfg, DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP); +#endif

#ifdef CONFIG_DWC2_IC_USB_CAP setbits_le32(&regs->gusbcfg, DWC2_GUSBCFG_IC_USB_CAP); @@ -1251,6 +1260,16 @@ static int dwc2_usb_probe(struct udevice *dev) { struct dwc2_priv *priv = dev_get_priv(dev); struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);

• int ret;

• /* Vbus gpio */

• ret = gpio_request_by_name(dev, "vbus-gpio", 0,

• 		   &priv->vbus_gpio, GPIOD_IS_OUT);
  

• if (ret)

• debug("vbus-gpio node is not exist!");
  

• if (dm_gpio_is_valid(&priv->vbus_gpio))

• dm_gpio_set_value(&priv->vbus_gpio, 1);
  
  

  bus_priv->desc_before_addr = true;

@@ -1263,6 +1282,9 @@ static int dwc2_usb_remove(struct udevice *dev)

dwc2_uninit_common(priv->regs);

• if (dm_gpio_is_valid(&priv->vbus_gpio))

• dm_gpio_set_value(&priv->vbus_gpio, 0);
  

• return 0; }

diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h index 4482dc6..3c62e9b 100644 --- a/drivers/usb/host/dwc2.h +++ b/drivers/usb/host/dwc2.h @@ -771,11 +771,11 @@ struct dwc2_core_regs { #define CONFIG_DWC2_MAX_TRANSFER_SIZE 65535 #define CONFIG_DWC2_MAX_PACKET_COUNT 511

-#define DWC2_PHY_TYPE_FS 0 -#define DWC2_PHY_TYPE_UTMI 1 -#define DWC2_PHY_TYPE_ULPI 2 +#define DWC2_PHY_TYPE_UTMI 0 +#define DWC2_PHY_TYPE_ULPI 1 +#define DWC2_PHY_TYPE_FS 2 #define CONFIG_DWC2_PHY_TYPE DWC2_PHY_TYPE_UTMI /* PHY type */ -#define CONFIG_DWC2_UTMI_WIDTH 8 /* UTMI bus width (8/16) */ +#define CONFIG_DWC2_UTMI_WIDTH 16 /* UTMI bus width (8/16) */

#undef CONFIG_DWC2_PHY_ULPI_DDR /* ULPI PHY uses DDR mode */ #define CONFIG_DWC2_PHY_ULPI_EXT_VBUS /* ULPI PHY controls VBUS */ @@ -785,5 +785,7 @@ struct dwc2_core_regs { #undef CONFIG_DWC2_THR_CTL /* Threshold control */ #define CONFIG_DWC2_TX_THR_LENGTH 64 #undef CONFIG_DWC2_IC_USB_CAP /* IC Cap */ +#define CONFIG_DWC2_FORCE_HOST_MODE /* Force host mode */ +#undef CONFIG_DWC2_HNP_SRP_CAP /* HNP/SRP Cap */

#endif /* __DWC2_H__ */