Hi Rick,

On Thu, Sep 20, 2018 at 11:00 AM Rick Chen rickchen36@gmail.com wrote:

...

Hi Rick,

On Tue, Sep 11, 2018 at 12:50 PM Bin Meng bmeng.cn@gmail.com wrote:

...

This series adds QEMU RISC-V 'virt' board target support, with the hope of helping people easily test U-Boot on RISC-V.

Some existing RISC-V codes have been changed to make it easily to support new targets. Some spotted coding style issues are fixed.

This series is available at u-boot-x86/riscv-working for testing.

Resend v2 to rebase on top of v2018.09 release with Tom's tree on github, as the git.denx.de is still out of sync ...

Changes in v2:

• Change Linux kernel entry parameters' type to support 32/64 bit
• new patch to remove CSR read/write defines in encoding.h
• new patch to pass mhartid CSR value to kernel
• new patch to move do_reset() to a common place

Any comments for the v2?

Hi Bin

Sorry for late response!

I have reviewed the v2 patch sets, it looks fine. And also verify the riscv-linux booting feature on ax25-ae350 board via bootm command. The verification is OK. :)

Thank you. I will prepare and resend a v3 with all these tags added from you and Lukas, and hopefully the v3 can be applied without any problem.

Regards, Bin