[U-Boot] [PATCH 1/2] ARM: tegra: Add e2220-1170 board
From: Stephen Warren swarren@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra210-e2220-1170.dts | 58 +++++ arch/arm/mach-tegra/tegra210/Kconfig | 6 + board/nvidia/e2220-1170/Kconfig | 12 + board/nvidia/e2220-1170/MAINTAINERS | 6 + board/nvidia/e2220-1170/Makefile | 8 + board/nvidia/e2220-1170/e2220-1170.c | 48 ++++ board/nvidia/e2220-1170/pinmux-config-e2220-1170.h | 269 +++++++++++++++++++++ configs/e2220-1170_defconfig | 16 ++ include/configs/e2220-1170.h | 72 ++++++ 10 files changed, 496 insertions(+) create mode 100644 arch/arm/dts/tegra210-e2220-1170.dts create mode 100644 board/nvidia/e2220-1170/Kconfig create mode 100644 board/nvidia/e2220-1170/MAINTAINERS create mode 100644 board/nvidia/e2220-1170/Makefile create mode 100644 board/nvidia/e2220-1170/e2220-1170.c create mode 100644 board/nvidia/e2220-1170/pinmux-config-e2220-1170.h create mode 100644 configs/e2220-1170_defconfig create mode 100644 include/configs/e2220-1170.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ba6355379cba..d8e1841eb4d8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra124-jetson-tk1.dtb \ tegra124-nyan-big.dtb \ tegra124-venice2.dtb \ + tegra210-e2220-1170.dtb \ tegra210-p2571.dtb dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-sld3-ref.dtb \ diff --git a/arch/arm/dts/tegra210-e2220-1170.dts b/arch/arm/dts/tegra210-e2220-1170.dts new file mode 100644 index 000000000000..75efbba1061e --- /dev/null +++ b/arch/arm/dts/tegra210-e2220-1170.dts @@ -0,0 +1,58 @@ +/dts-v1/; + +#include "tegra210.dtsi" + +/ { + model = "NVIDIA E2220-1170"; + compatible = "nvidia,e2220-1170", "nvidia,tegra210"; + + chosen { + stdout-path = &uarta; + }; + + aliases { + i2c0 = "/i2c@0,7000d000"; + sdhci0 = "/sdhci@0,700b0600"; + sdhci1 = "/sdhci@0,700b0000"; + usb0 = "/usb@0,7d000000"; + }; + + memory { + reg = <0x0 0x80000000 0x0 0xc0000000>; + }; + + sdhci@0,700b0000 { + status = "okay"; + cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; + power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + }; + + sdhci@0,700b0600 { + status = "okay"; + bus-width = <8>; + }; + + i2c@0,7000d000 { + status = "okay"; + clock-frequency = <400000>; + }; + + usb@0,7d000000 { + status = "okay"; + dr_mode = "peripheral"; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; +}; diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig index 147e6a83d722..9633ba8c629e 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -3,6 +3,11 @@ if TEGRA210 choice prompt "Tegra210 board select"
+config TARGET_E2220_1170 + bool "NVIDIA Tegra210 E2220-1170 base board" + help + E2220-1170 ERS + config TARGET_P2571 bool "NVIDIA Tegra210 P2571 base board" help @@ -13,6 +18,7 @@ endchoice config SYS_SOC default "tegra210"
+source "board/nvidia/e2220-1170/Kconfig" source "board/nvidia/p2571/Kconfig"
endif diff --git a/board/nvidia/e2220-1170/Kconfig b/board/nvidia/e2220-1170/Kconfig new file mode 100644 index 000000000000..0a30f4936223 --- /dev/null +++ b/board/nvidia/e2220-1170/Kconfig @@ -0,0 +1,12 @@ +if TARGET_E2220_1170 + +config SYS_BOARD + default "e2220-1170" + +config SYS_VENDOR + default "nvidia" + +config SYS_CONFIG_NAME + default "e2220-1170" + +endif diff --git a/board/nvidia/e2220-1170/MAINTAINERS b/board/nvidia/e2220-1170/MAINTAINERS new file mode 100644 index 000000000000..0abb37884018 --- /dev/null +++ b/board/nvidia/e2220-1170/MAINTAINERS @@ -0,0 +1,6 @@ +E2220-1170 BOARD +M: Tom Warren twarren@nvidia.com +S: Maintained +F: board/nvidia/e2220-1170/ +F: include/configs/e2220-1170.h +F: configs/e2220-1170_defconfig diff --git a/board/nvidia/e2220-1170/Makefile b/board/nvidia/e2220-1170/Makefile new file mode 100644 index 000000000000..c956b1972deb --- /dev/null +++ b/board/nvidia/e2220-1170/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2013-2015 +# NVIDIA Corporation <www.nvidia.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += e2220-1170.o diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c new file mode 100644 index 000000000000..b6976a227880 --- /dev/null +++ b/board/nvidia/e2220-1170/e2220-1170.c @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include "pinmux-config-e2220-1170.h" + +void pin_mux_mmc(void) +{ + struct udevice *dev; + uchar val; + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ + ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); + return; + } + val = 0xf2; + ret = dm_i2c_write(dev, 0x27, &val, 1); + if (ret) + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); +} + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_clear_tristate_input_clamping(); + + gpio_config_table(e2220_1170_gpio_inits, + ARRAY_SIZE(e2220_1170_gpio_inits)); + + pinmux_config_pingrp_table(e2220_1170_pingrps, + ARRAY_SIZE(e2220_1170_pingrps)); + + pinmux_config_drvgrp_table(e2220_1170_drvgrps, + ARRAY_SIZE(e2220_1170_drvgrps)); +} diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h new file mode 100644 index 000000000000..397dc7f44b11 --- /dev/null +++ b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _PINMUX_CONFIG_E2220_1170_H_ +#define _PINMUX_CONFIG_E2220_1170_H_ + +#define GPIO_INIT(_gpio, _init) \ + { \ + .gpio = GPIO_P##_gpio, \ + .init = TEGRA_GPIO_INIT_##_init, \ + } + +static const struct tegra_gpio_config e2220_1170_gpio_inits[] = { + /* gpio, init_val */ + GPIO_INIT(A5, IN), + GPIO_INIT(A6, IN), + GPIO_INIT(B4, IN), + GPIO_INIT(E6, IN), + GPIO_INIT(G2, OUT0), + GPIO_INIT(G3, OUT0), + GPIO_INIT(H0, OUT0), + GPIO_INIT(H1, OUT0), + GPIO_INIT(H2, IN), + GPIO_INIT(H3, OUT0), + GPIO_INIT(H4, OUT0), + GPIO_INIT(H5, IN), + GPIO_INIT(H6, OUT0), + GPIO_INIT(H7, OUT0), + GPIO_INIT(I0, OUT0), + GPIO_INIT(I1, IN), + GPIO_INIT(I2, OUT0), + GPIO_INIT(I3, OUT0), + GPIO_INIT(K0, IN), + GPIO_INIT(K1, OUT0), + GPIO_INIT(K2, OUT0), + GPIO_INIT(K3, OUT0), + GPIO_INIT(K4, IN), + GPIO_INIT(K5, OUT0), + GPIO_INIT(K6, IN), + GPIO_INIT(K7, OUT0), + GPIO_INIT(L0, OUT0), + GPIO_INIT(S4, OUT0), + GPIO_INIT(S5, OUT0), + GPIO_INIT(S6, OUT0), + GPIO_INIT(S7, OUT0), + GPIO_INIT(T0, OUT0), + GPIO_INIT(T1, OUT0), + GPIO_INIT(V1, OUT0), + GPIO_INIT(V2, OUT0), + GPIO_INIT(V3, IN), + GPIO_INIT(V5, OUT0), + GPIO_INIT(V6, OUT0), + GPIO_INIT(X0, IN), + GPIO_INIT(X1, IN), + GPIO_INIT(X2, IN), + GPIO_INIT(X3, IN), + GPIO_INIT(X4, IN), + GPIO_INIT(X5, IN), + GPIO_INIT(X6, IN), + GPIO_INIT(X7, IN), + GPIO_INIT(Y0, IN), + GPIO_INIT(Y1, IN), + GPIO_INIT(Z0, IN), + GPIO_INIT(Z4, OUT0), + GPIO_INIT(BB2, OUT0), + GPIO_INIT(BB3, OUT0), + GPIO_INIT(BB4, IN), + GPIO_INIT(CC1, IN), + GPIO_INIT(CC5, OUT0), + GPIO_INIT(CC6, IN), + GPIO_INIT(CC7, OUT0), +}; + +#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .od = PMUX_PIN_OD_##_od, \ + .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + } + +static const struct pmux_pingrp_config e2220_1170_pingrps[] = { + /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ + PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +}; + +#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ + { \ + .drvgrp = PMUX_DRVGRP_##_drvgrp, \ + .slwf = _slwf, \ + .slwr = _slwr, \ + .drvup = _drvup, \ + .drvdn = _drvdn, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ + } + +static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = { +}; + +#endif /* PINMUX_CONFIG_E2220_1170_H */ diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig new file mode 100644 index 000000000000..a31f5fa78a05 --- /dev/null +++ b/configs/e2220-1170_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_TEGRA=y +CONFIG_TEGRA210=y +CONFIG_TARGET_E2220_1170=y +CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h new file mode 100644 index 000000000000..49eb55ae4b29 --- /dev/null +++ b/include/configs/e2220-1170.h @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _E2220_1170_H +#define _E2220_1170_H + +#include <linux/sizes.h> + +/* enable PMIC */ +#define CONFIG_MAX77620_POWER + +#include "tegra210-common.h" + +/* High-level configuration options */ +#define V_PROMPT "Tegra210 (E2220-1170) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA E2220-1170" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) + +/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ +#define CONFIG_TEGRA114_SPI_CTRLS 6 +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20) + +/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX + +/* General networking support */ +#define CONFIG_CMD_DHCP + +#include "tegra-common-usb-gadget.h" +#include "tegra-common-post.h" + +#define COUNTER_FREQUENCY 38400000 + +#endif /* _E2220_1170_H */
From: Stephen Warren swarren@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra210-p2371-0000.dts | 59 +++++ arch/arm/mach-tegra/tegra210/Kconfig | 6 + board/nvidia/p2371-0000/Kconfig | 12 + board/nvidia/p2371-0000/MAINTAINERS | 6 + board/nvidia/p2371-0000/Makefile | 8 + board/nvidia/p2371-0000/p2371-0000.c | 48 ++++ board/nvidia/p2371-0000/pinmux-config-p2371-0000.h | 260 +++++++++++++++++++++ configs/p2371-0000_defconfig | 16 ++ include/configs/p2371-0000.h | 72 ++++++ 10 files changed, 488 insertions(+) create mode 100644 arch/arm/dts/tegra210-p2371-0000.dts create mode 100644 board/nvidia/p2371-0000/Kconfig create mode 100644 board/nvidia/p2371-0000/MAINTAINERS create mode 100644 board/nvidia/p2371-0000/Makefile create mode 100644 board/nvidia/p2371-0000/p2371-0000.c create mode 100644 board/nvidia/p2371-0000/pinmux-config-p2371-0000.h create mode 100644 configs/p2371-0000_defconfig create mode 100644 include/configs/p2371-0000.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d8e1841eb4d8..f61060fc92e5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -34,6 +34,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra124-nyan-big.dtb \ tegra124-venice2.dtb \ tegra210-e2220-1170.dtb \ + tegra210-p2371-0000.dtb \ tegra210-p2571.dtb dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-sld3-ref.dtb \ diff --git a/arch/arm/dts/tegra210-p2371-0000.dts b/arch/arm/dts/tegra210-p2371-0000.dts new file mode 100644 index 000000000000..10172a23ad70 --- /dev/null +++ b/arch/arm/dts/tegra210-p2371-0000.dts @@ -0,0 +1,59 @@ +/dts-v1/; + +#include "tegra210.dtsi" + +/ { + model = "NVIDIA P2371-0000"; + compatible = "nvidia,p2371-0000", "nvidia,tegra210"; + + chosen { + stdout-path = &uarta; + }; + + aliases { + i2c0 = "/i2c@0,7000d000"; + sdhci0 = "/sdhci@0,700b0600"; + sdhci1 = "/sdhci@0,700b0000"; + usb0 = "/usb@0,7d000000"; + }; + + memory { + reg = <0x0 0x80000000 0x0 0xc0000000>; + }; + + sdhci@0,700b0000 { + status = "okay"; + cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; + power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + }; + + sdhci@0,700b0600 { + status = "okay"; + bus-width = <8>; + }; + + i2c@0,7000d000 { + status = "okay"; + clock-frequency = <400000>; + }; + + usb@0,7d000000 { + status = "okay"; + dr_mode = "otg"; + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; +}; diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig index 9633ba8c629e..895002c5942b 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -8,6 +8,11 @@ config TARGET_E2220_1170 help E2220-1170 ERS
+config TARGET_P2371_0000 + bool "NVIDIA Tegra210 P2371-0000 base board" + help + P2371-0000 + config TARGET_P2571 bool "NVIDIA Tegra210 P2571 base board" help @@ -19,6 +24,7 @@ config SYS_SOC default "tegra210"
source "board/nvidia/e2220-1170/Kconfig" +source "board/nvidia/p2371-0000/Kconfig" source "board/nvidia/p2571/Kconfig"
endif diff --git a/board/nvidia/p2371-0000/Kconfig b/board/nvidia/p2371-0000/Kconfig new file mode 100644 index 000000000000..f94be12be1a0 --- /dev/null +++ b/board/nvidia/p2371-0000/Kconfig @@ -0,0 +1,12 @@ +if TARGET_P2371_0000 + +config SYS_BOARD + default "p2371-0000" + +config SYS_VENDOR + default "nvidia" + +config SYS_CONFIG_NAME + default "p2371-0000" + +endif diff --git a/board/nvidia/p2371-0000/MAINTAINERS b/board/nvidia/p2371-0000/MAINTAINERS new file mode 100644 index 000000000000..e6d04bf7c5e1 --- /dev/null +++ b/board/nvidia/p2371-0000/MAINTAINERS @@ -0,0 +1,6 @@ +P2371-0000 BOARD +M: Tom Warren twarren@nvidia.com +S: Maintained +F: board/nvidia/p2371-0000/ +F: include/configs/p2371-0000.h +F: configs/p2371-0000_defconfig diff --git a/board/nvidia/p2371-0000/Makefile b/board/nvidia/p2371-0000/Makefile new file mode 100644 index 000000000000..9f580ae5b296 --- /dev/null +++ b/board/nvidia/p2371-0000/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2013-2015 +# NVIDIA Corporation <www.nvidia.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += p2371-0000.o diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c new file mode 100644 index 000000000000..4781897bc3e5 --- /dev/null +++ b/board/nvidia/p2371-0000/p2371-0000.c @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include "pinmux-config-p2371-0000.h" + +void pin_mux_mmc(void) +{ + struct udevice *dev; + uchar val; + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ + ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); + return; + } + val = 0xf2; + ret = dm_i2c_write(dev, 0x27, &val, 1); + if (ret) + printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); +} + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_clear_tristate_input_clamping(); + + gpio_config_table(p2371_0000_gpio_inits, + ARRAY_SIZE(p2371_0000_gpio_inits)); + + pinmux_config_pingrp_table(p2371_0000_pingrps, + ARRAY_SIZE(p2371_0000_pingrps)); + + pinmux_config_drvgrp_table(p2371_0000_drvgrps, + ARRAY_SIZE(p2371_0000_drvgrps)); +} diff --git a/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h b/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h new file mode 100644 index 000000000000..5b2fbb7bd7cb --- /dev/null +++ b/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h @@ -0,0 +1,260 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _PINMUX_CONFIG_P2371_0000_H_ +#define _PINMUX_CONFIG_P2371_0000_H_ + +#define GPIO_INIT(_gpio, _init) \ + { \ + .gpio = GPIO_P##_gpio, \ + .init = TEGRA_GPIO_INIT_##_init, \ + } + +static const struct tegra_gpio_config p2371_0000_gpio_inits[] = { + /* gpio, init_val */ + GPIO_INIT(A5, IN), + GPIO_INIT(E4, OUT0), + GPIO_INIT(E6, IN), + GPIO_INIT(G0, IN), + GPIO_INIT(G3, OUT0), + GPIO_INIT(H0, OUT0), + GPIO_INIT(H2, IN), + GPIO_INIT(H3, OUT0), + GPIO_INIT(H4, OUT0), + GPIO_INIT(H5, IN), + GPIO_INIT(H6, OUT0), + GPIO_INIT(H7, OUT0), + GPIO_INIT(I0, OUT0), + GPIO_INIT(I1, IN), + GPIO_INIT(I2, OUT0), + GPIO_INIT(I3, OUT0), + GPIO_INIT(K4, IN), + GPIO_INIT(K5, OUT0), + GPIO_INIT(K6, IN), + GPIO_INIT(K7, OUT0), + GPIO_INIT(L0, OUT0), + GPIO_INIT(S4, OUT0), + GPIO_INIT(S5, OUT0), + GPIO_INIT(S6, OUT0), + GPIO_INIT(S7, OUT0), + GPIO_INIT(T0, OUT0), + GPIO_INIT(T1, OUT0), + GPIO_INIT(V1, OUT0), + GPIO_INIT(V2, OUT0), + GPIO_INIT(V5, OUT0), + GPIO_INIT(V6, OUT0), + GPIO_INIT(V7, OUT1), + GPIO_INIT(X0, IN), + GPIO_INIT(X1, IN), + GPIO_INIT(X2, IN), + GPIO_INIT(X3, IN), + GPIO_INIT(X4, IN), + GPIO_INIT(X5, IN), + GPIO_INIT(X6, IN), + GPIO_INIT(X7, IN), + GPIO_INIT(Y1, IN), + GPIO_INIT(Z0, IN), + GPIO_INIT(Z4, OUT0), + GPIO_INIT(BB2, OUT0), + GPIO_INIT(BB3, OUT0), + GPIO_INIT(CC1, IN), + GPIO_INIT(CC6, IN), + GPIO_INIT(CC7, OUT0), +}; + +#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .od = PMUX_PIN_OD_##_od, \ + .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + } + +static const struct pmux_pingrp_config p2371_0000_pingrps[] = { + /* pingrp, mux, pull, tri, e_input, od, e_io_hv */ + PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), + PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH), + PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI1_MOSI_PC0, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI1_MISO_PC1, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI1_SCK_PC2, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI1_CS0_PC3, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI1_CS1_PC4, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC1_DAT_PE1, DMIC1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC2_DAT_PE3, DMIC2, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK0, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK1, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK2, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK3, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_CLK_PV7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL), + PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL), + PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL), + PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), +}; + +#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ + { \ + .drvgrp = PMUX_DRVGRP_##_drvgrp, \ + .slwf = _slwf, \ + .slwr = _slwr, \ + .drvup = _drvup, \ + .drvdn = _drvdn, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ + } + +static const struct pmux_drvgrp_config p2371_0000_drvgrps[] = { +}; + +#endif /* PINMUX_CONFIG_P2371_0000_H */ diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig new file mode 100644 index 000000000000..b2d0e83e3d96 --- /dev/null +++ b/configs/p2371-0000_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_TEGRA=y +CONFIG_TEGRA210=y +CONFIG_TARGET_P2371_0000=y +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h new file mode 100644 index 000000000000..e70c3c24e301 --- /dev/null +++ b/include/configs/p2371-0000.h @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _P2371_0000_H +#define _P2371_0000_H + +#include <linux/sizes.h> + +/* enable PMIC */ +#define CONFIG_MAX77620_POWER + +#include "tegra210-common.h" + +/* High-level configuration options */ +#define V_PROMPT "Tegra210 (P2371-0000) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) + +/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ +#define CONFIG_TEGRA114_SPI_CTRLS 6 +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20) + +/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX + +/* General networking support */ +#define CONFIG_CMD_DHCP + +#include "tegra-common-usb-gadget.h" +#include "tegra-common-post.h" + +#define COUNTER_FREQUENCY 38400000 + +#endif /* _P2371_0000_H */
Stephen,
-----Original Message----- From: Stephen Warren [mailto:swarren@wwwdotorg.org] Sent: Wednesday, July 29, 2015 12:49 PM To: u-boot@lists.denx.de; Simon Glass; Tom Warren; Stephen Warren Cc: Thierry Reding Subject: [PATCH 2/2] ARM: tegra: Add p2371-0000 board
From: Stephen Warren swarren@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra210-p2371-0000.dts | 59 +++++ arch/arm/mach-tegra/tegra210/Kconfig | 6 + board/nvidia/p2371-0000/Kconfig | 12 + board/nvidia/p2371-0000/MAINTAINERS | 6 + board/nvidia/p2371-0000/Makefile | 8 + board/nvidia/p2371-0000/p2371-0000.c | 48 ++++ board/nvidia/p2371-0000/pinmux-config-p2371-0000.h | 260 +++++++++++++++++++++ configs/p2371-0000_defconfig | 16 ++ include/configs/p2371-0000.h | 72 ++++++ 10 files changed, 488 insertions(+) create mode 100644 arch/arm/dts/tegra210-p2371-0000.dts create mode 100644 board/nvidia/p2371-0000/Kconfig create mode 100644 board/nvidia/p2371-0000/MAINTAINERS create mode 100644 board/nvidia/p2371-0000/Makefile create mode 100644 board/nvidia/p2371-0000/p2371-0000.c create mode 100644 board/nvidia/p2371-0000/pinmux-config-p2371-0000.h create mode 100644 configs/p2371-0000_defconfig create mode 100644 include/configs/p2371-0000.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d8e1841eb4d8..f61060fc92e5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -34,6 +34,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra124-nyan-big.dtb \ tegra124-venice2.dtb \ tegra210-e2220-1170.dtb \
- tegra210-p2371-0000.dtb \ tegra210-p2571.dtb
dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-sld3-ref.dtb \ diff --git a/arch/arm/dts/tegra210-p2371-0000.dts b/arch/arm/dts/tegra210- p2371-0000.dts new file mode 100644 index 000000000000..10172a23ad70 --- /dev/null +++ b/arch/arm/dts/tegra210-p2371-0000.dts @@ -0,0 +1,59 @@ +/dts-v1/;
+#include "tegra210.dtsi"
+/ {
- model = "NVIDIA P2371-0000";
- compatible = "nvidia,p2371-0000", "nvidia,tegra210";
- chosen {
stdout-path = &uarta;- };
- aliases {
i2c0 = "/i2c@0,7000d000";sdhci0 = "/sdhci@0,700b0600";sdhci1 = "/sdhci@0,700b0000";usb0 = "/usb@0,7d000000";- };
- memory {
reg = <0x0 0x80000000 0x0 0xc0000000>;- };
- sdhci@0,700b0000 {
status = "okay";cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;power-gpios = <&gpio TEGRA_GPIO(Z, 4)GPIO_ACTIVE_HIGH>;
bus-width = <4>;- };
- sdhci@0,700b0600 {
status = "okay";bus-width = <8>;- };
- i2c@0,7000d000 {
status = "okay";clock-frequency = <400000>;- };
- usb@0,7d000000 {
status = "okay";dr_mode = "otg";nvidia,vbus-gpio = <&gpio TEGRA_GPIO(CC, 4)GPIO_ACTIVE_HIGH>;
- };
- clocks {
compatible = "simple-bus";#address-cells = <1>;#size-cells = <0>;clk32k_in: clock@0 {compatible = "fixed-clock";reg = <0>;#clock-cells = <0>;clock-frequency = <32768>;};- };
+}; diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach- tegra/tegra210/Kconfig index 9633ba8c629e..895002c5942b 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -8,6 +8,11 @@ config TARGET_E2220_1170 help E2220-1170 ERS
+config TARGET_P2371_0000
- bool "NVIDIA Tegra210 P2371-0000 base board"
- help
P2371-0000config TARGET_P2571 bool "NVIDIA Tegra210 P2571 base board" help @@ -19,6 +24,7 @@ config SYS_SOC default "tegra210"
source "board/nvidia/e2220-1170/Kconfig" +source "board/nvidia/p2371-0000/Kconfig" source "board/nvidia/p2571/Kconfig"
endif diff --git a/board/nvidia/p2371-0000/Kconfig b/board/nvidia/p2371- 0000/Kconfig new file mode 100644 index 000000000000..f94be12be1a0 --- /dev/null +++ b/board/nvidia/p2371-0000/Kconfig @@ -0,0 +1,12 @@ +if TARGET_P2371_0000
+config SYS_BOARD
- default "p2371-0000"
+config SYS_VENDOR
- default "nvidia"
+config SYS_CONFIG_NAME
- default "p2371-0000"
+endif diff --git a/board/nvidia/p2371-0000/MAINTAINERS b/board/nvidia/p2371- 0000/MAINTAINERS new file mode 100644 index 000000000000..e6d04bf7c5e1 --- /dev/null +++ b/board/nvidia/p2371-0000/MAINTAINERS @@ -0,0 +1,6 @@ +P2371-0000 BOARD +M: Tom Warren twarren@nvidia.com
Shouldn't you be the maintainer? I'm glad to do it, but I have neither of these boards (P2371 or E2220) here.
+S: Maintained +F: board/nvidia/p2371-0000/ +F: include/configs/p2371-0000.h +F: configs/p2371-0000_defconfig diff --git a/board/nvidia/p2371-0000/Makefile b/board/nvidia/p2371- 0000/Makefile new file mode 100644 index 000000000000..9f580ae5b296 --- /dev/null +++ b/board/nvidia/p2371-0000/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2013-2015 +# NVIDIA Corporation <www.nvidia.com> +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y += p2371-0000.o diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371- 0000/p2371-0000.c new file mode 100644 index 000000000000..4781897bc3e5 --- /dev/null +++ b/board/nvidia/p2371-0000/p2371-0000.c @@ -0,0 +1,48 @@ +/*
- (C) Copyright 2013-2015
- NVIDIA Corporation <www.nvidia.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <i2c.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include "pinmux-config-p2371-0000.h"
+void pin_mux_mmc(void) +{
- struct udevice *dev;
- uchar val;
- int ret;
In my P2571 SD-card LDO2 patch, I use the max_77620.h values for the I2C dev and register. I think it would be cleaner/clearer if you did the same here.
- /* Turn on MAX77620 LDO2 to 3.3V for SD card power */
- ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);
- if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);return;- }
- val = 0xf2;
- ret = dm_i2c_write(dev, 0x27, &val, 1);
- if (ret)
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); }+/*
- Routine: pinmux_init
- Description: Do individual peripheral pinmux configs */ void
+pinmux_init(void) {
- pinmux_clear_tristate_input_clamping();
- gpio_config_table(p2371_0000_gpio_inits,
ARRAY_SIZE(p2371_0000_gpio_inits));- pinmux_config_pingrp_table(p2371_0000_pingrps,
ARRAY_SIZE(p2371_0000_pingrps));- pinmux_config_drvgrp_table(p2371_0000_drvgrps,
ARRAY_SIZE(p2371_0000_drvgrps)); }diff --git a/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h b/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h new file mode 100644 index 000000000000..5b2fbb7bd7cb --- /dev/null +++ b/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h @@ -0,0 +1,260 @@ +/*
- Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _PINMUX_CONFIG_P2371_0000_H_ +#define _PINMUX_CONFIG_P2371_0000_H_
+#define GPIO_INIT(_gpio, _init) \
- { \
.gpio = GPIO_P##_gpio, \.init = TEGRA_GPIO_INIT_##_init, \- }
+static const struct tegra_gpio_config p2371_0000_gpio_inits[] = {
- /* gpio, init_val */
- GPIO_INIT(A5, IN),
- GPIO_INIT(E4, OUT0),
- GPIO_INIT(E6, IN),
- GPIO_INIT(G0, IN),
- GPIO_INIT(G3, OUT0),
- GPIO_INIT(H0, OUT0),
- GPIO_INIT(H2, IN),
- GPIO_INIT(H3, OUT0),
- GPIO_INIT(H4, OUT0),
- GPIO_INIT(H5, IN),
- GPIO_INIT(H6, OUT0),
- GPIO_INIT(H7, OUT0),
- GPIO_INIT(I0, OUT0),
- GPIO_INIT(I1, IN),
- GPIO_INIT(I2, OUT0),
- GPIO_INIT(I3, OUT0),
- GPIO_INIT(K4, IN),
- GPIO_INIT(K5, OUT0),
- GPIO_INIT(K6, IN),
- GPIO_INIT(K7, OUT0),
- GPIO_INIT(L0, OUT0),
- GPIO_INIT(S4, OUT0),
- GPIO_INIT(S5, OUT0),
- GPIO_INIT(S6, OUT0),
- GPIO_INIT(S7, OUT0),
- GPIO_INIT(T0, OUT0),
- GPIO_INIT(T1, OUT0),
- GPIO_INIT(V1, OUT0),
- GPIO_INIT(V2, OUT0),
- GPIO_INIT(V5, OUT0),
- GPIO_INIT(V6, OUT0),
- GPIO_INIT(V7, OUT1),
- GPIO_INIT(X0, IN),
- GPIO_INIT(X1, IN),
- GPIO_INIT(X2, IN),
- GPIO_INIT(X3, IN),
- GPIO_INIT(X4, IN),
- GPIO_INIT(X5, IN),
- GPIO_INIT(X6, IN),
- GPIO_INIT(X7, IN),
- GPIO_INIT(Y1, IN),
- GPIO_INIT(Z0, IN),
- GPIO_INIT(Z4, OUT0),
- GPIO_INIT(BB2, OUT0),
- GPIO_INIT(BB3, OUT0),
- GPIO_INIT(CC1, IN),
- GPIO_INIT(CC6, IN),
- GPIO_INIT(CC7, OUT0),
+};
+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
- { \
.pingrp = PMUX_PINGRP_##_pingrp, \.func = PMUX_FUNC_##_mux, \.pull = PMUX_PULL_##_pull, \.tristate = PMUX_TRI_##_tri, \.io = PMUX_PIN_##_io, \.od = PMUX_PIN_OD_##_od, \.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \.lock = PMUX_PIN_LOCK_DEFAULT, \- }
+static const struct pmux_pingrp_config p2371_0000_pingrps[] = {
- /* pingrp, mux, pull, tri, e_input, od, e_io_hv */
- PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT,
DISABLE, HIGH),
- PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL,
INPUT, DISABLE, HIGH),
- PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT,
DISABLE, HIGH),
- PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT,
DISABLE, HIGH),
- PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL,
INPUT, DISABLE, HIGH),
- PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE,
DEFAULT),
- PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPI1_MOSI_PC0, SPI1, DOWN, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SPI1_MISO_PC1, SPI1, DOWN, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SPI1_SCK_PC2, SPI1, DOWN, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SPI1_CS0_PC3, SPI1, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(SPI1_CS1_PC4, SPI1, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(DMIC1_DAT_PE1, DMIC1, DOWN, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(DMIC2_DAT_PE3, DMIC2, DOWN, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT,
DISABLE, NORMAL),
- PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT,
DISABLE, NORMAL),
- PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT,
DISABLE, NORMAL),
- PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT,
DISABLE, NORMAL),
- PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT,
DISABLE, HIGH),
- PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT,
DISABLE, HIGH),
- PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PK0, I2S5B, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(PK1, I2S5B, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(PK2, I2S5B, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(PK3, I2S5B, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL,
INPUT, DISABLE, DEFAULT),
- PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL,
INPUT, DISABLE, DEFAULT),
- PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT,
DISABLE, NORMAL),
- PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT,
DISABLE, NORMAL),
- PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(TOUCH_CLK_PV7, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL,
INPUT, DISABLE, DEFAULT),
- PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL,
INPUT, DISABLE, DEFAULT),
- PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL,
INPUT, DISABLE, DEFAULT),
- PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT,
DISABLE, NORMAL),
- PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL,
INPUT, DISABLE, NORMAL),
- PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE,
DEFAULT),
- PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE,
DEFAULT),
- PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE,
OUTPUT, DISABLE, DEFAULT),
- PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT,
DISABLE, HIGH),
- PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL,
INPUT, DISABLE, NORMAL),
- PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT,
DISABLE, HIGH),
- PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE,
OUTPUT, DISABLE, NORMAL),
- PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT,
DISABLE, NORMAL),
- PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE,
DEFAULT),
- PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT,
DISABLE, DEFAULT),
- PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT,
DISABLE, DEFAULT),
- PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL,
OUTPUT, DISABLE, DEFAULT), +};
+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
- { \
.drvgrp = PMUX_DRVGRP_##_drvgrp, \.slwf = _slwf, \.slwr = _slwr, \.drvup = _drvup, \.drvdn = _drvdn, \.lpmd = PMUX_LPMD_##_lpmd, \.schmt = PMUX_SCHMT_##_schmt, \.hsm = PMUX_HSM_##_hsm, \- }
+static const struct pmux_drvgrp_config p2371_0000_drvgrps[] = { };
+#endif /* PINMUX_CONFIG_P2371_0000_H */ diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig new file mode 100644 index 000000000000..b2d0e83e3d96 --- /dev/null +++ b/configs/p2371-0000_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_TEGRA=y +CONFIG_TEGRA210=y +CONFIG_TARGET_P2371_0000=y +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h new file mode 100644 index 000000000000..e70c3c24e301 --- /dev/null +++ b/include/configs/p2371-0000.h @@ -0,0 +1,72 @@ +/*
- (C) Copyright 2013-2015
- NVIDIA Corporation <www.nvidia.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _P2371_0000_H +#define _P2371_0000_H
+#include <linux/sizes.h>
+/* enable PMIC */ +#define CONFIG_MAX77620_POWER
+#include "tegra210-common.h"
+/* High-level configuration options */ +#define V_PROMPT "Tegra210 (P2371-0000) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000"
+/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
+/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C
+/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC
+/* Environment in eMMC, at the end of 2nd "boot sector" */ #define +CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
+/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ +#define CONFIG_TEGRA114_SPI_CTRLS 6 +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20)
+/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB
+/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX
+/* General networking support */ +#define CONFIG_CMD_DHCP
+#include "tegra-common-usb-gadget.h" +#include "tegra-common-post.h"
+#define COUNTER_FREQUENCY 38400000
+#endif /* _P2371_0000_H */
1.9.1
LGTM otherwise
Tom -- nvpublic
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
Commit message?
From: Stephen Warren swarren@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra210-e2220-1170.dts | 58 +++++ arch/arm/mach-tegra/tegra210/Kconfig | 6 + board/nvidia/e2220-1170/Kconfig | 12 + board/nvidia/e2220-1170/MAINTAINERS | 6 + board/nvidia/e2220-1170/Makefile | 8 + board/nvidia/e2220-1170/e2220-1170.c | 48 ++++ board/nvidia/e2220-1170/pinmux-config-e2220-1170.h | 269 +++++++++++++++++++++ configs/e2220-1170_defconfig | 16 ++ include/configs/e2220-1170.h | 72 ++++++ 10 files changed, 496 insertions(+) create mode 100644 arch/arm/dts/tegra210-e2220-1170.dts create mode 100644 board/nvidia/e2220-1170/Kconfig create mode 100644 board/nvidia/e2220-1170/MAINTAINERS create mode 100644 board/nvidia/e2220-1170/Makefile create mode 100644 board/nvidia/e2220-1170/e2220-1170.c create mode 100644 board/nvidia/e2220-1170/pinmux-config-e2220-1170.h create mode 100644 configs/e2220-1170_defconfig create mode 100644 include/configs/e2220-1170.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ba6355379cba..d8e1841eb4d8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra124-jetson-tk1.dtb \ tegra124-nyan-big.dtb \ tegra124-venice2.dtb \
tegra210-e2220-1170.dtb \ tegra210-p2571.dtbdtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-sld3-ref.dtb \ diff --git a/arch/arm/dts/tegra210-e2220-1170.dts b/arch/arm/dts/tegra210-e2220-1170.dts new file mode 100644 index 000000000000..75efbba1061e --- /dev/null +++ b/arch/arm/dts/tegra210-e2220-1170.dts @@ -0,0 +1,58 @@ +/dts-v1/;
+#include "tegra210.dtsi"
+/ {
model = "NVIDIA E2220-1170";compatible = "nvidia,e2220-1170", "nvidia,tegra210";chosen {stdout-path = &uarta;};aliases {i2c0 = "/i2c@0,7000d000";sdhci0 = "/sdhci@0,700b0600";sdhci1 = "/sdhci@0,700b0000";usb0 = "/usb@0,7d000000";};memory {reg = <0x0 0x80000000 0x0 0xc0000000>;};sdhci@0,700b0000 {status = "okay";cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;bus-width = <4>;};sdhci@0,700b0600 {status = "okay";bus-width = <8>;};i2c@0,7000d000 {status = "okay";clock-frequency = <400000>;};usb@0,7d000000 {status = "okay";dr_mode = "peripheral";};clocks {compatible = "simple-bus";#address-cells = <1>;#size-cells = <0>;clk32k_in: clock@0 {compatible = "fixed-clock";reg = <0>;#clock-cells = <0>;clock-frequency = <32768>;};};+}; diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig index 147e6a83d722..9633ba8c629e 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -3,6 +3,11 @@ if TEGRA210 choice prompt "Tegra210 board select"
+config TARGET_E2220_1170
bool "NVIDIA Tegra210 E2220-1170 base board"helpE2220-1170 ERS
Er, description?
config TARGET_P2571 bool "NVIDIA Tegra210 P2571 base board" help @@ -13,6 +18,7 @@ endchoice config SYS_SOC default "tegra210"
+source "board/nvidia/e2220-1170/Kconfig" source "board/nvidia/p2571/Kconfig"
endif diff --git a/board/nvidia/e2220-1170/Kconfig b/board/nvidia/e2220-1170/Kconfig new file mode 100644 index 000000000000..0a30f4936223 --- /dev/null +++ b/board/nvidia/e2220-1170/Kconfig @@ -0,0 +1,12 @@ +if TARGET_E2220_1170
+config SYS_BOARD
default "e2220-1170"+config SYS_VENDOR
default "nvidia"+config SYS_CONFIG_NAME
default "e2220-1170"+endif diff --git a/board/nvidia/e2220-1170/MAINTAINERS b/board/nvidia/e2220-1170/MAINTAINERS new file mode 100644 index 000000000000..0abb37884018 --- /dev/null +++ b/board/nvidia/e2220-1170/MAINTAINERS @@ -0,0 +1,6 @@ +E2220-1170 BOARD +M: Tom Warren twarren@nvidia.com +S: Maintained +F: board/nvidia/e2220-1170/ +F: include/configs/e2220-1170.h +F: configs/e2220-1170_defconfig diff --git a/board/nvidia/e2220-1170/Makefile b/board/nvidia/e2220-1170/Makefile new file mode 100644 index 000000000000..c956b1972deb --- /dev/null +++ b/board/nvidia/e2220-1170/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2013-2015 +# NVIDIA Corporation <www.nvidia.com> +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y += e2220-1170.o diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c new file mode 100644 index 000000000000..b6976a227880 --- /dev/null +++ b/board/nvidia/e2220-1170/e2220-1170.c @@ -0,0 +1,48 @@ +/*
- (C) Copyright 2013-2015
- NVIDIA Corporation <www.nvidia.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <i2c.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include "pinmux-config-e2220-1170.h"
+void pin_mux_mmc(void) +{
struct udevice *dev;uchar val;int ret;/* Turn on MAX77620 LDO2 to 3.3V for SD card power */ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);if (ret) {printf("%s: Cannot find MAX77620 I2C chip\n", __func__);return;}val = 0xf2;ret = dm_i2c_write(dev, 0x27, &val, 1);if (ret)printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
Shouldn't this be in a PMIC driver?
+}
+/*
- Routine: pinmux_init
- Description: Do individual peripheral pinmux configs
- */
+void pinmux_init(void) +{
pinmux_clear_tristate_input_clamping();gpio_config_table(e2220_1170_gpio_inits,ARRAY_SIZE(e2220_1170_gpio_inits));pinmux_config_pingrp_table(e2220_1170_pingrps,ARRAY_SIZE(e2220_1170_pingrps));pinmux_config_drvgrp_table(e2220_1170_drvgrps,ARRAY_SIZE(e2220_1170_drvgrps));+} diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h new file mode 100644 index 000000000000..397dc7f44b11 --- /dev/null +++ b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h @@ -0,0 +1,269 @@ +/*
- Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _PINMUX_CONFIG_E2220_1170_H_ +#define _PINMUX_CONFIG_E2220_1170_H_
+#define GPIO_INIT(_gpio, _init) \
{ \.gpio = GPIO_P##_gpio, \.init = TEGRA_GPIO_INIT_##_init, \}+static const struct tegra_gpio_config e2220_1170_gpio_inits[] = {
/* gpio, init_val */GPIO_INIT(A5, IN),GPIO_INIT(A6, IN),GPIO_INIT(B4, IN),GPIO_INIT(E6, IN),GPIO_INIT(G2, OUT0),GPIO_INIT(G3, OUT0),GPIO_INIT(H0, OUT0),GPIO_INIT(H1, OUT0),GPIO_INIT(H2, IN),GPIO_INIT(H3, OUT0),GPIO_INIT(H4, OUT0),GPIO_INIT(H5, IN),GPIO_INIT(H6, OUT0),GPIO_INIT(H7, OUT0),GPIO_INIT(I0, OUT0),GPIO_INIT(I1, IN),GPIO_INIT(I2, OUT0),GPIO_INIT(I3, OUT0),GPIO_INIT(K0, IN),GPIO_INIT(K1, OUT0),GPIO_INIT(K2, OUT0),GPIO_INIT(K3, OUT0),GPIO_INIT(K4, IN),GPIO_INIT(K5, OUT0),GPIO_INIT(K6, IN),GPIO_INIT(K7, OUT0),GPIO_INIT(L0, OUT0),GPIO_INIT(S4, OUT0),GPIO_INIT(S5, OUT0),GPIO_INIT(S6, OUT0),GPIO_INIT(S7, OUT0),GPIO_INIT(T0, OUT0),GPIO_INIT(T1, OUT0),GPIO_INIT(V1, OUT0),GPIO_INIT(V2, OUT0),GPIO_INIT(V3, IN),GPIO_INIT(V5, OUT0),GPIO_INIT(V6, OUT0),GPIO_INIT(X0, IN),GPIO_INIT(X1, IN),GPIO_INIT(X2, IN),GPIO_INIT(X3, IN),GPIO_INIT(X4, IN),GPIO_INIT(X5, IN),GPIO_INIT(X6, IN),GPIO_INIT(X7, IN),GPIO_INIT(Y0, IN),GPIO_INIT(Y1, IN),GPIO_INIT(Z0, IN),GPIO_INIT(Z4, OUT0),GPIO_INIT(BB2, OUT0),GPIO_INIT(BB3, OUT0),GPIO_INIT(BB4, IN),GPIO_INIT(CC1, IN),GPIO_INIT(CC5, OUT0),GPIO_INIT(CC6, IN),GPIO_INIT(CC7, OUT0),+};
+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
{ \.pingrp = PMUX_PINGRP_##_pingrp, \.func = PMUX_FUNC_##_mux, \.pull = PMUX_PULL_##_pull, \.tristate = PMUX_TRI_##_tri, \.io = PMUX_PIN_##_io, \.od = PMUX_PIN_OD_##_od, \.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \.lock = PMUX_PIN_LOCK_DEFAULT, \}+static const struct pmux_pingrp_config e2220_1170_pingrps[] = {
Is this U-Boot code or is it auto-generated? If the latter, can you please add instructions here?
/* pingrp, mux, pull, tri, e_input, od, e_io_hv */PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT),PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL),PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),+};
+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
{ \.drvgrp = PMUX_DRVGRP_##_drvgrp, \.slwf = _slwf, \.slwr = _slwr, \.drvup = _drvup, \.drvdn = _drvdn, \.lpmd = PMUX_LPMD_##_lpmd, \.schmt = PMUX_SCHMT_##_schmt, \.hsm = PMUX_HSM_##_hsm, \}+static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = { +};
+#endif /* PINMUX_CONFIG_E2220_1170_H */ diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig new file mode 100644 index 000000000000..a31f5fa78a05 --- /dev/null +++ b/configs/e2220-1170_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_TEGRA=y +CONFIG_TEGRA210=y +CONFIG_TARGET_E2220_1170=y +CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h new file mode 100644 index 000000000000..49eb55ae4b29 --- /dev/null +++ b/include/configs/e2220-1170.h @@ -0,0 +1,72 @@ +/*
- (C) Copyright 2013-2015
- NVIDIA Corporation <www.nvidia.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _E2220_1170_H +#define _E2220_1170_H
+#include <linux/sizes.h>
+/* enable PMIC */ +#define CONFIG_MAX77620_POWER
+#include "tegra210-common.h"
+/* High-level configuration options */ +#define V_PROMPT "Tegra210 (E2220-1170) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA E2220-1170"
+/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
Do we need this still?
+/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C
+/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC
+/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
+/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */
I think this is in Kconfig now.
+#define CONFIG_TEGRA114_SPI_CTRLS 6
And this probably should be. What does it mean? I don't see it used anywhere.
+#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20)
+/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA
Kconfig I think.
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB
+/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX
+/* General networking support */ +#define CONFIG_CMD_DHCP
+#include "tegra-common-usb-gadget.h" +#include "tegra-common-post.h"
+#define COUNTER_FREQUENCY 38400000
+#endif /* _E2220_1170_H */
1.9.1
Regards, Simon
Simon,
I can respond to your Kconfig questions below.
-----Original Message----- From: sjg@google.com [mailto:sjg@google.com] On Behalf Of Simon Glass Sent: Wednesday, July 29, 2015 4:02 PM To: Stephen Warren Cc: U-Boot Mailing List; Tom Warren; Stephen Warren; Thierry Reding Subject: Re: [PATCH 1/2] ARM: tegra: Add e2220-1170 board
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
Commit message?
From: Stephen Warren swarren@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra210-e2220-1170.dts | 58 +++++ arch/arm/mach-tegra/tegra210/Kconfig | 6 + board/nvidia/e2220-1170/Kconfig | 12 + board/nvidia/e2220-1170/MAINTAINERS | 6 + board/nvidia/e2220-1170/Makefile | 8 + board/nvidia/e2220-1170/e2220-1170.c | 48 ++++ board/nvidia/e2220-1170/pinmux-config-e2220-1170.h | 269
+++++++++++++++++++++
configs/e2220-1170_defconfig | 16 ++ include/configs/e2220-1170.h | 72 ++++++ 10 files changed, 496 insertions(+) create mode 100644 arch/arm/dts/tegra210-e2220-1170.dts create mode 100644 board/nvidia/e2220-1170/Kconfig create mode 100644 board/nvidia/e2220-1170/MAINTAINERS create mode 100644 board/nvidia/e2220-1170/Makefile create mode 100644 board/nvidia/e2220-1170/e2220-1170.c create mode 100644 board/nvidia/e2220-1170/pinmux-config-e2220-1170.h create mode 100644 configs/e2220-1170_defconfig create mode 100644 include/configs/e2220-1170.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ba6355379cba..d8e1841eb4d8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra124-jetson-tk1.dtb \ tegra124-nyan-big.dtb \ tegra124-venice2.dtb \
tegra210-e2220-1170.dtb \ tegra210-p2571.dtbdtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-sld3-ref.dtb \ diff --git a/arch/arm/dts/tegra210-e2220-1170.dts b/arch/arm/dts/tegra210-e2220-1170.dts new file mode 100644 index 000000000000..75efbba1061e --- /dev/null +++ b/arch/arm/dts/tegra210-e2220-1170.dts @@ -0,0 +1,58 @@ +/dts-v1/;
+#include "tegra210.dtsi"
+/ {
model = "NVIDIA E2220-1170";compatible = "nvidia,e2220-1170", "nvidia,tegra210";chosen {stdout-path = &uarta;};aliases {i2c0 = "/i2c@0,7000d000";sdhci0 = "/sdhci@0,700b0600";sdhci1 = "/sdhci@0,700b0000";usb0 = "/usb@0,7d000000";};memory {reg = <0x0 0x80000000 0x0 0xc0000000>;};sdhci@0,700b0000 {status = "okay";cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;bus-width = <4>;};sdhci@0,700b0600 {status = "okay";bus-width = <8>;};i2c@0,7000d000 {status = "okay";clock-frequency = <400000>;};usb@0,7d000000 {status = "okay";dr_mode = "peripheral";};clocks {compatible = "simple-bus";#address-cells = <1>;#size-cells = <0>;clk32k_in: clock@0 {compatible = "fixed-clock";reg = <0>;#clock-cells = <0>;clock-frequency = <32768>;};};+}; diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig index 147e6a83d722..9633ba8c629e 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -3,6 +3,11 @@ if TEGRA210 choice prompt "Tegra210 board select"
+config TARGET_E2220_1170
bool "NVIDIA Tegra210 E2220-1170 base board"helpE2220-1170 ERSEr, description?
config TARGET_P2571 bool "NVIDIA Tegra210 P2571 base board" help @@ -13,6 +18,7 @@ endchoice config SYS_SOC default "tegra210"
+source "board/nvidia/e2220-1170/Kconfig" source "board/nvidia/p2571/Kconfig"
endif diff --git a/board/nvidia/e2220-1170/Kconfig b/board/nvidia/e2220-1170/Kconfig new file mode 100644 index 000000000000..0a30f4936223 --- /dev/null +++ b/board/nvidia/e2220-1170/Kconfig @@ -0,0 +1,12 @@ +if TARGET_E2220_1170
+config SYS_BOARD
default "e2220-1170"+config SYS_VENDOR
default "nvidia"+config SYS_CONFIG_NAME
default "e2220-1170"+endif diff --git a/board/nvidia/e2220-1170/MAINTAINERS b/board/nvidia/e2220-1170/MAINTAINERS new file mode 100644 index 000000000000..0abb37884018 --- /dev/null +++ b/board/nvidia/e2220-1170/MAINTAINERS @@ -0,0 +1,6 @@ +E2220-1170 BOARD +M: Tom Warren twarren@nvidia.com +S: Maintained +F: board/nvidia/e2220-1170/ +F: include/configs/e2220-1170.h +F: configs/e2220-1170_defconfig diff --git a/board/nvidia/e2220-1170/Makefile b/board/nvidia/e2220-1170/Makefile new file mode 100644 index 000000000000..c956b1972deb --- /dev/null +++ b/board/nvidia/e2220-1170/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2013-2015 +# NVIDIA Corporation <www.nvidia.com> # +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y += e2220-1170.o diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c new file mode 100644 index 000000000000..b6976a227880 --- /dev/null +++ b/board/nvidia/e2220-1170/e2220-1170.c @@ -0,0 +1,48 @@ +/*
- (C) Copyright 2013-2015
- NVIDIA Corporation <www.nvidia.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <i2c.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pinmux.h> +#include "pinmux-config-e2220-1170.h"
+void pin_mux_mmc(void) +{
struct udevice *dev;uchar val;int ret;/* Turn on MAX77620 LDO2 to 3.3V for SD card power */ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);if (ret) {printf("%s: Cannot find MAX77620 I2C chip\n", __func__);return;}val = 0xf2;ret = dm_i2c_write(dev, 0x27, &val, 1);if (ret)printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);Shouldn't this be in a PMIC driver?
+}
+/*
- Routine: pinmux_init
- Description: Do individual peripheral pinmux configs */ void
+pinmux_init(void) {
pinmux_clear_tristate_input_clamping();gpio_config_table(e2220_1170_gpio_inits,ARRAY_SIZE(e2220_1170_gpio_inits));pinmux_config_pingrp_table(e2220_1170_pingrps,ARRAY_SIZE(e2220_1170_pingrps));pinmux_config_drvgrp_table(e2220_1170_drvgrps,ARRAY_SIZE(e2220_1170_drvgrps)); }diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h new file mode 100644 index 000000000000..397dc7f44b11 --- /dev/null +++ b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h @@ -0,0 +1,269 @@ +/*
- Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _PINMUX_CONFIG_E2220_1170_H_ +#define _PINMUX_CONFIG_E2220_1170_H_
+#define GPIO_INIT(_gpio, _init) \
{ \.gpio = GPIO_P##_gpio, \.init = TEGRA_GPIO_INIT_##_init, \}+static const struct tegra_gpio_config e2220_1170_gpio_inits[] = {
/* gpio, init_val */GPIO_INIT(A5, IN),GPIO_INIT(A6, IN),GPIO_INIT(B4, IN),GPIO_INIT(E6, IN),GPIO_INIT(G2, OUT0),GPIO_INIT(G3, OUT0),GPIO_INIT(H0, OUT0),GPIO_INIT(H1, OUT0),GPIO_INIT(H2, IN),GPIO_INIT(H3, OUT0),GPIO_INIT(H4, OUT0),GPIO_INIT(H5, IN),GPIO_INIT(H6, OUT0),GPIO_INIT(H7, OUT0),GPIO_INIT(I0, OUT0),GPIO_INIT(I1, IN),GPIO_INIT(I2, OUT0),GPIO_INIT(I3, OUT0),GPIO_INIT(K0, IN),GPIO_INIT(K1, OUT0),GPIO_INIT(K2, OUT0),GPIO_INIT(K3, OUT0),GPIO_INIT(K4, IN),GPIO_INIT(K5, OUT0),GPIO_INIT(K6, IN),GPIO_INIT(K7, OUT0),GPIO_INIT(L0, OUT0),GPIO_INIT(S4, OUT0),GPIO_INIT(S5, OUT0),GPIO_INIT(S6, OUT0),GPIO_INIT(S7, OUT0),GPIO_INIT(T0, OUT0),GPIO_INIT(T1, OUT0),GPIO_INIT(V1, OUT0),GPIO_INIT(V2, OUT0),GPIO_INIT(V3, IN),GPIO_INIT(V5, OUT0),GPIO_INIT(V6, OUT0),GPIO_INIT(X0, IN),GPIO_INIT(X1, IN),GPIO_INIT(X2, IN),GPIO_INIT(X3, IN),GPIO_INIT(X4, IN),GPIO_INIT(X5, IN),GPIO_INIT(X6, IN),GPIO_INIT(X7, IN),GPIO_INIT(Y0, IN),GPIO_INIT(Y1, IN),GPIO_INIT(Z0, IN),GPIO_INIT(Z4, OUT0),GPIO_INIT(BB2, OUT0),GPIO_INIT(BB3, OUT0),GPIO_INIT(BB4, IN),GPIO_INIT(CC1, IN),GPIO_INIT(CC5, OUT0),GPIO_INIT(CC6, IN),GPIO_INIT(CC7, OUT0),+};
+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
{ \.pingrp = PMUX_PINGRP_##_pingrp, \.func = PMUX_FUNC_##_mux, \.pull = PMUX_PULL_##_pull, \.tristate = PMUX_TRI_##_tri, \.io = PMUX_PIN_##_io, \.od = PMUX_PIN_OD_##_od, \.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \.lock = PMUX_PIN_LOCK_DEFAULT, \}+static const struct pmux_pingrp_config e2220_1170_pingrps[] = {
Is this U-Boot code or is it auto-generated? If the latter, can you please add instructions here?
/* pingrp, mux, pull, tri, e_input, od, e_io_hv */PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT,DISABLE, NORMAL),
PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT,DISABLE, NORMAL),
PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL,INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL,INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL,INPUT, DISABLE, DEFAULT),
PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL,INPUT, DISABLE, DEFAULT),
PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT,DISABLE, NORMAL),
PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT,DISABLE, DEFAULT),
PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT,DISABLE, HIGH),
PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL,INPUT, DISABLE, NORMAL),
PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT,DISABLE, HIGH),
PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL,OUTPUT, DISABLE, NORMAL),
PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT,DISABLE, NORMAL),
PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT,DISABLE, DEFAULT),
PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE,DEFAULT),
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT,DISABLE, DEFAULT),
PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT,DISABLE, DEFAULT),
PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL,OUTPUT, DISABLE, DEFAULT),
+};
+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt,
_hsm) \
{ \.drvgrp = PMUX_DRVGRP_##_drvgrp, \.slwf = _slwf, \.slwr = _slwr, \.drvup = _drvup, \.drvdn = _drvdn, \.lpmd = PMUX_LPMD_##_lpmd, \.schmt = PMUX_SCHMT_##_schmt, \.hsm = PMUX_HSM_##_hsm, \}+static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = { };
+#endif /* PINMUX_CONFIG_E2220_1170_H */ diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig new file mode 100644 index 000000000000..a31f5fa78a05 --- /dev/null +++ b/configs/e2220-1170_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_TEGRA=y +CONFIG_TEGRA210=y +CONFIG_TARGET_E2220_1170=y +CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170" +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_SPL_DM=y +CONFIG_SPI_FLASH=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h new file mode 100644 index 000000000000..49eb55ae4b29 --- /dev/null +++ b/include/configs/e2220-1170.h @@ -0,0 +1,72 @@ +/*
- (C) Copyright 2013-2015
- NVIDIA Corporation <www.nvidia.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef _E2220_1170_H +#define _E2220_1170_H
+#include <linux/sizes.h>
+/* enable PMIC */ +#define CONFIG_MAX77620_POWER
+#include "tegra210-common.h"
+/* High-level configuration options */ +#define V_PROMPT "Tegra210 (E2220-1170) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA E2220-1170"
+/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
Do we need this still?
32-bit builds (i.e. w/SPL) still need this. I've removed it in a future patch for P2571.
+/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C
+/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC
+/* Environment in eMMC, at the end of 2nd "boot sector" */ #define +CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
+/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */
I think this is in Kconfig now.
True. I'll send a patch that fixes this for all T114/T124 builds, plus P2571.
+#define CONFIG_TEGRA114_SPI_CTRLS 6
And this probably should be. What does it mean? I don't see it used anywhere.
Unused, removed in same patch as above.
+#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20)
+/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA
Kconfig I think.
Sorry, don't see this in any Kconfig file.
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB
+/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX
+/* General networking support */ +#define CONFIG_CMD_DHCP
+#include "tegra-common-usb-gadget.h" +#include "tegra-common-post.h"
+#define COUNTER_FREQUENCY 38400000
+#endif /* _E2220_1170_H */
1.9.1
Regards, Simon
Tom -- nvpublic
(It'd be nice if all the irrelevant context could be trimmed so it was possible to quickly find the responses within the patch. As it is, there are about 5 lines of response in hundreds of lines of quoted patch, which makes it very easy to miss things and wastes time).
On 07/29/2015 08:42 PM, Tom Warren wrote:
Simon,
I can respond to your Kconfig questions below.
-----Original Message----- From: sjg@google.com [mailto:sjg@google.com] On Behalf Of Simon Glass Sent: Wednesday, July 29, 2015 4:02 PM To: Stephen Warren Cc: U-Boot Mailing List; Tom Warren; Stephen Warren; Thierry Reding Subject: Re: [PATCH 1/2] ARM: tegra: Add e2220-1170 board
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
diff --git a/include/configs/e2220-1170.h
+/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
Do we need this still?
32-bit builds (i.e. w/SPL) still need this. I've removed it in a future patch for P2571.
Is that a patch you've sent upstream; if so, which one was it? If it's been sent already, or even just pushed into a git server somewhere in a final form, I can apply it locally and align these new boards so they're consistent with the latest version of p2571.h etc.
The same response applies to the other Kconfig-related questions.
-----Original Message----- From: Stephen Warren [mailto:swarren@wwwdotorg.org] Sent: Thursday, July 30, 2015 11:03 AM To: Tom Warren; Simon Glass Cc: U-Boot Mailing List; Stephen Warren; Thierry Reding Subject: Re: [PATCH 1/2] ARM: tegra: Add e2220-1170 board
(It'd be nice if all the irrelevant context could be trimmed so it was possible to quickly find the responses within the patch. As it is, there are about 5 lines of response in hundreds of lines of quoted patch, which makes it very easy to miss things and wastes time).
On 07/29/2015 08:42 PM, Tom Warren wrote:
Simon,
I can respond to your Kconfig questions below.
-----Original Message----- From: sjg@google.com [mailto:sjg@google.com] On Behalf Of Simon Glass Sent: Wednesday, July 29, 2015 4:02 PM To: Stephen Warren Cc: U-Boot Mailing List; Tom Warren; Stephen Warren; Thierry Reding Subject: Re: [PATCH 1/2] ARM: tegra: Add e2220-1170 board
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org
wrote:
diff --git a/include/configs/e2220-1170.h
+/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1
NV_PA_APB_UARTA_BASE
Do we need this still?
32-bit builds (i.e. w/SPL) still need this. I've removed it in a future patch for
P2571.
Is that a patch you've sent upstream; if so, which one was it? If it's been sent already, or even just pushed into a git server somewhere in a final form, I can apply it locally and align these new boards so they're consistent with the latest version of p2571.h etc.
The same response applies to the other Kconfig-related questions.
Nope, not sent yet. Later today, I hope. I'll send you a copy after lunch.
Tom -- nvpublic
Hi Tom.
On 29 July 2015 at 20:42, Tom Warren TWarren@nvidia.com wrote:
Simon,
I can respond to your Kconfig questions below.
-----Original Message----- From: sjg@google.com [mailto:sjg@google.com] On Behalf Of Simon Glass Sent: Wednesday, July 29, 2015 4:02 PM To: Stephen Warren Cc: U-Boot Mailing List; Tom Warren; Stephen Warren; Thierry Reding Subject: Re: [PATCH 1/2] ARM: tegra: Add e2220-1170 board
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
Commit message?
From: Stephen Warren swarren@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra210-e2220-1170.dts | 58 +++++ arch/arm/mach-tegra/tegra210/Kconfig | 6 + board/nvidia/e2220-1170/Kconfig | 12 + board/nvidia/e2220-1170/MAINTAINERS | 6 + board/nvidia/e2220-1170/Makefile | 8 + board/nvidia/e2220-1170/e2220-1170.c | 48 ++++ board/nvidia/e2220-1170/pinmux-config-e2220-1170.h | 269
+++++++++++++++++++++
configs/e2220-1170_defconfig | 16 ++ include/configs/e2220-1170.h | 72 ++++++ 10 files changed, 496 insertions(+) create mode 100644 arch/arm/dts/tegra210-e2220-1170.dts create mode 100644 board/nvidia/e2220-1170/Kconfig create mode 100644 board/nvidia/e2220-1170/MAINTAINERS create mode 100644 board/nvidia/e2220-1170/Makefile create mode 100644 board/nvidia/e2220-1170/e2220-1170.c create mode 100644 board/nvidia/e2220-1170/pinmux-config-e2220-1170.h create mode 100644 configs/e2220-1170_defconfig create mode 100644 include/configs/e2220-1170.h
[snip]
+/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C
+/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC
+/* Environment in eMMC, at the end of 2nd "boot sector" */ #define +CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
+/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */
I think this is in Kconfig now.
True. I'll send a patch that fixes this for all T114/T124 builds, plus P2571.
OK. BTW I think it's fine to do these sorts of clean-ups in separate patches to be applied later, particular as you have other boards that need adjusting.
+#define CONFIG_TEGRA114_SPI_CTRLS 6
And this probably should be. What does it mean? I don't see it used anywhere.
Unused, removed in same patch as above.
+#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20)
+/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA
Kconfig I think.
Sorry, don't see this in any Kconfig file.
CONFIG_USB_EHCI is there, but USB_EHCI_TEGRA - it would be good if you could convert it!
[snip]
Regards, Simon
On 07/29/2015 05:02 PM, Simon Glass wrote:
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
Commit message?
I guess I can add one, but there really much useful additional information I can give.
I've also been "guilty" of pushing for commit messages for cases like this, but I wonder if we shouldn't just consider the commit subject as part of the overall description and hence allow empty commit descriptions when they won't add anything?
Anyway, since I'm likely to spin the patch for e2220-1170.h at least, I can add something.
diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig
+config TARGET_E2220_1170
bool "NVIDIA Tegra210 E2220-1170 base board"helpE2220-1170 ERSEr, description?
The text after "bool" is the description. There's no help text sure, but there's not really any useful information I can give beyond the board model. It's obvious that this option selects support for a particular board since (a) it's in a board selection menu/choice stanza and (b) the message after "bool" says so. The board ID is all anyone should need in order to enable support for the board they have. I'm prohibited by NVIDIA from listing any alternate names the board has. I don't think it's useful to list details of the HW attached to the board; most boards have roughly the same devices, and I don't think Kconfig should be used as any kind of sales pitch/advertizing.
Do you have an example of a useful help text could put here?
diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c
+void pin_mux_mmc(void) +{
struct udevice *dev;uchar val;int ret;/* Turn on MAX77620 LDO2 to 3.3V for SD card power */ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);if (ret) {printf("%s: Cannot find MAX77620 I2C chip\n", __func__);return;}val = 0xf2;ret = dm_i2c_write(dev, 0x27, &val, 1);if (ret)printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);Shouldn't this be in a PMIC driver?
I think the overall amount of code contained in U-Boot ends up being a lot smaller this way; it simply and directly performs some necessary I2C writes, and V2 contains better comments describing the operation. This avoids all the overhead of creating a PMIC driver and instantiating it etc. This code is also consistent in style with many other Tegra boards. I'm rather inclined to leave this as-is unless there's some particular advantage you can state to creating a PMIC driver (I had thought of that original, but shied away from the large overhead/infrastructure involved with that.)
diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h
Is this U-Boot code or is it auto-generated? If the latter, can you please add instructions here?
Can I add that as a followon patch that fixes this for all boards; there are many pre-existing cases where the same comment would apply.
Hi Stephen,
On 30 July 2015 at 12:13, Stephen Warren swarren@wwwdotorg.org wrote:
On 07/29/2015 05:02 PM, Simon Glass wrote:
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
Commit message?
I guess I can add one, but there really much useful additional information I can give.
I've also been "guilty" of pushing for commit messages for cases like this, but I wonder if we shouldn't just consider the commit subject as part of the overall description and hence allow empty commit descriptions when they won't add anything?
Then why apply the patch? There needs to be some basic motivation. I think in this case it should mention what the board is at least.
Anyway, since I'm likely to spin the patch for e2220-1170.h at least, I can add something.
diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig
+config TARGET_E2220_1170
bool "NVIDIA Tegra210 E2220-1170 base board"helpE2220-1170 ERSEr, description?
The text after "bool" is the description. There's no help text sure, but there's not really any useful information I can give beyond the board model. It's obvious that this option selects support for a particular board since (a) it's in a board selection menu/choice stanza and (b) the message after "bool" says so. The board ID is all anyone should need in order to enable support for the board they have. I'm prohibited by NVIDIA from listing any alternate names the board has. I don't think it's useful to list details of the HW attached to the board; most boards have roughly the same devices, and I don't think Kconfig should be used as any kind of sales pitch/advertizing.
You could mention that it is a Tegra210 development board with MMC, LCD, 2 USB 3 ports, etc. etc. I think that is useful and it only takes a minute.
Do you have an example of a useful help text could put here?
diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c
+void pin_mux_mmc(void) +{
struct udevice *dev;uchar val;int ret;/* Turn on MAX77620 LDO2 to 3.3V for SD card power */ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);if (ret) {printf("%s: Cannot find MAX77620 I2C chip\n", __func__);return;}val = 0xf2;ret = dm_i2c_write(dev, 0x27, &val, 1);if (ret)printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);Shouldn't this be in a PMIC driver?
I think the overall amount of code contained in U-Boot ends up being a lot smaller this way; it simply and directly performs some necessary I2C writes, and V2 contains better comments describing the operation. This avoids all the overhead of creating a PMIC driver and instantiating it etc. This code is also consistent in style with many other Tegra boards. I'm rather inclined to leave this as-is unless there's some particular advantage you can state to creating a PMIC driver (I had thought of that original, but shied away from the large overhead/infrastructure involved with that.)
If this is the only write that happens to the PMIC then that is fine. But when you add other things, won't we need to adjust more things?
diff --git a/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h b/board/nvidia/e2220-1170/pinmux-config-e2220-1170.h
Is this U-Boot code or is it auto-generated? If the latter, can you please add instructions here?
Can I add that as a followon patch that fixes this for all boards; there are many pre-existing cases where the same comment would apply.
You should get these patches in however you wish and follow-up clean-ups seem fine to me.
Regards, Simon
On 07/30/2015 12:23 PM, Simon Glass wrote:
Hi Stephen,
On 30 July 2015 at 12:13, Stephen Warren swarren@wwwdotorg.org wrote:
On 07/29/2015 05:02 PM, Simon Glass wrote:
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c
+void pin_mux_mmc(void) +{
struct udevice *dev;uchar val;int ret;/* Turn on MAX77620 LDO2 to 3.3V for SD card power */ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);if (ret) {printf("%s: Cannot find MAX77620 I2C chip\n", __func__);return;}val = 0xf2;ret = dm_i2c_write(dev, 0x27, &val, 1);if (ret)printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);Shouldn't this be in a PMIC driver?
I think the overall amount of code contained in U-Boot ends up being a lot smaller this way; it simply and directly performs some necessary I2C writes, and V2 contains better comments describing the operation. This avoids all the overhead of creating a PMIC driver and instantiating it etc. This code is also consistent in style with many other Tegra boards. I'm rather inclined to leave this as-is unless there's some particular advantage you can state to creating a PMIC driver (I had thought of that original, but shied away from the large overhead/infrastructure involved with that.)
If this is the only write that happens to the PMIC then that is fine. But when you add other things, won't we need to adjust more things?
I believe for the set of peripherals we're likely to support in U-Boot, this is enough. On the off-chance we add HDMI or USB3 host support, perhaps we'll need more regulators, but that's not something that's likely to happen soon.
On Thu, Jul 30, 2015 at 12:13:06PM -0600, Stephen Warren wrote:
On 07/29/2015 05:02 PM, Simon Glass wrote:
Hi Stephen,
On 29 July 2015 at 13:48, Stephen Warren swarren@wwwdotorg.org wrote:
Commit message?
I guess I can add one, but there really much useful additional information I can give.
I've also been "guilty" of pushing for commit messages for cases like this, but I wonder if we shouldn't just consider the commit subject as part of the overall description and hence allow empty commit descriptions when they won't add anything?
Anyway, since I'm likely to spin the patch for e2220-1170.h at least, I can add something.
FWIW, here's the commit message from the Linux kernel commit that I've queued up for P2371:
arm64: tegra: Add NVIDIA P2371 support
The NVIDIA P2371 is an internal reference design that uses a P2530 compute module hooked up to a P2595 base board and an optional display module for a 1200x1920 MIPI DSI panel.
and here's the one for P2595:
arm64: tegra: Add NVIDIA P2595 base board support
The NVIDIA P2595 base board is used in several reference designs and provides the connectors to connect the P2530 compute module to the outside world. It features a USB 3.0 network adapter, a USB 3.0 port, an HDMI port, a SATA port, an audio codec, a microSD card slot and a display connector, among others.
and finally for P2530:
arm64: tegra: Add NVIDIA P2530 compute module support
The NVIDIA P2530 is a compute module used in several reference designs. It features a Tegra210 SoC, 4 GiB of LPDDR4 RAM, 16 GiB eMMC and various other essentials. It is typically connected to some base board that provides the connectors needed to hook it up to the outside world.
This doesn't go into a lot of detail, but I think it's nice to give people some amount of information about what kind of board this is. It shows the capabilities, which I think is vital if we want people to actually use Tegra. With this kind of information people may actually start being interested in the device. If we don't have any information at all, people are likely going to ignore the board.
Thierry
participants (4)
-
Simon Glass -
Stephen Warren -
Thierry Reding -
Tom Warren