[U-Boot] [PATCH 0/6] arm: socfpga: convert drivers to dm livetree
This series converts (hopefully) all drivers used in socfpga to livetree so that none of them references 'gd' any more (with the exception of some a10/s10 drivers that should be fixed).
Simon Goldschmidt (6): timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTR spi: cadence_qspi: convert to livetree spi: designware: convert to livetree serial: altera_uart: convert to livetree reset: socfpga: covnert to livetree gpio: dwapb_gpio: convert to livetree
drivers/gpio/dwapb_gpio.c | 25 ++++++++++------------ drivers/reset/reset-socfpga.c | 4 +--- drivers/serial/altera_uart.c | 5 +---- drivers/spi/cadence_qspi.c | 39 +++++++++++++++++------------------ drivers/spi/designware_spi.c | 8 ++----- drivers/timer/dw-apb-timer.c | 2 -- 6 files changed, 34 insertions(+), 49 deletions(-)
The dw-apb timer does not use 'gd', so remove its declaration.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/timer/dw-apb-timer.c | 2 -- 1 file changed, 2 deletions(-)
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index cb48801af1..86312b8dc7 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -17,8 +17,6 @@ #define DW_APB_CURR_VAL 0x4 #define DW_APB_CTRL 0x8
-DECLARE_GLOBAL_DATA_PTR; - struct dw_apb_timer_priv { fdt_addr_t regs; };
On Thu, 9 May 2019 at 14:12, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
The dw-apb timer does not use 'gd', so remove its declaration.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
drivers/timer/dw-apb-timer.c | 2 -- 1 file changed, 2 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to read flash (child node) parameters.
Tested on socfpga_socrates (socfpga gen5).
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/spi/cadence_qspi.c | 39 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 41c87004d8..e2e54cd277 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -18,8 +18,6 @@ #define CQSPI_INDIRECT_READ 2 #define CQSPI_INDIRECT_WRITE 3
-DECLARE_GLOBAL_DATA_PTR; - static int cadence_spi_write_speed(struct udevice *bus, uint hz) { struct cadence_spi_platdata *plat = bus->platdata; @@ -295,36 +293,37 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen, static int cadence_spi_ofdata_to_platdata(struct udevice *bus) { struct cadence_spi_platdata *plat = bus->platdata; - const void *blob = gd->fdt_blob; - int node = dev_of_offset(bus); - int subnode; + ofnode subnode;
plat->regbase = (void *)devfdt_get_addr_index(bus, 0); plat->ahbbase = (void *)devfdt_get_addr_index(bus, 1); - plat->is_decoded_cs = fdtdec_get_bool(blob, node, "cdns,is-decoded-cs"); - plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128); - plat->fifo_width = fdtdec_get_uint(blob, node, "cdns,fifo-width", 4); - plat->trigger_address = fdtdec_get_uint(blob, node, - "cdns,trigger-address", 0); + plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs"); + plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128); + plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4); + plat->trigger_address = dev_read_u32_default(bus, + "cdns,trigger-address", + 0);
/* All other paramters are embedded in the child node */ - subnode = fdt_first_subnode(blob, node); - if (subnode < 0) { + subnode = dev_read_first_subnode(bus); + if (!ofnode_valid(subnode)) { printf("Error: subnode with SPI flash config missing!\n"); return -ENODEV; }
/* Use 500 KHz as a suitable default */ - plat->max_hz = fdtdec_get_uint(blob, subnode, "spi-max-frequency", - 500000); + plat->max_hz = ofnode_read_u32_default(subnode, "spi-max-frequency", + 500000);
/* Read other parameters from DT */ - plat->page_size = fdtdec_get_uint(blob, subnode, "page-size", 256); - plat->block_size = fdtdec_get_uint(blob, subnode, "block-size", 16); - plat->tshsl_ns = fdtdec_get_uint(blob, subnode, "cdns,tshsl-ns", 200); - plat->tsd2d_ns = fdtdec_get_uint(blob, subnode, "cdns,tsd2d-ns", 255); - plat->tchsh_ns = fdtdec_get_uint(blob, subnode, "cdns,tchsh-ns", 20); - plat->tslch_ns = fdtdec_get_uint(blob, subnode, "cdns,tslch-ns", 20); + plat->page_size = ofnode_read_u32_default(subnode, "page-size", 256); + plat->block_size = ofnode_read_u32_default(subnode, "block-size", 16); + plat->tshsl_ns = ofnode_read_u32_default(subnode, "cdns,tshsl-ns", + 200); + plat->tsd2d_ns = ofnode_read_u32_default(subnode, "cdns,tsd2d-ns", + 255); + plat->tchsh_ns = ofnode_read_u32_default(subnode, "cdns,tchsh-ns", 20); + plat->tslch_ns = ofnode_read_u32_default(subnode, "cdns,tslch-ns", 20);
debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n", __func__, plat->regbase, plat->ahbbase, plat->max_hz,
Convert 'dw_spi_ofdata_to_platdata' to use 'dev_read_u32_default' instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/spi/designware_spi.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index dadb6fa18b..7d58cfae55 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -22,8 +22,6 @@ #include <linux/iopoll.h> #include <asm/io.h>
-DECLARE_GLOBAL_DATA_PTR; - /* Register offsets */ #define DW_SPI_CTRL0 0x00 #define DW_SPI_CTRL1 0x04 @@ -155,14 +153,12 @@ static int request_gpio_cs(struct udevice *bus) static int dw_spi_ofdata_to_platdata(struct udevice *bus) { struct dw_spi_platdata *plat = bus->platdata; - const void *blob = gd->fdt_blob; - int node = dev_of_offset(bus);
plat->regs = (struct dw_spi *)devfdt_get_addr(bus);
/* Use 500KHz as a suitable default */ - plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", - 500000); + plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", + 500000); debug("%s: regs=%p max-frequency=%d\n", __func__, plat->regs, plat->frequency);
Convert 'altera_uart_ofdata_to_platdata' to use 'dev_read_u32_default' instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/serial/altera_uart.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index 67d47199aa..436cf2331d 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -10,8 +10,6 @@ #include <serial.h> #include <asm/io.h>
-DECLARE_GLOBAL_DATA_PTR; - /* status register */ #define ALTERA_UART_TMT BIT(5) /* tx empty */ #define ALTERA_UART_TRDY BIT(6) /* tx ready */ @@ -91,8 +89,7 @@ static int altera_uart_ofdata_to_platdata(struct udevice *dev) plat->regs = map_physmem(devfdt_get_addr(dev), sizeof(struct altera_uart_regs), MAP_NOCACHE); - plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "clock-frequency", 0); + plat->uartclk = dev_read_u32_default(dev, "clock-frequency", 0);
return 0; }
On Thu, 9 May 2019 at 14:12, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
Convert 'altera_uart_ofdata_to_platdata' to use 'dev_read_u32_default' instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
drivers/serial/altera_uart.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
Convert 'socfpga_reset_probe' to use 'dev_read_u32_default' instead of 'fdtdec_get_int'.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/reset/reset-socfpga.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c index cb8312619f..ee4cbcb02f 100644 --- a/drivers/reset/reset-socfpga.c +++ b/drivers/reset/reset-socfpga.c @@ -107,14 +107,12 @@ static const struct reset_ops socfpga_reset_ops = { static int socfpga_reset_probe(struct udevice *dev) { struct socfpga_reset_data *data = dev_get_priv(dev); - const void *blob = gd->fdt_blob; - int node = dev_of_offset(dev); u32 modrst_offset; void __iomem *membase;
membase = devfdt_get_addr_ptr(dev);
- modrst_offset = fdtdec_get_int(blob, node, "altr,modrst-offset", 0x10); + modrst_offset = dev_read_u32_default(dev, "altr,modrst-offset", 0x10); data->modrst_base = membase + modrst_offset;
return 0;
Convert 'gpio_dwapb_bind' to iterate over subnodes using livetree functions (inspired from mt7621_gpio.c).
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/gpio/dwapb_gpio.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c index e55fb4ac73..04a2381acd 100644 --- a/drivers/gpio/dwapb_gpio.c +++ b/drivers/gpio/dwapb_gpio.c @@ -17,8 +17,6 @@ #include <errno.h> #include <reset.h>
-DECLARE_GLOBAL_DATA_PTR; - #define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc) #define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc) #define GPIO_INTEN 0x30 @@ -150,10 +148,10 @@ static int gpio_dwapb_probe(struct udevice *dev) static int gpio_dwapb_bind(struct udevice *dev) { struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); - const void *blob = gd->fdt_blob; struct udevice *subdev; fdt_addr_t base; - int ret, node, bank = 0; + int ret, bank = 0; + ofnode node;
/* If this is a child device, there is nothing to do here */ if (plat) @@ -165,10 +163,9 @@ static int gpio_dwapb_bind(struct udevice *dev) return -ENXIO; }
- for (node = fdt_first_subnode(blob, dev_of_offset(dev)); - node > 0; - node = fdt_next_subnode(blob, node)) { - if (!fdtdec_get_bool(blob, node, "gpio-controller")) + for (node = dev_read_first_subnode(dev); ofnode_valid(node); + node = dev_read_next_subnode(node)) { + if (!ofnode_read_bool(node, "gpio-controller")) continue;
plat = devm_kcalloc(dev, 1, sizeof(*plat), GFP_KERNEL); @@ -177,15 +174,15 @@ static int gpio_dwapb_bind(struct udevice *dev)
plat->base = base; plat->bank = bank; - plat->pins = fdtdec_get_int(blob, node, "snps,nr-gpios", 0); - plat->name = fdt_stringlist_get(blob, node, "bank-name", 0, - NULL); - if (!plat->name) { + plat->pins = ofnode_read_u32_default(node, "snps,nr-gpios", 0); + + if (ofnode_read_string_index(node, "bank-name", 0, + &plat->name)) { /* * Fall back to node name. This means accessing pins * via bank name won't work. */ - plat->name = fdt_get_name(blob, node, NULL); + plat->name = ofnode_get_name(node); }
ret = device_bind(dev, dev->driver, plat->name, @@ -193,7 +190,7 @@ static int gpio_dwapb_bind(struct udevice *dev) if (ret) return ret;
- dev_set_of_offset(subdev, node); + dev->node = node; bank++; }
On 5/9/19 10:11 PM, Simon Goldschmidt wrote:
This series converts (hopefully) all drivers used in socfpga to livetree so that none of them references 'gd' any more (with the exception of some a10/s10 drivers that should be fixed).
Simon Goldschmidt (6): timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTR spi: cadence_qspi: convert to livetree spi: designware: convert to livetree serial: altera_uart: convert to livetree reset: socfpga: covnert to livetree gpio: dwapb_gpio: convert to livetree
drivers/gpio/dwapb_gpio.c | 25 ++++++++++------------ drivers/reset/reset-socfpga.c | 4 +--- drivers/serial/altera_uart.c | 5 +---- drivers/spi/cadence_qspi.c | 39 +++++++++++++++++------------------ drivers/spi/designware_spi.c | 8 ++----- drivers/timer/dw-apb-timer.c | 2 -- 6 files changed, 34 insertions(+), 49 deletions(-)
Applied, thanks
participants (3)
-
Marek Vasut -
Simon Glass -
Simon Goldschmidt