[U-Boot] [Patch v2 1/2] driver: net: ldpaa_eth: Add PHY-less SGMII support
In case of PHY-less mode, there is no interaction with PHY so auto-neg etc is not required and link will have fixed attributes
Signed-off-by: Ashish Kumar Ashish.Kumar@nxp.com Signed-off-by: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com --- v2: Add dependent patch set
drivers/net/ldpaa_eth/ldpaa_eth.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index 21be79a..85e7faa 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -440,12 +440,17 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) bus = wriop_get_mdio(priv->dpmac_id); enet_if = wriop_get_enet_if(priv->dpmac_id); if ((bus == NULL) && - (enet_if == PHY_INTERFACE_MODE_XGMII)) { + ((enet_if == PHY_INTERFACE_MODE_XGMII) || + (enet_if == PHY_INTERFACE_MODE_SGMII))) { priv->phydev = (struct phy_device *) malloc(sizeof(struct phy_device)); memset(priv->phydev, 0, sizeof(struct phy_device));
- priv->phydev->speed = SPEED_10000; + if (enet_if == PHY_INTERFACE_MODE_XGMII) + priv->phydev->speed = SPEED_10000; + else + priv->phydev->speed = SPEED_1000; + priv->phydev->link = 1; priv->phydev->duplex = DUPLEX_FULL; }
Signed-off-by: Ashish Kumar Ashish.Kumar@nxp.com --- v2: Add dependent patch set
README | 6 ++++++ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 +++++++ board/freescale/ls1088a/eth_ls1088aqds.c | 7 +++++++ 3 files changed, 20 insertions(+)
diff --git a/README b/README index f288176..8508d17 100644 --- a/README +++ b/README @@ -3475,6 +3475,12 @@ Low Level (hardware related) configuration options: Note that this is a global option, we can't have one FEC in standard MII mode and another in RMII mode.
+- CONFIG_SGMII_PHYLIB + Enable SGMII with PHY mode. + SGMII interface should have on-board PHY or PHY on riser-card. + Disabling this option gives flexibility to use non-PHY + SGMII interface + - CONFIG_CRC32_VERIFY Add a verify option to the crc32 command. The syntax is: diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5daf79e..46813ba 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -479,6 +479,13 @@ config SYS_FSL_HAS_RGMII bool depends on SYS_FSL_EC1 || SYS_FSL_EC2
+config SGMII_PHYLIB + bool "SGMII PHY LIB" + depends on ARCH_LS1088A + default y if TARGET_LS1088AQDS + help + SGMII interface can be PHY-less or with PHY. + By default it is configured with PHY
config SYS_MC_RSV_MEM_ALIGN hex "Management Complex reserved memory alignment" diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index 7fe446e..5466c81 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -462,7 +462,10 @@ static void initialize_dpmac_to_slot(void)
void ls1088a_handle_phy_interface_sgmii(int dpmac_id) { +#ifdef CONFIG_SGMII_PHYLIB struct mii_dev *bus; +#endif + struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; u32 serdes1_prtcl, cfg;
@@ -508,8 +511,12 @@ void ls1088a_handle_phy_interface_sgmii(int dpmac_id) return; } dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; + +#ifdef CONFIG_SGMII_PHYLIB bus = mii_dev_for_muxval(EMI1_SLOT1); wriop_set_mdio(dpmac_id, bus); +#endif + }
void ls1088a_handle_phy_interface_qsgmii(int dpmac_id)
Hello Joe, York,
Any comments on V2 series?
http://patchwork.ozlabs.org/project/uboot/list/?series=13261
Regards
Ashish
________________________________ From: Ashish Kumar Ashish.Kumar@nxp.com Sent: Monday, November 13, 2017 3:07 PM To: u-boot@lists.denx.de Cc: York Sun; joe.hershberger@ni.com; Ashish Kumar; Prabhakar Kushwaha Subject: [Patch v2 1/2] driver: net: ldpaa_eth: Add PHY-less SGMII support
In case of PHY-less mode, there is no interaction with PHY so auto-neg etc is not required and link will have fixed attributes
Signed-off-by: Ashish Kumar Ashish.Kumar@nxp.com Signed-off-by: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com --- v2: Add dependent patch set
drivers/net/ldpaa_eth/ldpaa_eth.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index 21be79a..85e7faa 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -440,12 +440,17 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) bus = wriop_get_mdio(priv->dpmac_id); enet_if = wriop_get_enet_if(priv->dpmac_id); if ((bus == NULL) && - (enet_if == PHY_INTERFACE_MODE_XGMII)) { + ((enet_if == PHY_INTERFACE_MODE_XGMII) || + (enet_if == PHY_INTERFACE_MODE_SGMII))) { priv->phydev = (struct phy_device *) malloc(sizeof(struct phy_device)); memset(priv->phydev, 0, sizeof(struct phy_device));
- priv->phydev->speed = SPEED_10000; + if (enet_if == PHY_INTERFACE_MODE_XGMII) + priv->phydev->speed = SPEED_10000; + else + priv->phydev->speed = SPEED_1000; + priv->phydev->link = 1; priv->phydev->duplex = DUPLEX_FULL; } -- 2.7.4
On 11/29/2017 09:45 PM, Ashish Kumar wrote:
Hello Joe, York,
Any comments on V2 series?
Ashish,
I can't see if this set is correct. Did you look into the similar PHY-less situation for Power-based platform? We don't have PHY-less SGMII support there. I was hoping you can add the same.
York
On Mon, Nov 13, 2017 at 3:37 AM, Ashish Kumar Ashish.Kumar@nxp.com wrote:
In case of PHY-less mode, there is no interaction with PHY so auto-neg etc is not required and link will have fixed attributes
It appears that the commit message does not match the code. It appears you are adding SGMII support. I don't see any thing that would affect auto-neg. Please either correct the patch or make the message more clear.
Thanks, -Joe
participants (4)
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Ashish Kumar -
Ashish Kumar
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Joe Hershberger -
York Sun