[PATCH 0/2] phycore-imx8mp: Add support for SPI NOR flash

Add support for flashing and booting from spi nor flash.
Signed-off-by: Benjamin Hahn B.Hahn@phytec.de --- Benjamin Hahn (2): configs: phycore-imx8mp_defconfig: Enable SPI NOR flash support board: phytec: phycore_imx8mp: Add mtd spi partitions
board/phytec/phycore_imx8mp/phycore-imx8mp.c | 34 ++++++++++++++++++++++++++ board/phytec/phycore_imx8mp/phycore_imx8mp.env | 4 +++ configs/phycore-imx8mp_defconfig | 24 ++++++++++++++++++ 3 files changed, 62 insertions(+) --- base-commit: ee2af844ba1b27b2e959c4e649e4b769fbeb4074 change-id: 20240826-wip-bhahn-add_qspi_support-61200b09e4eb
Best regards,

Enable SPI NOR flash support in U-Boot.
Signed-off-by: Benjamin Hahn B.Hahn@phytec.de --- configs/phycore-imx8mp_defconfig | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 63f8a80ba994..7f6e6c67bfd2 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -6,8 +6,10 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_PHYTEC_SOM_DETECTION=y +CONFIG_SF_DEFAULT_SPEED=80000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3C0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk" @@ -29,7 +31,9 @@ CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_FDT_FIXUP_PARTITIONS=y CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 @@ -48,7 +52,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 # CONFIG_SPL_CRYPTO is not set CONFIG_SPL_I2C=y +CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " @@ -64,6 +70,8 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y @@ -77,10 +85,12 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 @@ -113,6 +123,17 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_TI_DP83867=y CONFIG_DM_ETH_PHY=y @@ -134,6 +155,9 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y

Depending on if a SPI-NOR flash is populated add the mtd partition table to the device tree. For this we have to also probe the flash before booting.
Signed-off-by: Benjamin Hahn B.Hahn@phytec.de --- board/phytec/phycore_imx8mp/phycore-imx8mp.c | 34 ++++++++++++++++++++++++++ board/phytec/phycore_imx8mp/phycore_imx8mp.env | 4 +++ 2 files changed, 38 insertions(+)
diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c b/board/phytec/phycore_imx8mp/phycore-imx8mp.c index ef9513618449..bf2d5ce01fa5 100644 --- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c +++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c @@ -10,10 +10,34 @@ #include <asm/mach-imx/boot_mode.h> #include <env.h> #include <init.h> +#include <fdt_support.h> +#include <jffs2/load_kernel.h> #include <miiphy.h> +#include <mtd_node.h> + +#include "../common/imx8m_som_detection.h"
DECLARE_GLOBAL_DATA_PTR;
+#define EEPROM_ADDR 0x51 +#define EEPROM_ADDR_FALLBACK 0x59 + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + u8 spi = phytec_get_imx8m_spi(NULL); + /* Do nothing if no SPI is populated */ + if (!spi) + return 0; + + static const struct node_info nodes[] = { + { "jedec,spi-nor", MTD_DEV_TYPE_NOR, }, + }; + + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); + + return 0; +} + static int setup_fec(void) { struct iomuxc_gpr_base_regs *gpr = @@ -27,6 +51,11 @@ static int setup_fec(void)
int board_init(void) { + int ret = phytec_eeprom_data_setup_fallback(NULL, 0, + EEPROM_ADDR, EEPROM_ADDR_FALLBACK); + if (ret) + printf("%s: EEPROM data init failed\n", __func__); + setup_fec();
return 0; @@ -39,6 +68,11 @@ int board_mmc_get_env_dev(int devno)
int board_late_init(void) { + u8 spi = phytec_get_imx8m_spi(NULL); + + if (spi != 0 && spi != PHYTEC_EEPROM_INVAL) + env_set("spiprobe", "sf probe"); + switch (get_boot_device()) { case SD2_BOOT: env_set_ulong("mmcdev", 1); diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env b/board/phytec/phycore_imx8mp/phycore_imx8mp.env index f8f878e8f3a6..e5b49756132a 100644 --- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env +++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env @@ -7,6 +7,7 @@ bootcmd= fi; mmc dev ${mmcdev}; if mmc rescan; then + run spiprobe; if test ${doraucboot} = 1; then run raucinit; fi; @@ -27,6 +28,9 @@ fdt_addr_r=0x48000000 fdtfile=CONFIG_DEFAULT_FDT_FILE image=Image ip_dyn=yes +mtdparts=30bb0000.spi:3840k(u-boot),128k(env),128k(env_redund),-(none) +mtdids=nor0=30bb0000.spi +spiprobe=true loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} mmcargs=

On Mon, Aug 26, 2024 at 1:49 PM Benjamin Hahn B.Hahn@phytec.de wrote:
Add support for flashing and booting from spi nor flash.
Signed-off-by: Benjamin Hahn B.Hahn@phytec.de
Benjamin Hahn (2): configs: phycore-imx8mp_defconfig: Enable SPI NOR flash support board: phytec: phycore_imx8mp: Add mtd spi partitions
Applied both, thanks.
participants (2)
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Benjamin Hahn
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Fabio Estevam