Signed-off-by: Gary Jennejohn garyj@denx.de

--- Makefile | 124 ++++++++++++++++++++- board/RRvision/Makefile | 4 +- board/RRvision/RRvision.c | 9 +- cpu/mpc8xx/cpu_init.c | 4 +- cpu/mpc8xx/fec.c | 8 ++ include/configs/RRvision.h | 256 +++++++++++++++++++++++++++--------------- include/configs/TTTech_env.h | 97 ++++++++++++++++ tools/Makefile | 16 +++ 8 files changed, 417 insertions(+), 101 deletions(-) create mode 100644 include/configs/TTTech_env.h

diff --git a/Makefile b/Makefile index 8bfc891..cbdfbda 100644 --- a/Makefile +++ b/Makefile @@ -1052,10 +1052,128 @@ rmu_config: unconfig RRvision_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc8xx RRvision

-RRvision_LCD_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_LCD" >$(obj)include/config.h - @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h +RRvision_BIGMEM_config \ +RRvision_BIGMEM_prodtest_config \ +RRvision_codesys_config \ +RRvision_codesys_prodtest_config \ +RRvision_prodtest_config \ +RRvision_LCD104_config \ +RRvision_LCD104V1DG61_config \ +RRvision_LCD5_config \ +RRvision_LCD65_config \ +RRvision_LCD7_config \ +RRvision_LCD7AUO_config \ +RRvision_LCDUMSH_config \ +RRvision_LCD_NL8060BC26_config \ +RRvision_LCD_PM070WL3_config \ +RRvision_LCD104_codesys_config \ +RRvision_LCD104V1DG61_codesys_config \ +RRvision_LCD104V7DS01_codesys_config \ +RRvision_LCD5_codesys_config \ +RRvision_LCD65_codesys_config \ +RRvision_LCD7_codesys_config \ +RRvision_LCD7AUO_codesys_config \ +RRvision_LCDUMSH_codesys_config \ +RRvision_LCD_NL8060BC26_codesys_config \ +RRvision_LCD_PM070WL3_codesys_config \ +RRvision_LCD104_BIGMEM_config \ +RRvision_LCD104V1DG61_BIGMEM_config \ +RRvision_LCD104V7DS01_BIGMEM_config \ +RRvision_LCD5_BIGMEM_config \ +RRvision_LCD65_BIGMEM_config \ +RRvision_LCD7_BIGMEM_config \ +RRvision_LCD7AUO_BIGMEM_config \ +RRvision_LCDUMSH_BIGMEM_config \ +RRvision_LCD_NL8060BC26_BIGMEM_config \ +RRvision_LCD_PM070WL3_BIGMEM_config \ +RRvision_LCD104_prodtest_config \ +RRvision_LCD104V1DG61_prodtest_config \ +RRvision_LCD104V7DS01_prodtest_config \ +RRvision_LCD5_prodtest_config \ +RRvision_LCD65_prodtest_config \ +RRvision_LCD7_prodtest_config \ +RRvision_LCD7AUO_prodtest_config \ +RRvision_LCDUMSH_prodtest_config \ +RRvision_LCD_NL8060BC26_prodtest_config \ +RRvision_LCD_PM070WL3_prodtest_config \ +RRvision_LCD104_codesys_prodtest_config \ +RRvision_LCD104V1DG61_codesys_prodtest_config \ +RRvision_LCD104V7DS01_codesys_prodtest_config \ +RRvision_LCD5_codesys_prodtest_config \ +RRvision_LCD65_codesys_prodtest_config \ +RRvision_LCD7_codesys_prodtest_config \ +RRvision_LCD7AUO_codesys_prodtest_config \ +RRvision_LCDUMSH_codesys_prodtest_config \ +RRvision_LCD_NL8060BC26__codesys_prodtest_config \ +RRvision_LCD_PM070WL3_codesys_prodtest_config \ +RRvision_LCD104_BIGMEM_prodtest_config \ +RRvision_LCD104V1DG61_BIGMEM_prodtest_config \ +RRvision_LCD104V7DS01_BIGMEM_prodtest_config \ +RRvision_LCD5_BIGMEM_prodtest_config \ +RRvision_LCD65_BIGMEM_prodtest_config \ +RRvision_LCD7_BIGMEM_prodtest_config \ +RRvision_LCD7AUO_BIGMEM_prodtest_config \ +RRvision_LCD_NL8060BC26_BIGMEM_prodtest_config \ +RRvision_LCD_PM070WL3_BIGMEM_prodtest_config \ +RRvision_LCD104V7DS01_config : unconfig + @mkdir -p $(obj)include + @[ -z "$(findstring _BIGMEM,$@)" ] || \ + { echo "#define CONFIG_TTTECH_BIGMEM" >>$(obj)include/config.h; \ + $(XECHO) "... with BIGMEM ..."; \ + } + @[ -z "$(findstring _prodtest,$@)" ] || \ + { echo "#define CONFIG_PRODTEST" >>$(obj)include/config.h; \ + $(XECHO) "... with prodtest ..."; \ + } + @[ -z "$(findstring _codesys,$@)" ] || \ + { echo "#define CONFIG_CODESYS" >>$(obj)include/config.h; \ + $(XECHO) "... with codesys ..."; \ + } + @[ -z "$(findstring _LCD,$@)" ] || \ + { echo "#define CONFIG_LCD" >>$(obj)include/config.h; \ + $(XECHO) "... with LCD display ..."; \ + } + @[ -z "$(findstring 104_,$@)" ] || \ + { echo "#define CONFIG_HLD1045" >>$(obj)include/config.h; \ + $(XECHO) "... with HLD1045 LCD display ..."; \ + } + @[ -z "$(findstring 104V1DG61_,$@)" ] || \ + { echo "#define CONFIG_SHARP_LQ104V1DG61" >>$(obj)include/config.h; \ + $(XECHO) "... with SHARP LQ1041DG61 LCD display ..."; \ + } + @[ -z "$(findstring 104V7DS01_,$@)" ] || \ + { echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h; \ + $(XECHO) "... with SHARP LQ104V7DS01 LCD display ..."; \ + } + @[ -z "$(findstring CD5_,$@)" ] || \ + { echo "#define CONFIG_SHARP_LQ050Q5DR01" >>$(obj)include/config.h; \ + $(XECHO) "... with SHARP LQ050Q5DR01 LCD display ..."; \ + } + @[ -z "$(findstring CD65_,$@)" ] || \ + { echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h; \ + $(XECHO) "... with SHARP LQ065T9DR51U LCD display ..."; \ + } + @[ -z "$(findstring CD7_,$@)" ] || \ + { echo "#define CONFIG_SHARP_LQ070Q5TR01" >>$(obj)include/config.h; \ + $(XECHO) "... with SHARP LQ070Q5TR01 LCD display ..."; \ + } + @[ -z "$(findstring 7AUO_,$@)" ] || \ + { echo "#define CONFIG_AUO_T070W1D1" >>$(obj)include/config.h; \ + $(XECHO) "... with AUO T070W1D1 LCD display ..."; \ + } + @[ -z "$(findstring NL8060BC26_,$@)" ] || \ + { echo "#define CONFIG_NEC_NL8060BC26" >>$(obj)include/config.h; \ + $(XECHO) "... with NEC NL8060BC26 LCD display ..."; \ + } + @[ -z "$(findstring PM070WL3_,$@)" ] || \ + { echo "#define CONFIG_PM070WL3" >>$(obj)include/config.h; \ + $(XECHO) "... with PM070WL3 LCD display ..."; \ + } + @[ -z "$(findstring UMSH_,$@)" ] || \ + { echo "#define CONFIG_UMSH_7189JD1F" >>$(obj)include/config.h; \ + echo "#define LCD_BPP LCD_MONOCHROME" >>$(obj)include/config.h; \ + $(XECHO) "... with UMSH LCD display ..."; \ + } @$(MKCONFIG) -a RRvision ppc mpc8xx RRvision

SM850_config : unconfig diff --git a/board/RRvision/Makefile b/board/RRvision/Makefile index cf07cf4..b6f0efc 100644 --- a/board/RRvision/Makefile +++ b/board/RRvision/Makefile @@ -1,5 +1,5 @@ # -# (C) Copyright 2000-2006 +# (C) Copyright 2000-2008 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk

LIB = $(obj)lib$(BOARD).a

-COBJS = $(BOARD).o flash.o +COBJS = $(BOARD).o

SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/RRvision/RRvision.c b/board/RRvision/RRvision.c index c0b772d..e0f422d 100644 --- a/board/RRvision/RRvision.c +++ b/board/RRvision/RRvision.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2001-2002 + * (C) Copyright 2001-2008 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -198,11 +198,10 @@ phys_size_t initdram (int board_type) memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;

/* - * No bank 1 - * - * invalidate bank + * Mapping C2/C2NF Chip (TTTech Computertechnik AG) */ - memctl->memc_br3 = 0; + memctl->memc_or3 = CFG_OR3_C2; + memctl->memc_br3 = CFG_BR3_C2;

/* adjust refresh rate depending on SDRAM type, one bank */ reg = memctl->memc_mptpr; diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c index fb3414a..3250707 100644 --- a/cpu/mpc8xx/cpu_init.c +++ b/cpu/mpc8xx/cpu_init.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2002 + * (C) Copyright 2000-2008 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -62,7 +62,7 @@ void cpu_init_f (volatile immap_t * immr) #endif /* CONFIG_WATCHDOG */

/* SIUMCR - contains debug pin configuration (11-6) */ -#ifndef CONFIG_SVM_SC8xx +#if !defined (CONFIG_SVM_SC8xx) && !defined (CONFIG_RRVISION) immr->im_siu_conf.sc_siumcr |= CFG_SIUMCR; #else immr->im_siu_conf.sc_siumcr = CFG_SIUMCR; diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c index 37eb481..31d0e1c 100644 --- a/cpu/mpc8xx/fec.c +++ b/cpu/mpc8xx/fec.c @@ -837,6 +837,8 @@ static void fec_halt(struct eth_device* dev) #define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */ #define PHY_ID_DM9161 0x0181B880 /* Davicom DM9161 */ #define PHY_ID_KSM8995M 0x00221450 /* MICREL KS8995MA */ +#define PHY_ID_DP83846A 0x20005c20 /* NatSemi DP83846A */ +#define PHY_ID_DP83847 0x20005c30 /* NatSemi DP83847 */

/* send command to phy using mii, wait for result */ static uint @@ -924,6 +926,12 @@ static int mii_discover_phy(struct eth_device *dev) case PHY_ID_KSM8995M: printf("MICREL KS8995M\n"); break; + case PHY_ID_DP83846A: + printf("NatSemi DP83846A\n"); + break; + case PHY_ID_DP83847: + printf("NatSemi DP83847\n"); + break; default: printf("0x%08x\n", phytype); break; diff --git a/include/configs/RRvision.h b/include/configs/RRvision.h index 6a71801..2a47eca 100644 --- a/include/configs/RRvision.h +++ b/include/configs/RRvision.h @@ -2,6 +2,9 @@ * (C) Copyright 2000, 2001, 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * + * (C) Copyright 2008 + * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. + * * See file CREDITS for list of people who contributed to this * project. * @@ -29,12 +32,19 @@ #define __CONFIG_H

/* + * Extra environment settings common for TTTech. Moved from include + * to include/configs. + */ +#include <configs/TTTech_env.h> + +/* * High Level Configuration Options * (easy to change) */

#define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_RRVISION 1 /* ...on a RRvision board */ +#define CONFIG_C2CHIP 1 /* ... C2/C2NF Chip */

#define CONFIG_8xx_GCLK_FREQ 64000000

@@ -48,49 +58,84 @@ #define CONFIG_BOOTDELAY 3 /* autoboot after 5 seconds */ #endif

-#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ - -#define CONFIG_PREBOOT "setenv stdout serial" - -#undef CONFIG_BOOTARGS -#define CONFIG_ETHADDR 00:50:C2:00:E0:70 -#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 -#define CONFIG_IPADDR 10.0.0.5 -#define CONFIG_SERVERIP 10.0.0.2 -#define CONFIG_NETMASK 255.0.0.0 -#define CONFIG_ROOTPATH /opt/eldk/ppc_8xx -#define CONFIG_BOOTCOMMAND "run flash_self" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}" \ - ":${gatewayip}:${netmask}:${hostname}:${netdev}:off\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ - "load=tftp 100000 /tftpboot/u-boot.bin\0" \ - "update=protect off 1:0-8;era 1:0-8;" \ - "cp.b 100000 40000000 ${filesize};" \ - "setenv filesize;saveenv\0" \ - "kernel_addr=40040000\0" \ - "ramdisk_addr=40100000\0" \ - "kernel_img=/tftpboot/uImage\0" \ - "kernel_load=tftp 200000 ${kernel_img}\0" \ - "net_nfs=run kernel_load nfsargs addip addtty;bootm\0" \ - "flash_nfs=run nfsargs addip addtty;bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" +#define CONFIG_PREBOOT "run holdpower; run sensor_supply_on"

+#define CONFIG_OVERWRITE_ETHADDR_ONCE 1

-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ +#define CONFIG_ROOTPATH /tftpboot/root/

-#undef CONFIG_WATCHDOG /* watchdog disabled */ +#ifdef CONFIG_LCD +# define SENSOR_SUPPLY_ON \ + "sensor_supply_on=mw.w fff00960 C02; mw.w fff00966 800\0" +#else +# define SENSOR_SUPPLY_ON \ + "sensor_supply_on=mw.w fff00960 402; mw.w fff00966 0\0" +#endif + +#ifdef CONFIG_TTTECH_BIGMEM +# define MEM_ALLOC \ + "flash_st_ub=40000000\0" \ + "flash_en_ub=400FFFFF\0" \ + "flash_st_lx=40100000\0" \ + "flash_en_lx=401BFFFF\0" \ + "flash_st_rd=401C0000\0" \ + "flash_en_rd=407BFFFF\0" \ + "flash_st_jf=407C0000\0" \ + "flash_en_jf=43FFFFFF\0" \ + "rd_size=6144\0" +#else +#ifdef CONFIG_CODESYS +# define MEM_ALLOC \ + "flash_st_ub=40000000\0" \ + "flash_en_ub=4003FFFF\0" \ + "flash_st_lx=40040000\0" \ + "flash_en_lx=400FFFFF\0" \ + "flash_st_rd=40100000\0" \ + "flash_en_rd=402FFFFF\0" \ + "flash_st_jf=40300000\0" \ + "flash_en_jf=407FFFFF\0" \ + "rd_size=4096\0" +#else +# define MEM_ALLOC \ + "flash_st_ub=40000000\0" \ + "flash_en_ub=4003FFFF\0" \ + "flash_st_lx=40040000\0" \ + "flash_en_lx=400FFFFF\0" \ + "flash_st_rd=40100000\0" \ + "flash_en_rd=403FFFFF\0" \ + "flash_st_jf=40400000\0" \ + "flash_en_jf=407FFFFF\0" \ + "rd_size=6144\0" +#endif +#endif

-#undef CONFIG_STATUS_LED /* disturbs display */ +#ifdef CONFIG_PRODTEST +# define CONFIG_BOOTCOMMAND "run prodtest" +#else +# define CONFIG_BOOTCOMMAND "saveenv; run updateall" +#endif

-#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "img_lx=/tftpboot/kernel-rrv.bin\0" \ + "img_lxpt=/tftpboot/uImage_prodtest\0" \ + "img_rd=/tftpboot/rd-rrv.bin\0" \ + "img_rdpt=/tftpboot/rdisk_prodtest.bin\0" \ + "img_ub=/tftpboot/boot-rrv.bin\0" \ + "img_ubpt=/tftpboot/uboot_prodtest.bin\0" \ + "img_sc=/tftpboot/setenv_rrv.img\0" \ + "img_jf=/tftpboot/jffs-rrv.bin\0" \ + "bootcmd_prodtest=run flash_self\0" \ + "holdpower=mw.w fff00950 40; mw.w fff00956 40\0" \ + SENSOR_SUPPLY_ON \ + "changeip=\0" \ + "runscr=run ${loadscr};autoscr 100000\0" \ + "hostname=ttcvision\0" \ + CONFIG_BOOTCOMMAND \ + CONFIG_TTTECH_ENV_SETTINGS \ + MEM_ALLOC + + +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */

/* * BOOTP options @@ -107,16 +152,25 @@

#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */

+#define TTTECH_NO_SCREEN_INFO /* was CFG_NO_SCREEN_INFO */

-#ifndef CONFIG_LCD +#ifdef CONFIG_LCD +#define CONFIG_LCD_LOGO +#define CONFIG_LCD_LOGO_X ((panel_info.vl_col - BMP_LOGO_WIDTH) / 2) +#define CONFIG_LCD_LOGO_Y ((panel_info.vl_row - BMP_LOGO_HEIGHT) / 2) +#define CFG_WHITE_ON_BLACK +#else #define CONFIG_VIDEO 1 /* To enable the video initialization */ - /* Video related */ #define CONFIG_VIDEO_LOGO 1 /* Show the logo */ #define CONFIG_VIDEO_ENCODER_AD7179 1 /* Enable this encoder */ #define CONFIG_VIDEO_ENCODER_AD7179_ADDR 0x2A /* ALSB to ground */ +#define CONFIG_VIDEO_LOGO_X ((VIDEO_COLS - VIDEO_LOGO_WIDTH) / 2) +#define CONFIG_VIDEO_LOGO_Y ((VIDEO_ROWS - VIDEO_LOGO_HEIGHT) / 2) #endif

+#define CFG_CONSOLE_IS_IN_ENV + /* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_SOFT_I2C /* I2C bit-banged */ @@ -135,14 +189,18 @@ #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) -#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ - else immr->im_cpm.cp_pbdat &= ~PB_SDA -#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ - else immr->im_cpm.cp_pbdat &= ~PB_SCL +#define I2C_SDA(bit) do { \ + if ((bit)) immr->im_cpm.cp_pbdat |= PB_SDA; \ + else immr->im_cpm.cp_pbdat &= ~PB_SDA; \ + } while(0); + +#define I2C_SCL(bit) do { \ + if ((bit)) immr->im_cpm.cp_pbdat |= PB_SCL; \ + else immr->im_cpm.cp_pbdat &= ~PB_SCL; \ + } while(0); #define I2C_DELAY udelay(1) /* 1/4 I2C clock duration */ #endif /* CONFIG_SOFT_I2C */

- /* * Command line configuration. */ @@ -150,12 +208,9 @@

#define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C -#define CONFIG_CMD_IDE #define CONFIG_CMD_DATE - -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_IDE - +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMDLINE_EDITING /* add command line history */

/* * Miscellaneous configurable options @@ -167,18 +222,19 @@ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #endif -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +/* Print Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */

#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */

-#define CFG_LOAD_ADDR 0x100000 /* default load address */ +#define CFG_LOAD_ADDR 0x100000 /* default load address */

#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */

-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}

/* * Low Level Configuration Settings @@ -206,7 +262,11 @@ */ #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE 0x40000000 +#ifdef CONFIG_TTTECH_BIGMEM /* set in Makefile */ +#define CFG_MONITOR_LEN (256 << 12) /* Reserve 1024 kB for Monitor */ +#else #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#endif #define CFG_MONITOR_BASE CFG_FLASH_BASE #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */

@@ -220,29 +280,55 @@ /*----------------------------------------------------------------------- * FLASH organization */ +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER + +#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE} + #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ +#ifdef CONFIG_TTTECH_BIGMEM +#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#else +#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ +#endif

/* timeout values are in ticks = ms */ -#define CFG_FLASH_ERASE_TOUT (120*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (1 * CFG_HZ) /* Timeout for Flash Write */ +#ifdef CONFIG_TTTECH_BIGMEM +#define CFG_FLASH_ERASE_TOUT (120 * CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (10 * CFG_HZ) /* Timeout for Flash Write */ +#else +#define CFG_FLASH_ERASE_TOUT (120 * CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (1 * CFG_HZ) /* Timeout for Flash Write */ +#endif + +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ +#define CFG_FLASH_INCREMENT 0 /* there is only one bank */ + +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ +#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */

#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ -#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#ifdef CONFIG_TTTECH_BIGMEM +#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */ +#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ +#else +/* this is actually in the first sector of the flash */ +#define CFG_ENV_OFFSET 0x8100 /* Offset of Environment Sector */ +#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#endif

/* Address and size of Redundant Environment Sector */ -#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) +#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)

-#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */

/*----------------------------------------------------------------------- * Cache Configuration */ -#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ +#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ #if defined(CONFIG_CMD_KGDB) -#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ +#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value*/ #endif

/*----------------------------------------------------------------------- @@ -251,11 +337,12 @@ *----------------------------------------------------------------------- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze */ -#if defined(CONFIG_WATCHDOG) +#ifdef CONFIG_WATCHDOG #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) #else -#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ + SYPCR_SWP) #endif

/*----------------------------------------------------------------------- @@ -263,11 +350,7 @@ *----------------------------------------------------------------------- * PCMCIA config., multi-function pin tri-state */ -#ifndef CONFIG_CAN_DRIVER -#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01) -#else /* we must activate GPL5 in the SIUMCR for CAN */ -#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01) -#endif /* CONFIG_CAN_DRIVER */ +#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC00)

/*----------------------------------------------------------------------- * TBSCR - Time Base Status and Control 11-26 @@ -297,7 +380,7 @@ */

/* for 64 MHz, we use a 16 MHz clock * 4 */ -#define CFG_PLPRCR ( (4-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST ) +#define CFG_PLPRCR ((4 - 1) << PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST)

/*----------------------------------------------------------------------- * SCCR - System Clock and reset Control Register 15-27 @@ -306,8 +389,7 @@ * power management and some other internal clocks */ #define SCCR_MASK SCCR_EBDF11 -#define CFG_SCCR (/* SCCR_TBS | */ SCCR_RTSEL | SCCR_RTDIV | \ - SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ +#define CFG_SCCR (SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \ SCCR_DFALCD00)

@@ -332,10 +414,6 @@

#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */

-#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ -#undef CONFIG_IDE_LED /* LED for ide not supported */ -#undef CONFIG_IDE_RESET /* reset for ide not supported */ - #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ #define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */

@@ -357,7 +435,6 @@ *----------------------------------------------------------------------- * */ -/*#define CFG_DER 0x2002000F*/ #define CFG_DER 0

/* @@ -400,16 +477,17 @@ #define CFG_OR2_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM ) #define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )

-#ifndef CONFIG_CAN_DRIVER #define CFG_OR3_PRELIM CFG_OR2_PRELIM #define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V ) -#else /* CAN uses CS3#, so we can have only one SDRAM bank anyway */ -#define CFG_CAN_BASE 0xC0000000 /* CAN mapped at 0xC0000000 */ -#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */ -#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA | OR_BI) -#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \ - BR_PS_8 | BR_MS_UPMB | BR_V ) -#endif /* CONFIG_CAN_DRIVER */ + +#ifdef CONFIG_C2CHIP +#define CFG_C2_BASE 0x20000000 /* C2 mapped at 0x00FFE000 + - last 32KB of SDRAM */ +#define CFG_C2_OR_AM 0xFFF00000 /* 1MB address mask */ +#define CFG_OR3_C2 (OR_AM_MSK | OR_CSNT_SAM | OR_ACS_DIV2 | \ + OR_SCY_15_CLK | OR_EHTR | OR_BI | OR_TRLX) +#define CFG_BR3_C2 ((CFG_C2_BASE & BR_BA_MSK) | BR_PS_16 | BR_V ) +#endif /* CONFIG_C2CHIP */

/* * Memory Periodic Timer Prescaler @@ -459,13 +537,13 @@ */

/* 8 column SDRAM */ -#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ +#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ - MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) + MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) /* 9 column SDRAM */ -#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ +#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ - MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) + MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)

/* diff --git a/include/configs/TTTech_env.h b/include/configs/TTTech_env.h new file mode 100644 index 0000000..5a7aec3 --- /dev/null +++ b/include/configs/TTTech_env.h @@ -0,0 +1,97 @@ +/* + * (C) Copyright 2008 TTTech Computertechnik AG + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __TTTECH_ENV_H +#define __TTTECH_ENV_H + +/* + * Extra environment settings shared by various TTTech configs + */ + +#define CONFIG_TTTECH_ENV_SETTINGS \ + "netdev=eth0\0" \ + "stderr=serial\0" \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "bootcmd_appl=run flash_self\0" \ + "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}" \ + ":${gatewayip}:${netmask}:${hostname}:${netdev}:off\0" \ + "addnostartapp=setenv bootargs ${bootargs} nostartapp=yes\0" \ + "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ + "addpanic=setenv bootargs ${bootargs} panic=1\0" \ + "nfsargs=setenv bootargs ${bootargs} root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs ${bootargs} root=/dev/ram rw " \ + "ramdisk_size=${rd_size}\0" \ + "cleansave=setenv img; setenv filesize; " \ + "setenv flash_st; setenv flash_en; sleep 1; saveenv\0" \ + "load=tftp 100000 ${img}\0" \ + "flash=protect off all;era ${flash_st} ${flash_en};" \ + "cp.b 100000 ${flash_st} ${filesize}; " \ + "protect on all\0" \ + "update=run load flash\0" \ + "loadlx=setenv img ${img_lx}; run load\0" \ + "updatelx=setenv img ${img_lx}; " \ + "setenv flash_st ${flash_st_lx}; " \ + "setenv flash_en ${flash_en_lx}; run update\0" \ + "updatelxpt=setenv img ${img_lxpt}; " \ + "setenv flash_st ${flash_st_lx}; " \ + "setenv flash_en ${flash_en_lx}; run update\0" \ + "updaterd=setenv img ${img_rd}; " \ + "setenv flash_st ${flash_st_rd}; " \ + "setenv flash_en ${flash_en_rd}; run update; " \ + "setenv boot_cmd ${bootcmd_appl} \0" \ + "updateub=setenv img ${img_ub}; " \ + "setenv flash_st ${flash_st_ub}; " \ + "setenv flash_en ${flash_en_ub};" \ + "run update;reset\0" \ + "updateubpt=setenv img ${img_ubpt}; " \ + "setenv flash_st ${flash_st_ub}; " \ + "setenv flash_en ${flash_en_ub};" \ + "run update;\0" \ + "updaterdpt=setenv img ${img_rdpt}; " \ + "setenv flash_st ${flash_st_rd}; " \ + "setenv flash_en ${flash_en_rd}; run update\0" \ + "updatepb=run updateub\0" \ + "updatejf=setenv img ${img_jf}; " \ + "setenv flash_st ${flash_st_jf}; " \ + "setenv flash_en ${flash_en_jf}; run update\0" \ + "net_nfs=run loadlx nfsargs addip addtty;bootm\0" \ + "flash_nfs=run nfsargs addip addtty;bootm ${flash_st_lx}\0" \ + "flash_self=run ramargs addip addtty;" \ + "bootm ${flash_st_lx} ${flash_st_rd}\0" \ + "prodtest=run updatelxpt;run updaterdpt;" \ + "setenv bootcmd ${bootcmd_prodtest};" \ + "run cleansave;" \ + "reset\0" \ + "application=run updateub; run updatelx; run updaterd;" \ + "setenv bootcmd ${bootcmd_appl};" \ + "run cleansave;" \ + "reset\0" \ + "updateall=run updatelx;" \ + "run updatejf; run updaterd;" \ + "setenv bootcmd=" \ + "run cleansave;" \ + "reset\0" \ + "test=run addnostartapp flash_self\0" + +#endif /* __TTTECH_ENV_H */ diff --git a/tools/Makefile b/tools/Makefile index 8533a8e..68f7e3b 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -41,6 +41,22 @@ LIBFDT_OBJ_FILES = $(obj)fdt.o $(obj)fdt_ro.o $(obj)fdt_rw.o $(obj)fdt_strerror.

LOGO_H = $(OBJTREE)/include/bmp_logo.h

+ifeq ($(LOGO),palfin) +LOGO_BMP= logos/linux_logo_ttcontrol_palfin.bmp +endif +ifeq ($(LOGO),ttcontrol) +LOGO_BMP= logos/linux_logo_ttcontrol.bmp +endif +ifeq ($(LOGO),patria) +LOGO_BMP= logos/linux_logo_ttcontrol_patria.bmp +endif +ifeq ($(LOGO),eaton) +LOGO_BMP= logos/linux_logo_ttcontrol_eaton.bmp +endif +ifeq ($(LOGO),void) +LOGO_BMP= logos/linux_logo_void.bmp +endif + ifeq ($(LOGO_BMP),) LOGO_BMP= logos/denx.bmp endif