[U-Boot] [PATCH 01/33] mmc: select the available type from host_caps and card_caps
The original implementation select HS timing by default, add available type selection for higher speed mode compatibility, such as hs200, hs400, hs400es.
By the way, we assume that card run at 1.8V or 1.2V I/O when its timing is ddr52/hs200/hs400(es).
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- include/mmc.h | 16 +++++++++++++++ 2 files changed, 74 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 72fc177..f5b2280 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -546,10 +546,62 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
}
+static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd) +{ + u8 card_type; + u32 host_caps, avail_type = 0; + + card_type = ext_csd[EXT_CSD_CARD_TYPE]; + host_caps = mmc->cfg->host_caps; + + if ((host_caps & MMC_MODE_HS) && + (card_type & EXT_CSD_CARD_TYPE_26)) + avail_type |= EXT_CSD_CARD_TYPE_26; + + if ((host_caps & MMC_MODE_HS) && + (card_type & EXT_CSD_CARD_TYPE_52)) + avail_type |= EXT_CSD_CARD_TYPE_52; + + /* + * For the moment, u-boot doesn't support signal voltage + * switch, therefor we assume that host support ddr52 + * at 1.8v or 3.3v I/O(1.2v I/O not supported, hs200 and + * hs400 are the same). + */ + if ((host_caps & MMC_MODE_DDR_52MHz) && + (card_type & EXT_CSD_CARD_TYPE_DDR_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_DDR_1_8V; + + if ((host_caps & MMC_MODE_HS200) && + (card_type & EXT_CSD_CARD_TYPE_HS200_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V; + + /* + * If host can support HS400, it means that host can also + * support HS200. + */ + if ((host_caps & MMC_MODE_HS400) && + (host_caps & MMC_MODE_8BIT) && + (card_type & EXT_CSD_CARD_TYPE_HS400_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V | + EXT_CSD_CARD_TYPE_HS400_1_8V; + + if ((host_caps & MMC_MODE_HS400ES) && + (host_caps & MMC_MODE_8BIT) && + ext_csd[EXT_CSD_STROBE_SUPPORT] && + (avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V | + EXT_CSD_CARD_TYPE_HS400_1_8V | + EXT_CSD_CARD_TYPE_HS400ES; + + return avail_type; +} + static int mmc_change_freq(struct mmc *mmc) { ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); char cardtype; + u32 avail_type; int err;
mmc->card_caps = 0; @@ -569,8 +621,13 @@ static int mmc_change_freq(struct mmc *mmc) return err;
cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; + avail_type = mmc_select_card_type(mmc, ext_csd);
- err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); + if (avail_type & EXT_CSD_CARD_TYPE_HS) + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_HS_TIMING, 1); + else + err = -EINVAL;
if (err) return err; diff --git a/include/mmc.h b/include/mmc.h index fad12d6..0bae1a1 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -58,6 +58,9 @@ #define MMC_MODE_8BIT (1 << 3) #define MMC_MODE_SPI (1 << 4) #define MMC_MODE_DDR_52MHz (1 << 5) +#define MMC_MODE_HS200 (1 << 6) +#define MMC_MODE_HS400 (1 << 7) +#define MMC_MODE_HS400ES (1 << 8)
#define SD_DATA_4BIT 0x00040000
@@ -182,6 +185,7 @@ #define EXT_CSD_BOOT_BUS_WIDTH 177 #define EXT_CSD_PART_CONF 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_STROBE_SUPPORT 184 /* RO */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */ @@ -201,6 +205,18 @@
#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_26 | \ + EXT_CSD_CARD_TYPE_52) +#define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */ +#define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */ +#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ + EXT_CSD_CARD_TYPE_HS200_1_2V) +#define EXT_CSD_CARD_TYPE_HS400_1_8V BIT(6) /* Card can run at 200MHz DDR, 1.8V */ +#define EXT_CSD_CARD_TYPE_HS400_1_2V BIT(7) /* Card can run at 200MHz DDR, 1.2V */ +#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \ + EXT_CSD_CARD_TYPE_HS400_1_2V) +#define EXT_CSD_CARD_TYPE_HS400ES BIT(8) /* Card can run at HS400ES */ + #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
Some controller should do some configuration according to the selected timing.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
drivers/mmc/mmc.c | 7 +++++++ include/mmc.h | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index f5b2280..1b3652a 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -318,6 +318,12 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, return blkcnt; }
+static void mmc_set_timing(struct mmc *mmc, uint timing) +{ + mmc->timing = timing; + mmc_set_ios(mmc); +} + static int mmc_go_idle(struct mmc *mmc) { struct mmc_cmd cmd; @@ -1734,6 +1740,7 @@ int mmc_start_init(struct mmc *mmc) mmc->ddr_mode = 0; mmc_set_bus_width(mmc, 1); mmc_set_clock(mmc, 1); + mmc_set_timing(mmc, MMC_TIMING_LEGACY);
/* Reset the Card */ err = mmc_go_idle(mmc); diff --git a/include/mmc.h b/include/mmc.h index 0bae1a1..68b6790 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -434,6 +434,21 @@ struct mmc { uint has_init; int high_capacity; uint bus_width; + uint timing; + +#define MMC_TIMING_LEGACY 0 +#define MMC_TIMING_MMC_HS 1 +#define MMC_TIMING_SD_HS 2 +#define MMC_TIMING_UHS_SDR12 3 +#define MMC_TIMING_UHS_SDR25 4 +#define MMC_TIMING_UHS_SDR50 5 +#define MMC_TIMING_UHS_SDR104 6 +#define MMC_TIMING_UHS_DDR50 7 +#define MMC_TIMING_MMC_DDR52 8 +#define MMC_TIMING_MMC_HS200 9 +#define MMC_TIMING_MMC_HS400 10 +#define MMC_TIMING_MMC_HS400ES 11 + uint clock; uint card_caps; uint ocr; @@ -493,6 +508,40 @@ enum mmc_hwpart_conf_mode { MMC_HWPART_CONF_COMPLETE, };
+static inline bool mmc_card_hs(struct mmc *mmc) +{ + return (mmc->timing == MMC_TIMING_MMC_HS) || + (mmc->timing == MMC_TIMING_SD_HS); +} + +static inline bool mmc_card_ddr(struct mmc *mmc) +{ + return (mmc->timing == MMC_TIMING_UHS_DDR50) || + (mmc->timing == MMC_TIMING_MMC_DDR52) || + (mmc->timing == MMC_TIMING_MMC_HS400) || + (mmc->timing == MMC_TIMING_MMC_HS400ES); +} + +static inline bool mmc_card_hs200(struct mmc *mmc) +{ + return mmc->timing == MMC_TIMING_MMC_HS200; +} + +static inline bool mmc_card_ddr52(struct mmc *mmc) +{ + return mmc->timing == MMC_TIMING_MMC_DDR52; +} + +static inline bool mmc_card_hs400(struct mmc *mmc) +{ + return mmc->timing == MMC_TIMING_MMC_HS400; +} + +static inline bool mmc_card_hs400es(struct mmc *mmc) +{ + return mmc->timing == MMC_TIMING_MMC_HS400ES; +} + struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
/**
Remove the redundant mmc timing definitions which have defined in mmc.h.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
drivers/mmc/xenon_sdhci.c | 12 ------------ 1 file changed, 12 deletions(-)
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c index 2a0d8b4..f0a33c1 100644 --- a/drivers/mmc/xenon_sdhci.c +++ b/drivers/mmc/xenon_sdhci.c @@ -94,18 +94,6 @@ DECLARE_GLOBAL_DATA_PTR; /* Hyperion only have one slot 0 */ #define XENON_MMC_SLOT_ID_HYPERION 0
-#define MMC_TIMING_LEGACY 0 -#define MMC_TIMING_MMC_HS 1 -#define MMC_TIMING_SD_HS 2 -#define MMC_TIMING_UHS_SDR12 3 -#define MMC_TIMING_UHS_SDR25 4 -#define MMC_TIMING_UHS_SDR50 5 -#define MMC_TIMING_UHS_SDR104 6 -#define MMC_TIMING_UHS_DDR50 7 -#define MMC_TIMING_MMC_DDR52 8 -#define MMC_TIMING_MMC_HS200 9 -#define MMC_TIMING_MMC_HS400 10 - #define XENON_MMC_MAX_CLK 400000000
enum soc_pad_ctrl_type {
Select timing parameter for the host since HS mode switch is completed.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
drivers/mmc/mmc.c | 16 ++++++++++++++-- include/mmc.h | 6 ++++++ 2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 1b3652a..0b30172 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -552,6 +552,19 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
}
+static int mmc_select_hs(struct mmc *mmc) +{ + int ret; + + ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS); + + if (!ret) + mmc_set_timing(mmc, MMC_TIMING_MMC_HS); + + return ret; +} + static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd) { u8 card_type; @@ -630,8 +643,7 @@ static int mmc_change_freq(struct mmc *mmc) avail_type = mmc_select_card_type(mmc, ext_csd);
if (avail_type & EXT_CSD_CARD_TYPE_HS) - err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, - EXT_CSD_HS_TIMING, 1); + err = mmc_select_hs(mmc); else err = -EINVAL;
diff --git a/include/mmc.h b/include/mmc.h index 68b6790..060c1f8 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -228,6 +228,12 @@ #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
+#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */ +#define EXT_CSD_TIMING_HS 1 /* High speed */ +#define EXT_CSD_TIMING_HS200 2 /* HS200 */ +#define EXT_CSD_TIMING_HS400 3 /* HS400 */ +#define EXT_CSD_DRV_STR_SHIFT 4 /* Driver Strength shift */ + #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
Configure HISPD bit field according to the timing parameter instead of the card clock frequency.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
drivers/mmc/sdhci.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index b745977..58cc0ab 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -457,14 +457,12 @@ static int sdhci_set_ios(struct mmc *mmc) ctrl &= ~SDHCI_CTRL_4BITBUS; }
- if (mmc->clock > 26000000) + if (!(mmc->timing == MMC_TIMING_LEGACY) && + !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) ctrl |= SDHCI_CTRL_HISPD; else ctrl &= ~SDHCI_CTRL_HISPD;
- if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) - ctrl &= ~SDHCI_CTRL_HISPD; - sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
/* If available, call the driver specific "post" set_ios() function */
participants (1)
-
Ziyuan Xu