CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode.

Signed-off-by: Eric Benard eric@eukrea.com --- MAINTAINERS | 6 +- MAKEALL | 3 +- Makefile | 12 ++ board/eukrea/cpuat91/Makefile | 50 ++++++++ board/eukrea/cpuat91/config.mk | 1 + board/eukrea/cpuat91/cpuat91.c | 85 ++++++++++++++ cpu/arm920t/at91rm9200/Makefile | 5 +- cpu/arm920t/at91rm9200/ks8721.c | 244 +++++++++++++++++++++++++++++++++++++++ include/configs/cpuat91.h | 231 ++++++++++++++++++++++++++++++++++++ include/ks8721.h | 78 +++++++++++++ 10 files changed, 711 insertions(+), 4 deletions(-) create mode 100644 board/eukrea/cpuat91/Makefile create mode 100644 board/eukrea/cpuat91/config.mk create mode 100644 board/eukrea/cpuat91/cpuat91.c create mode 100644 cpu/arm920t/at91rm9200/ks8721.c create mode 100644 include/configs/cpuat91.h create mode 100644 include/ks8721.h

diff --git a/MAINTAINERS b/MAINTAINERS index 575a7ec..da64571 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1,4 +1,4 @@ -######################################################################### +9######################################################################### # # # Regular Maintainers for U-Boot board support: # # # @@ -515,6 +515,10 @@ Dirk Behme dirk.behme@gmail.com

omap3_beagle ARM CORTEX-A8 (OMAP3530 SoC)

+Eric Benard eric@eukrea.com + + cpcuat91 ARM920T + Rishi Bhattacharya rishi@ti.com

omap5912osk ARM926EJS diff --git a/MAKEALL b/MAKEALL index 020ff73..0e0b657 100755 --- a/MAKEALL +++ b/MAKEALL @@ -587,11 +587,12 @@ LIST_at91=" \ at91sam9260ek \ at91sam9261ek \ at91sam9263ek \ - at91sam9g10ek \ + at91sam9g10ek \ at91sam9g20ek \ at91sam9m10g45ek \ at91sam9rlek \ cmc_pu2 \ + cpuat91 \ csb637 \ kb9202 \ meesc \ diff --git a/Makefile b/Makefile index 090e645..3b348d9 100644 --- a/Makefile +++ b/Makefile @@ -2683,6 +2683,18 @@ at91rm9200ek_config : unconfig cmc_pu2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200

+cpuat91_ram_config \ +cpuat91_config : unconfig + @mkdir -p $(obj)include + @if [ "$(findstring _ram_,$@)" ] ; then \ + echo "#define CONFIG_CPUAT91_RAM 1" >>$(obj)include/config.h ; \ + $(XECHO) "... CPUAT91 configured for RAM" ; \ + else \ + echo "#define CONFIG_BOOTDELAY 1" >>$(obj)include/config.h ;\ + $(XECHO) "... CPUAT91 configured for Flash" ;\ + fi; + @$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200 + csb637_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200

diff --git a/board/eukrea/cpuat91/Makefile b/board/eukrea/cpuat91/Makefile new file mode 100644 index 0000000..08a90dc --- /dev/null +++ b/board/eukrea/cpuat91/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := cpuat91.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/eukrea/cpuat91/config.mk b/board/eukrea/cpuat91/config.mk new file mode 100644 index 0000000..ef8dda0 --- /dev/null +++ b/board/eukrea/cpuat91/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21F00000 diff --git a/board/eukrea/cpuat91/cpuat91.c b/board/eukrea/cpuat91/cpuat91.c new file mode 100644 index 0000000..c168a3d --- /dev/null +++ b/board/eukrea/cpuat91/cpuat91.c @@ -0,0 +1,85 @@ +/* + * (C) Copyright 2006 Eukrea Electromatique <www.eukrea.com> + * Eric Benard ebenard@eukrea.com + * based on at91rm9200dk.c which is : + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger mgroeger@sysgo.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/AT91RM9200.h> +#include <at91rm9200_net.h> +#include <ks8721.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + + /* arch number of CPUAT91-Board */ + gd->bd->bi_arch_number = MACH_TYPE_CPUAT91; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#if defined(CONFIG_DRIVER_ETHER) +#if defined(CONFIG_CMD_NET) + +/* + * Name: + * at91rm9200_GetPhyInterface + * Description: + * Initialise the interface functions to the PHY + * Arguments: + * None + * Return value: + * None + */ +void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) +{ + p_phyops->Init = ks8721_InitPhy; + p_phyops->IsPhyConnected = ks8721_IsPhyConnected; + p_phyops->GetLinkSpeed = ks8721_GetLinkSpeed; + p_phyops->AutoNegotiate = ks8721_AutoNegotiate; +} + +#endif /* CONFIG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile index 73aeeac..114d8ad 100644 --- a/cpu/arm920t/at91rm9200/Makefile +++ b/cpu/arm920t/at91rm9200/Makefile @@ -31,14 +31,15 @@ COBJS += bcm5221.o COBJS += dm9161.o COBJS += ether.o COBJS += i2c.o +COBJS-$(CONFIG_KS8721_PHY) += ks8721.o COBJS += lxt972.o COBJS += reset.o COBJS += spi.o COBJS += timer.o COBJS += usb.o

-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))

all: $(obj).depend $(LIB)

diff --git a/cpu/arm920t/at91rm9200/ks8721.c b/cpu/arm920t/at91rm9200/ks8721.c new file mode 100644 index 0000000..703e58c --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8721.c @@ -0,0 +1,244 @@ +/* + * (C) Copyright 2006 + * Author : Eric Benard (Eukrea Electromatique) + * based on dm9161.c which is : + * (C) Copyright 2003 + * Author : Hamid Ikdoumi (Atmel) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91rm9200_net.h> +#include <net.h> +#include <ks8721.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if defined(CONFIG_CMD_NET) + +/* + * Name: + * ks8721_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +unsigned int ks8721_IsPhyConnected(AT91PS_EMAC p_mac) +{ + unsigned short Id1, Id2; + + at91rm9200_EmacEnableMDIO(p_mac); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_PHYID1, &Id1); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_PHYID2, &Id2); + at91rm9200_EmacDisableMDIO(p_mac); + + if ((Id1 == (KS8721_PHYID_OUI >> 6)) && + ((Id2 >> 10) == (KS8721_PHYID_OUI & KS8721_LSB_MASK))) { + if ((Id2 & KS8721_MODELMASK) == KS8721BL_MODEL) + printf("Micrel KS8721bL PHY detected : "); + else + printf("Unknown Micrel PHY detected : "); + return TRUE; + } + return FALSE; +} + +/* + * Name: + * ks8721_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked and set in the + * MAC configuration registers + * Arguments: + * p_mac - pointer to MAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8721_GetLinkSpeed(AT91PS_EMAC p_mac) +{ + unsigned short stat1; + + if (!at91rm9200_EmacReadPhy(p_mac, KS8721_BMSR, &stat1)) + return FALSE; + + if (!(stat1 & KS8721_LINK_STATUS)) { /* link status up? */ + printf("Link Down !\n"); + return FALSE; + } + + if (stat1 & KS8721_100BASE_TX_FD) { + /*set Emac for 100BaseTX and Full Duplex */ + printf("100BT FD\n"); + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + + if (stat1 & KS8721_10BASE_T_FD) { + /*set MII for 10BaseT and Full Duplex */ + printf("10BT FD\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return TRUE; + } + + if (stat1 & KS8721_100BASE_T4_HD) { + /*set MII for 100BaseTX and Half Duplex */ + printf("100BT HD\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_SPD; + return TRUE; + } + + if (stat1 & KS8721_10BASE_T_HD) { + /*set MII for 10BaseT and Half Duplex */ + printf("10BT HD\n"); + p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return TRUE; + } + return FALSE; +} + + +/* + * Name: + * ks8721_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation and the same is set in the MAC configuration registers + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8721_InitPhy(AT91PS_EMAC p_mac) +{ + UCHAR ret = TRUE; + unsigned short IntValue; + + at91rm9200_EmacEnableMDIO(p_mac); + + if (!ks8721_GetLinkSpeed(p_mac)) { + /* Try another time */ + ret = ks8721_GetLinkSpeed(p_mac); + } + + /* Disable PHY Interrupts */ + IntValue = 0; + at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_MDINTR, &IntValue); + at91rm9200_EmacDisableMDIO(p_mac); + + return ret; +} + + +/* + * Name: + * ks8721_AutoNegotiate + * Description: + * MAC Autonegotiates with the partner status of same is set in the + * MAC configuration registers + * Arguments: + * dev - pointer to struct net_device + * Return value: + * TRUE - if link status set successfully + * FALSE - if link status not set + */ +UCHAR ks8721_AutoNegotiate(AT91PS_EMAC p_mac, int *status) +{ + unsigned short value; + unsigned short PhyAnar; + unsigned short PhyAnalpar; + + /* Set ks8721 control register */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return FALSE; + value &= ~KS8721_AUTONEG; /* remove autonegotiation enable */ + value |= KS8721_ISOLATE; /* Electrically isolate PHY */ + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return FALSE; + + /* Set the Auto_negotiation Advertisement Register */ + /* MII advertising for Next page, 100BaseTxFD and HD, */ + /* 10BaseTFD and HD, IEEE 802.3 */ + PhyAnar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX | + KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_ANAR, &PhyAnar)) + return FALSE; + + /* Read the Control Register */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return FALSE; + + value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return FALSE; + /* Restart Auto_negotiation */ + value |= KS8721_RESTART_AUTONEG; + value &= ~KS8721_ISOLATE; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return FALSE; + + /*check AutoNegotiate complete */ + udelay(10000); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMSR, &value); + if (!(value & KS8721_AUTONEG_COMP)) + return FALSE; + + /* Get the AutoNeg Link partner base page */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_ANLPAR, &PhyAnalpar)) + return FALSE; + + if ((PhyAnar & KS8721_TX_FDX) && (PhyAnalpar & KS8721_TX_FDX)) { + /*set MII for 100BaseTX and Full Duplex */ + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + + if ((PhyAnar & KS8721_10_FDX) && (PhyAnalpar & KS8721_10_FDX)) { + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return TRUE; + } + return FALSE; +} + +#endif /* CONFIG_CMD_NET */ + +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h new file mode 100644 index 0000000..93ac0e3 --- /dev/null +++ b/include/configs/cpuat91.h @@ -0,0 +1,231 @@ +/* + * CPUAT91 by (C) Copyright 2006 Eric Benard + * ebenard@eukrea.com + * + * Configuration settings for the CPUAT91 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#if defined(CONFIG_CPUAT91_RAM) +#define CONFIG_SKIP_LOWLEVEL_INIT 1 +#define CONFIG_SKIP_RELOCATE_UBOOT 1 +#endif + +#define AT91C_MAIN_CLOCK 179712000 +#define AT91C_MASTER_CLOCK 59904000 + +#define AT91_SLOW_CLOCK 32768 + +#define CONFIG_ARM920T 1 +#define CONFIG_AT91RM9200 1 +#define CONFIG_AT91RM9200DK 1 +#define CONFIG_CPUAT91 1 + +#undef CONFIG_USE_IRQ +#define USE_920T_MMU 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 +/* flash */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ + +/* clocks */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz for USB */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock */ + +/* sdram */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188C155 /* set up the SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +/* define one of these to choose the DBGU, USART0 or USART1 as console */ +#define CONFIG_AT91RM9200_USART 1 +#define CONFIG_DBGU 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 + +#undef CONFIG_HWFLOW +#undef CONFIG_MODEM_SUPPORT + +#define CONFIG_HARD_I2C 1 + +#if defined(CONFIG_HARD_I2C) +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 +#endif + +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +#include <config_cmd_default.h> + +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_MII 1 +#define CONFIG_CMD_CACHE 1 +#undef CONFIG_CMD_USB + +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NFS + +#if defined(CONFIG_HARD_I2C) +#define CONFIG_CMD_EEPROM 1 +#define CONFIG_CMD_I2C 1 +#endif + +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x02000000 + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END \ + (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024) + +#define CONFIG_DRIVER_ETHER 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_AT91C_USE_RMII 1 +#define CONFIG_PHY_ADDRESS (1 << 5) +#define CONFIG_KS8721_PHY 1 + +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_PROTECTION 1 +#define PHYS_FLASH_1 0x10000000 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +#if defined(CONFIG_CMD_USB) +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_AT91C_PQFP_UHPBU 1 +#undef CONFIG_SYS_USB_OHCI_BOARD_INIT +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#endif + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 + +#define CONFIG_SYS_LOAD_ADDR 0x21000000 + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } + +#define CONFIG_SYS_PROMPT "CPUAT91=> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_LONGHELP 1 + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) + +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_STACKSIZE (32 * 1024) + +#if defined(CONFIG_USE_IRQ) +#error CONFIG_USE_IRQ not supported +#endif + +#define CONFIG_DEVICE_NULLDEV 1 +#define CONFIG_SILENT_CONSOLE 1 + +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_DELAY_STR "d" + +#define CONFIG_VERSION_VARIABLE 1 + +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT \ + "mtdparts=physmap-flash.0:" \ + "128k(u-boot)ro," \ + "128k(u-boot-env)," \ + "1408k(kernel)," \ + "-(rootfs)" + +#define CONFIG_BOOTARGS \ + "root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200" + +#define CONFIG_BOOTCOMMAND "run flashboot" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdid=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 " \ + "1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 " \ + "10000000 ${filesize}\0" \ + "flui=tftp 21000000 cpuat91/uImage; protect off 10040000 " \ + "1019ffff; erase 10040000 1019ffff; cp.b 21000000 " \ + "10040000 ${filesize}\0" \ + "flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off " \ + "101a0000 10ffffff; erase 101a0000 10ffffff; cp.b " \ + "21000000 101A0000 ${filesize}\0" \ + "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ + "flashboot=run ramargs;bootm 10040000\0" \ + "netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \ + "bootm 21000000\0" +#endif /* __CONFIG_H */ diff --git a/include/ks8721.h b/include/ks8721.h new file mode 100644 index 0000000..d29910b --- /dev/null +++ b/include/ks8721.h @@ -0,0 +1,78 @@ +/* + * NOTE: DAVICOM ethernet Physical layer + * + * Version: KS8721.h + * + * Authors: Eric Benard (based on dm9161.h) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */ + +#define KS8721_BMCR 0 +#define KS8721_BMSR 1 +#define KS8721_PHYID1 2 +#define KS8721_PHYID2 3 +#define KS8721_ANAR 4 +#define KS8721_ANLPAR 5 +#define KS8721_ANER 6 +#define KS8721_RECR 15 +#define KS8721_MDINTR 27 +#define KS8721_100BT 31 + +/* --Bit definitions: KS8721_BMCR */ +#define KS8721_RESET (1 << 15) +#define KS8721_LOOPBACK (1 << 14) +#define KS8721_SPEED_SELECT (1 << 13) +#define KS8721_AUTONEG (1 << 12) +#define KS8721_POWER_DOWN (1 << 11) +#define KS8721_ISOLATE (1 << 10) +#define KS8721_RESTART_AUTONEG (1 << 9) +#define KS8721_DUPLEX_MODE (1 << 8) +#define KS8721_COLLISION_TEST (1 << 7) +#define KS8721_DISABLE (1 << 0) + +/*--Bit definitions: KS8721_BMSR */ +#define KS8721_100BASE_T4 (1 << 15) +#define KS8721_100BASE_TX_FD (1 << 14) +#define KS8721_100BASE_T4_HD (1 << 13) +#define KS8721_10BASE_T_FD (1 << 12) +#define KS8721_10BASE_T_HD (1 << 11) +#define KS8721_MF_PREAMB_SUPPR (1 << 6) +#define KS8721_AUTONEG_COMP (1 << 5) +#define KS8721_REMOTE_FAULT (1 << 4) +#define KS8721_AUTONEG_ABILITY (1 << 3) +#define KS8721_LINK_STATUS (1 << 2) +#define KS8721_JABBER_DETECT (1 << 1) +#define KS8721_EXTEND_CAPAB (1 << 0) + +/*--Bit definitions: KS8721_PHYID */ +#define KS8721_PHYID_OUI 0x0885 +#define KS8721_LSB_MASK 0x3F + +#define KS8721BL_MODEL 0x21 +#define KS8721_MODELMASK 0x3F0 +#define KS8721BL_REV 0x9 +#define KS8721_REVMASK 0xF + +/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */ +#define KS8721_NP (1 << 15) +#define KS8721_ACK (1 << 14) +#define KS8721_RF (1 << 13) +#define KS8721_PAUSE (1 << 10) +#define KS8721_T4 (1 << 9) +#define KS8721_TX_FDX (1 << 8) +#define KS8721_TX_HDX (1 << 7) +#define KS8721_10_FDX (1 << 6) +#define KS8721_10_HDX (1 << 5) +#define KS8721_AN_IEEE_802_3 0x0001 + +/****************** function prototypes **********************/ +unsigned int ks8721_IsPhyConnected(AT91PS_EMAC p_mac); +unsigned char ks8721_GetLinkSpeed(AT91PS_EMAC p_mac); +unsigned char ks8721_AutoNegotiate(AT91PS_EMAC p_mac, int *status); +unsigned char ks8721_InitPhy(AT91PS_EMAC p_mac);

CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode.

v3 : fix coding style issues

Signed-off-by: Eric Benard eric@eukrea.com --- MAINTAINERS | 4 + MAKEALL | 3 +- Makefile | 12 ++ board/eukrea/cpuat91/Makefile | 50 ++++++++ board/eukrea/cpuat91/config.mk | 1 + board/eukrea/cpuat91/cpuat91.c | 86 ++++++++++++++ cpu/arm920t/at91rm9200/Makefile | 5 +- cpu/arm920t/at91rm9200/ks8721.c | 242 +++++++++++++++++++++++++++++++++++++++ include/configs/cpuat91.h | 231 +++++++++++++++++++++++++++++++++++++ include/ks8721.h | 78 +++++++++++++ 10 files changed, 709 insertions(+), 3 deletions(-) create mode 100644 board/eukrea/cpuat91/Makefile create mode 100644 board/eukrea/cpuat91/config.mk create mode 100644 board/eukrea/cpuat91/cpuat91.c create mode 100644 cpu/arm920t/at91rm9200/ks8721.c create mode 100644 include/configs/cpuat91.h create mode 100644 include/ks8721.h

diff --git a/MAINTAINERS b/MAINTAINERS index 575a7ec..ed73b25 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -515,6 +515,10 @@ Dirk Behme dirk.behme@gmail.com

omap3_beagle ARM CORTEX-A8 (OMAP3530 SoC)

+Eric Benard eric@eukrea.com + + cpuat91 ARM920T + Rishi Bhattacharya rishi@ti.com

omap5912osk ARM926EJS diff --git a/MAKEALL b/MAKEALL index 020ff73..0e0b657 100755 --- a/MAKEALL +++ b/MAKEALL @@ -587,11 +587,12 @@ LIST_at91=" \ at91sam9260ek \ at91sam9261ek \ at91sam9263ek \ - at91sam9g10ek \ + at91sam9g10ek \ at91sam9g20ek \ at91sam9m10g45ek \ at91sam9rlek \ cmc_pu2 \ + cpuat91 \ csb637 \ kb9202 \ meesc \ diff --git a/Makefile b/Makefile index 090e645..3b348d9 100644 --- a/Makefile +++ b/Makefile @@ -2683,6 +2683,18 @@ at91rm9200ek_config : unconfig cmc_pu2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200

+cpuat91_ram_config \ +cpuat91_config : unconfig + @mkdir -p $(obj)include + @if [ "$(findstring _ram_,$@)" ] ; then \ + echo "#define CONFIG_CPUAT91_RAM 1" >>$(obj)include/config.h ; \ + $(XECHO) "... CPUAT91 configured for RAM" ; \ + else \ + echo "#define CONFIG_BOOTDELAY 1" >>$(obj)include/config.h ;\ + $(XECHO) "... CPUAT91 configured for Flash" ;\ + fi; + @$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200 + csb637_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200

diff --git a/board/eukrea/cpuat91/Makefile b/board/eukrea/cpuat91/Makefile new file mode 100644 index 0000000..08a90dc --- /dev/null +++ b/board/eukrea/cpuat91/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := cpuat91.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/eukrea/cpuat91/config.mk b/board/eukrea/cpuat91/config.mk new file mode 100644 index 0000000..ef8dda0 --- /dev/null +++ b/board/eukrea/cpuat91/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21F00000 diff --git a/board/eukrea/cpuat91/cpuat91.c b/board/eukrea/cpuat91/cpuat91.c new file mode 100644 index 0000000..adb3a56 --- /dev/null +++ b/board/eukrea/cpuat91/cpuat91.c @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2006 Eukrea Electromatique <www.eukrea.com> + * Eric Benard <ericeukrea.com> + * based on at91rm9200dk.c which is : + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger mgroeger@sysgo.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/AT91RM9200.h> +#include <at91rm9200_net.h> +#include <ks8721.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* memory and cpu-speed are setup before relocation + * so we do _nothing_ here + */ + + /* arch number of CPUAT91-Board */ + gd->bd->bi_arch_number = MACH_TYPE_CPUAT91; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#if defined(CONFIG_DRIVER_ETHER) +#if defined(CONFIG_CMD_NET) + +/* + * Name: + * at91rm9200_GetPhyInterface + * Description: + * Initialise the interface functions to the PHY + * Arguments: + * None + * Return value: + * None + */ +void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) +{ + p_phyops->Init = ks8721_InitPhy; + p_phyops->IsPhyConnected = ks8721_IsPhyConnected; + p_phyops->GetLinkSpeed = ks8721_GetLinkSpeed; + p_phyops->AutoNegotiate = ks8721_AutoNegotiate; +} + +#endif /* CONFIG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile index 73aeeac..114d8ad 100644 --- a/cpu/arm920t/at91rm9200/Makefile +++ b/cpu/arm920t/at91rm9200/Makefile @@ -31,14 +31,15 @@ COBJS += bcm5221.o COBJS += dm9161.o COBJS += ether.o COBJS += i2c.o +COBJS-$(CONFIG_KS8721_PHY) += ks8721.o COBJS += lxt972.o COBJS += reset.o COBJS += spi.o COBJS += timer.o COBJS += usb.o

-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))

all: $(obj).depend $(LIB)

diff --git a/cpu/arm920t/at91rm9200/ks8721.c b/cpu/arm920t/at91rm9200/ks8721.c new file mode 100644 index 0000000..e0cad1b --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8721.c @@ -0,0 +1,242 @@ +/* + * (C) Copyright 2006 + * Author : Eric Benard (Eukrea Electromatique) + * based on dm9161.c which is : + * (C) Copyright 2003 + * Author : Hamid Ikdoumi (Atmel) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91rm9200_net.h> +#include <net.h> +#include <ks8721.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if defined(CONFIG_CMD_NET) + +/* + * Name: + * ks8721_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * 1 - if id read successfully + * 0 - if error + */ +unsigned int ks8721_IsPhyConnected(AT91PS_EMAC p_mac) +{ + unsigned short id1, id2; + + at91rm9200_EmacEnableMDIO(p_mac); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_PHYID1, &id1); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_PHYID2, &id2); + at91rm9200_EmacDisableMDIO(p_mac); + + if ((id1 == (KS8721_PHYID_OUI >> 6)) && + ((id2 >> 10) == (KS8721_PHYID_OUI & KS8721_LSB_MASK))) { + if ((id2 & KS8721_MODELMASK) == KS8721BL_MODEL) + printf("Micrel KS8721bL PHY detected : "); + else + printf("Unknown Micrel PHY detected : "); + return 1; + } + return 0; +} + +/* + * Name: + * ks8721_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked and set in the + * MAC configuration registers + * Arguments: + * p_mac - pointer to MAC + * Return value: + * 1 - if link status set succesfully + * 0 - if link status not set + */ +unsigned char ks8721_GetLinkSpeed(AT91PS_EMAC p_mac) +{ + unsigned short stat1; + + if (!at91rm9200_EmacReadPhy(p_mac, KS8721_BMSR, &stat1)) + return 0; + + if (!(stat1 & KS8721_LINK_STATUS)) { /* link status up? */ + printf("Link Down !\n"); + return 0; + } + + if (stat1 & KS8721_100BASE_TX_FD) { + /*set Emac for 100BaseTX and Full Duplex */ + printf("100BT FD\n"); + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return 1; + } + + if (stat1 & KS8721_10BASE_T_FD) { + /*set MII for 10BaseT and Full Duplex */ + printf("10BT FD\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return 1; + } + + if (stat1 & KS8721_100BASE_T4_HD) { + /*set MII for 100BaseTX and Half Duplex */ + printf("100BT HD\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_SPD; + return 1; + } + + if (stat1 & KS8721_10BASE_T_HD) { + /*set MII for 10BaseT and Half Duplex */ + printf("10BT HD\n"); + p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return 1; + } + return 0; +} + +/* + * Name: + * ks8721_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation and the same is set in the MAC configuration registers + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * 1 - if link status set succesfully + * 0 - if link status not set + */ +unsigned char ks8721_InitPhy(AT91PS_EMAC p_mac) +{ + unsigned char ret = 1; + unsigned short intvalue; + + at91rm9200_EmacEnableMDIO(p_mac); + + if (!ks8721_GetLinkSpeed(p_mac)) { + /* Try another time */ + ret = ks8721_GetLinkSpeed(p_mac); + } + + /* Disable PHY Interrupts */ + intvalue = 0; + at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_MDINTR, &intvalue); + at91rm9200_EmacDisableMDIO(p_mac); + + return ret; +} + +/* + * Name: + * ks8721_AutoNegotiate + * Description: + * MAC Autonegotiates with the partner status of same is set in the + * MAC configuration registers + * Arguments: + * dev - pointer to struct net_device + * Return value: + * 1 - if link status set successfully + * 0 - if link status not set + */ +unsigned char ks8721_AutoNegotiate(AT91PS_EMAC p_mac, int *status) +{ + unsigned short value; + unsigned short phyanar; + unsigned short phyanalpar; + + /* Set ks8721 control register */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + value &= ~KS8721_AUTONEG; /* remove autonegotiation enable */ + value |= KS8721_ISOLATE; /* Electrically isolate PHY */ + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + + /* Set the Auto_negotiation Advertisement Register */ + /* MII advertising for Next page, 100BaseTxFD and HD, */ + /* 10BaseTFD and HD, IEEE 802.3 */ + phyanar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX | + KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_ANAR, &phyanar)) + return 0; + + /* Read the Control Register */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + + value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + /* Restart Auto_negotiation */ + value |= KS8721_RESTART_AUTONEG; + value &= ~KS8721_ISOLATE; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + + /*check AutoNegotiate complete */ + udelay(10000); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMSR, &value); + if (!(value & KS8721_AUTONEG_COMP)) + return 0; + + /* Get the AutoNeg Link partner base page */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_ANLPAR, &phyanalpar)) + return 0; + + if ((phyanar & KS8721_TX_FDX) && (phyanalpar & KS8721_TX_FDX)) { + /*set MII for 100BaseTX and Full Duplex */ + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return 1; + } + + if ((phyanar & KS8721_10_FDX) && (phyanalpar & KS8721_10_FDX)) { + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return 1; + } + return 0; +} + +#endif /* CONFIG_CMD_NET */ + +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h new file mode 100644 index 0000000..7633550 --- /dev/null +++ b/include/configs/cpuat91.h @@ -0,0 +1,231 @@ +/* + * CPUAT91 by (C) Copyright 2006 Eric Benard + * eric@eukrea.com + * + * Configuration settings for the CPUAT91 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#if defined(CONFIG_CPUAT91_RAM) +#define CONFIG_SKIP_LOWLEVEL_INIT 1 +#define CONFIG_SKIP_RELOCATE_UBOOT 1 +#endif + +#define AT91C_MAIN_CLOCK 179712000 +#define AT91C_MASTER_CLOCK 59904000 + +#define AT91_SLOW_CLOCK 32768 + +#define CONFIG_ARM920T 1 +#define CONFIG_AT91RM9200 1 +#define CONFIG_AT91RM9200DK 1 +#define CONFIG_CPUAT91 1 + +#undef CONFIG_USE_IRQ +#define USE_920T_MMU 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 +/* flash */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ + +/* clocks */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz for USB */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock */ + +/* sdram */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188C155 /* set up the SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +/* define one of these to choose the DBGU, USART0 or USART1 as console */ +#define CONFIG_AT91RM9200_USART 1 +#define CONFIG_DBGU 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 + +#undef CONFIG_HWFLOW +#undef CONFIG_MODEM_SUPPORT + +#define CONFIG_HARD_I2C 1 + +#if defined(CONFIG_HARD_I2C) +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 +#endif + +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +#include <config_cmd_default.h> + +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_MII 1 +#define CONFIG_CMD_CACHE 1 +#undef CONFIG_CMD_USB + +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NFS + +#if defined(CONFIG_HARD_I2C) +#define CONFIG_CMD_EEPROM 1 +#define CONFIG_CMD_I2C 1 +#endif + +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x02000000 + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END \ + (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024) + +#define CONFIG_DRIVER_ETHER 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_AT91C_USE_RMII 1 +#define CONFIG_PHY_ADDRESS (1 << 5) +#define CONFIG_KS8721_PHY 1 + +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_PROTECTION 1 +#define PHYS_FLASH_1 0x10000000 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +#if defined(CONFIG_CMD_USB) +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_AT91C_PQFP_UHPBU 1 +#undef CONFIG_SYS_USB_OHCI_BOARD_INIT +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#endif + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 + +#define CONFIG_SYS_LOAD_ADDR 0x21000000 + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } + +#define CONFIG_SYS_PROMPT "CPUAT91=> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_LONGHELP 1 + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) + +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_STACKSIZE (32 * 1024) + +#if defined(CONFIG_USE_IRQ) +#error CONFIG_USE_IRQ not supported +#endif + +#define CONFIG_DEVICE_NULLDEV 1 +#define CONFIG_SILENT_CONSOLE 1 + +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_DELAY_STR "d" + +#define CONFIG_VERSION_VARIABLE 1 + +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT \ + "mtdparts=physmap-flash.0:" \ + "128k(u-boot)ro," \ + "128k(u-boot-env)," \ + "1408k(kernel)," \ + "-(rootfs)" + +#define CONFIG_BOOTARGS \ + "root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200" + +#define CONFIG_BOOTCOMMAND "run flashboot" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdid=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 " \ + "1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 " \ + "10000000 ${filesize}\0" \ + "flui=tftp 21000000 cpuat91/uImage; protect off 10040000 " \ + "1019ffff; erase 10040000 1019ffff; cp.b 21000000 " \ + "10040000 ${filesize}\0" \ + "flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off " \ + "101a0000 10ffffff; erase 101a0000 10ffffff; cp.b " \ + "21000000 101A0000 ${filesize}\0" \ + "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ + "flashboot=run ramargs;bootm 10040000\0" \ + "netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \ + "bootm 21000000\0" +#endif /* __CONFIG_H */ diff --git a/include/ks8721.h b/include/ks8721.h new file mode 100644 index 0000000..79500e6 --- /dev/null +++ b/include/ks8721.h @@ -0,0 +1,78 @@ +/* + * NOTE: MICREL ethernet Physical layer + * + * Version: KS8721.h + * + * Authors: Eric Benard (based on dm9161.h) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */ + +#define KS8721_BMCR 0 +#define KS8721_BMSR 1 +#define KS8721_PHYID1 2 +#define KS8721_PHYID2 3 +#define KS8721_ANAR 4 +#define KS8721_ANLPAR 5 +#define KS8721_ANER 6 +#define KS8721_RECR 15 +#define KS8721_MDINTR 27 +#define KS8721_100BT 31 + +/* --Bit definitions: KS8721_BMCR */ +#define KS8721_RESET (1 << 15) +#define KS8721_LOOPBACK (1 << 14) +#define KS8721_SPEED_SELECT (1 << 13) +#define KS8721_AUTONEG (1 << 12) +#define KS8721_POWER_DOWN (1 << 11) +#define KS8721_ISOLATE (1 << 10) +#define KS8721_RESTART_AUTONEG (1 << 9) +#define KS8721_DUPLEX_MODE (1 << 8) +#define KS8721_COLLISION_TEST (1 << 7) +#define KS8721_DISABLE (1 << 0) + +/*--Bit definitions: KS8721_BMSR */ +#define KS8721_100BASE_T4 (1 << 15) +#define KS8721_100BASE_TX_FD (1 << 14) +#define KS8721_100BASE_T4_HD (1 << 13) +#define KS8721_10BASE_T_FD (1 << 12) +#define KS8721_10BASE_T_HD (1 << 11) +#define KS8721_MF_PREAMB_SUPPR (1 << 6) +#define KS8721_AUTONEG_COMP (1 << 5) +#define KS8721_REMOTE_FAULT (1 << 4) +#define KS8721_AUTONEG_ABILITY (1 << 3) +#define KS8721_LINK_STATUS (1 << 2) +#define KS8721_JABBER_DETECT (1 << 1) +#define KS8721_EXTEND_CAPAB (1 << 0) + +/*--Bit definitions: KS8721_PHYID */ +#define KS8721_PHYID_OUI 0x0885 +#define KS8721_LSB_MASK 0x3F + +#define KS8721BL_MODEL 0x21 +#define KS8721_MODELMASK 0x3F0 +#define KS8721BL_REV 0x9 +#define KS8721_REVMASK 0xF + +/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */ +#define KS8721_NP (1 << 15) +#define KS8721_ACK (1 << 14) +#define KS8721_RF (1 << 13) +#define KS8721_PAUSE (1 << 10) +#define KS8721_T4 (1 << 9) +#define KS8721_TX_FDX (1 << 8) +#define KS8721_TX_HDX (1 << 7) +#define KS8721_10_FDX (1 << 6) +#define KS8721_10_HDX (1 << 5) +#define KS8721_AN_IEEE_802_3 0x0001 + +/****************** function prototypes **********************/ +unsigned int ks8721_IsPhyConnected(AT91PS_EMAC p_mac); +unsigned char ks8721_GetLinkSpeed(AT91PS_EMAC p_mac); +unsigned char ks8721_AutoNegotiate(AT91PS_EMAC p_mac, int *status); +unsigned char ks8721_InitPhy(AT91PS_EMAC p_mac);

Dear Jean-Christophe PLAGNIOL-VILLARD,

In message 20090723222713.GC24893@game.jcrosoft.org you wrote:

...

--- a/Makefile +++ b/Makefile @@ -2683,6 +2683,18 @@ at91rm9200ek_config : unconfig cmc_pu2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200

+cpuat91_ram_config \ +cpuat91_config : unconfig

• @mkdir -p $(obj)include
• @if [ "$(findstring _ram_,$@)" ] ; then \

• echo "#define CONFIG_CPUAT91_RAM 1" >>$(obj)include/config.h ; \
  

same as other patch no need please define the #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_RELOCATE_UBOOT here

No. Not here, i. e. not in the Makefile. We don't want tens of lines of scripts per board in the top level Makefile.

Best regards,

Wolfgang Denk

...

-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))

all: $(obj).depend $(LIB)

diff --git a/cpu/arm920t/at91rm9200/ks8721.c b/cpu/arm920t/at91rm9200/ks8721.c new file mode 100644 index 0000000..703e58c --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8721.c @@ -0,0 +1,244 @@ +/*

• • (C) Copyright 2006
• • Author : Eric Benard (Eukrea Electromatique)
• • based on dm9161.c which is :
• • (C) Copyright 2003
• • Author : Hamid Ikdoumi (Atmel)

I'm not a fan of this implementation at all

but as I've not yet finish the rm9200 cleanup I'll ack this ben what do you think? ben please note that the rm9200 cleanup will introduce a phylib support

Ben ping

Best Regards, J.

CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode.

v3 : fix coding style issues v4 : fix coding style in ks8721

Signed-off-by: Eric Benard eric@eukrea.com --- MAINTAINERS | 4 + MAKEALL | 3 +- Makefile | 12 ++ board/eukrea/cpuat91/Makefile | 50 ++++++++ board/eukrea/cpuat91/config.mk | 1 + board/eukrea/cpuat91/cpuat91.c | 86 ++++++++++++++ cpu/arm920t/at91rm9200/Makefile | 5 +- cpu/arm920t/at91rm9200/ks8721.c | 242 +++++++++++++++++++++++++++++++++++++++ include/configs/cpuat91.h | 231 +++++++++++++++++++++++++++++++++++++ include/ks8721.h | 78 +++++++++++++ 10 files changed, 709 insertions(+), 3 deletions(-) create mode 100644 board/eukrea/cpuat91/Makefile create mode 100644 board/eukrea/cpuat91/config.mk create mode 100644 board/eukrea/cpuat91/cpuat91.c create mode 100644 cpu/arm920t/at91rm9200/ks8721.c create mode 100644 include/configs/cpuat91.h create mode 100644 include/ks8721.h

diff --git a/MAINTAINERS b/MAINTAINERS index 620604c..e45a5ef 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -521,6 +521,10 @@ Dirk Behme dirk.behme@gmail.com

omap3_beagle ARM CORTEX-A8 (OMAP3530 SoC)

+Eric Benard eric@eukrea.com + + cpuat91 ARM920T + Rishi Bhattacharya rishi@ti.com

omap5912osk ARM926EJS diff --git a/MAKEALL b/MAKEALL index dd0b761..6d18e7f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -595,11 +595,12 @@ LIST_at91=" \ at91sam9260ek \ at91sam9261ek \ at91sam9263ek \ - at91sam9g10ek \ + at91sam9g10ek \ at91sam9g20ek \ at91sam9m10g45ek \ at91sam9rlek \ cmc_pu2 \ + cpuat91 \ csb637 \ kb9202 \ meesc \ diff --git a/Makefile b/Makefile index ac844a7..655cb03 100644 --- a/Makefile +++ b/Makefile @@ -2673,6 +2673,18 @@ at91rm9200ek_config : unconfig cmc_pu2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200

+cpuat91_ram_config \ +cpuat91_config : unconfig + @mkdir -p $(obj)include + @if [ "$(findstring _ram_,$@)" ] ; then \ + echo "#define CONFIG_CPUAT91_RAM 1" >>$(obj)include/config.h ; \ + $(XECHO) "... CPUAT91 configured for RAM" ; \ + else \ + echo "#define CONFIG_BOOTDELAY 1" >>$(obj)include/config.h ;\ + $(XECHO) "... CPUAT91 configured for Flash" ;\ + fi; + @$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200 + csb637_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200

diff --git a/board/eukrea/cpuat91/Makefile b/board/eukrea/cpuat91/Makefile new file mode 100644 index 0000000..08a90dc --- /dev/null +++ b/board/eukrea/cpuat91/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := cpuat91.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/eukrea/cpuat91/config.mk b/board/eukrea/cpuat91/config.mk new file mode 100644 index 0000000..ef8dda0 --- /dev/null +++ b/board/eukrea/cpuat91/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21F00000 diff --git a/board/eukrea/cpuat91/cpuat91.c b/board/eukrea/cpuat91/cpuat91.c new file mode 100644 index 0000000..ae8eb76 --- /dev/null +++ b/board/eukrea/cpuat91/cpuat91.c @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2006 Eukrea Electromatique <www.eukrea.com> + * Eric Benard eric@eukrea.com + * based on at91rm9200dk.c which is : + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger mgroeger@sysgo.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/AT91RM9200.h> +#include <at91rm9200_net.h> +#include <ks8721.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* memory and cpu-speed are setup before relocation + * so we do _nothing_ here + */ + + /* arch number of CPUAT91-Board */ + gd->bd->bi_arch_number = MACH_TYPE_CPUAT91; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#if defined(CONFIG_DRIVER_ETHER) +#if defined(CONFIG_CMD_NET) + +/* + * Name: + * at91rm9200_GetPhyInterface + * Description: + * Initialise the interface functions to the PHY + * Arguments: + * None + * Return value: + * None + */ +void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) +{ + p_phyops->Init = ks8721_initphy; + p_phyops->IsPhyConnected = ks8721_isphyconnected; + p_phyops->GetLinkSpeed = ks8721_getlinkspeed; + p_phyops->AutoNegotiate = ks8721_autonegotiate; +} + +#endif /* CONFIG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile index 73aeeac..114d8ad 100644 --- a/cpu/arm920t/at91rm9200/Makefile +++ b/cpu/arm920t/at91rm9200/Makefile @@ -31,14 +31,15 @@ COBJS += bcm5221.o COBJS += dm9161.o COBJS += ether.o COBJS += i2c.o +COBJS-$(CONFIG_KS8721_PHY) += ks8721.o COBJS += lxt972.o COBJS += reset.o COBJS += spi.o COBJS += timer.o COBJS += usb.o

-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))

all: $(obj).depend $(LIB)

diff --git a/cpu/arm920t/at91rm9200/ks8721.c b/cpu/arm920t/at91rm9200/ks8721.c new file mode 100644 index 0000000..4ec0166 --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8721.c @@ -0,0 +1,242 @@ +/* + * (C) Copyright 2006 + * Author : Eric Benard (Eukrea Electromatique) + * based on dm9161.c which is : + * (C) Copyright 2003 + * Author : Hamid Ikdoumi (Atmel) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91rm9200_net.h> +#include <net.h> +#include <ks8721.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if defined(CONFIG_CMD_NET) + +/* + * Name: + * ks8721_isphyconnected + * Description: + * Reads the 2 PHY ID registers + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * 1 - if id read successfully + * 0 - if error + */ +unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac) +{ + unsigned short id1, id2; + + at91rm9200_EmacEnableMDIO(p_mac); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_PHYID1, &id1); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_PHYID2, &id2); + at91rm9200_EmacDisableMDIO(p_mac); + + if ((id1 == (KS8721_PHYID_OUI >> 6)) && + ((id2 >> 10) == (KS8721_PHYID_OUI & KS8721_LSB_MASK))) { + if ((id2 & KS8721_MODELMASK) == KS8721BL_MODEL) + printf("Micrel KS8721bL PHY detected : "); + else + printf("Unknown Micrel PHY detected : "); + return 1; + } + return 0; +} + +/* + * Name: + * ks8721_getlinkspeed + * Description: + * Link parallel detection status of MAC is checked and set in the + * MAC configuration registers + * Arguments: + * p_mac - pointer to MAC + * Return value: + * 1 - if link status set succesfully + * 0 - if link status not set + */ +unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac) +{ + unsigned short stat1; + + if (!at91rm9200_EmacReadPhy(p_mac, KS8721_BMSR, &stat1)) + return 0; + + if (!(stat1 & KS8721_LINK_STATUS)) { /* link status up? */ + printf("Link Down !\n"); + return 0; + } + + if (stat1 & KS8721_100BASE_TX_FD) { + /*set Emac for 100BaseTX and Full Duplex */ + printf("100BT FD\n"); + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return 1; + } + + if (stat1 & KS8721_10BASE_T_FD) { + /*set MII for 10BaseT and Full Duplex */ + printf("10BT FD\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return 1; + } + + if (stat1 & KS8721_100BASE_T4_HD) { + /*set MII for 100BaseTX and Half Duplex */ + printf("100BT HD\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_SPD; + return 1; + } + + if (stat1 & KS8721_10BASE_T_HD) { + /*set MII for 10BaseT and Half Duplex */ + printf("10BT HD\n"); + p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return 1; + } + return 0; +} + +/* + * Name: + * ks8721_initphy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation and the same is set in the MAC configuration registers + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * 1 - if link status set succesfully + * 0 - if link status not set + */ +unsigned char ks8721_initphy(AT91PS_EMAC p_mac) +{ + unsigned char ret = 1; + unsigned short intvalue; + + at91rm9200_EmacEnableMDIO(p_mac); + + if (!ks8721_getlinkspeed(p_mac)) { + /* Try another time */ + ret = ks8721_getlinkspeed(p_mac); + } + + /* Disable PHY Interrupts */ + intvalue = 0; + at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_MDINTR, &intvalue); + at91rm9200_EmacDisableMDIO(p_mac); + + return ret; +} + +/* + * Name: + * ks8721_autonegotiate + * Description: + * MAC Autonegotiates with the partner status of same is set in the + * MAC configuration registers + * Arguments: + * dev - pointer to struct net_device + * Return value: + * 1 - if link status set successfully + * 0 - if link status not set + */ +unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status) +{ + unsigned short value; + unsigned short phyanar; + unsigned short phyanalpar; + + /* Set ks8721 control register */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + value &= ~KS8721_AUTONEG; /* remove autonegotiation enable */ + value |= KS8721_ISOLATE; /* Electrically isolate PHY */ + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + + /* Set the Auto_negotiation Advertisement Register */ + /* MII advertising for Next page, 100BaseTxFD and HD, */ + /* 10BaseTFD and HD, IEEE 802.3 */ + phyanar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX | + KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_ANAR, &phyanar)) + return 0; + + /* Read the Control Register */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + + value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + /* Restart Auto_negotiation */ + value |= KS8721_RESTART_AUTONEG; + value &= ~KS8721_ISOLATE; + if (!at91rm9200_EmacWritePhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) + return 0; + + /*check AutoNegotiate complete */ + udelay(10000); + at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_BMSR, &value); + if (!(value & KS8721_AUTONEG_COMP)) + return 0; + + /* Get the AutoNeg Link partner base page */ + if (!at91rm9200_EmacReadPhy(p_mac, + CONFIG_PHY_ADDRESS | KS8721_ANLPAR, &phyanalpar)) + return 0; + + if ((phyanar & KS8721_TX_FDX) && (phyanalpar & KS8721_TX_FDX)) { + /*set MII for 100BaseTX and Full Duplex */ + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return 1; + } + + if ((phyanar & KS8721_10_FDX) && (phyanalpar & KS8721_10_FDX)) { + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return 1; + } + return 0; +} + +#endif /* CONFIG_CMD_NET */ + +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h new file mode 100644 index 0000000..7633550 --- /dev/null +++ b/include/configs/cpuat91.h @@ -0,0 +1,231 @@ +/* + * CPUAT91 by (C) Copyright 2006 Eric Benard + * eric@eukrea.com + * + * Configuration settings for the CPUAT91 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#if defined(CONFIG_CPUAT91_RAM) +#define CONFIG_SKIP_LOWLEVEL_INIT 1 +#define CONFIG_SKIP_RELOCATE_UBOOT 1 +#endif + +#define AT91C_MAIN_CLOCK 179712000 +#define AT91C_MASTER_CLOCK 59904000 + +#define AT91_SLOW_CLOCK 32768 + +#define CONFIG_ARM920T 1 +#define CONFIG_AT91RM9200 1 +#define CONFIG_AT91RM9200DK 1 +#define CONFIG_CPUAT91 1 + +#undef CONFIG_USE_IRQ +#define USE_920T_MMU 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 +/* flash */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ + +/* clocks */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz for USB */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock */ + +/* sdram */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188C155 /* set up the SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +/* define one of these to choose the DBGU, USART0 or USART1 as console */ +#define CONFIG_AT91RM9200_USART 1 +#define CONFIG_DBGU 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 + +#undef CONFIG_HWFLOW +#undef CONFIG_MODEM_SUPPORT + +#define CONFIG_HARD_I2C 1 + +#if defined(CONFIG_HARD_I2C) +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 +#endif + +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +#include <config_cmd_default.h> + +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_MII 1 +#define CONFIG_CMD_CACHE 1 +#undef CONFIG_CMD_USB + +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NFS + +#if defined(CONFIG_HARD_I2C) +#define CONFIG_CMD_EEPROM 1 +#define CONFIG_CMD_I2C 1 +#endif + +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x02000000 + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END \ + (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024) + +#define CONFIG_DRIVER_ETHER 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_AT91C_USE_RMII 1 +#define CONFIG_PHY_ADDRESS (1 << 5) +#define CONFIG_KS8721_PHY 1 + +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_PROTECTION 1 +#define PHYS_FLASH_1 0x10000000 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +#if defined(CONFIG_CMD_USB) +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_AT91C_PQFP_UHPBU 1 +#undef CONFIG_SYS_USB_OHCI_BOARD_INIT +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#endif + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 + +#define CONFIG_SYS_LOAD_ADDR 0x21000000 + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } + +#define CONFIG_SYS_PROMPT "CPUAT91=> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_LONGHELP 1 + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) + +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_STACKSIZE (32 * 1024) + +#if defined(CONFIG_USE_IRQ) +#error CONFIG_USE_IRQ not supported +#endif + +#define CONFIG_DEVICE_NULLDEV 1 +#define CONFIG_SILENT_CONSOLE 1 + +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_DELAY_STR "d" + +#define CONFIG_VERSION_VARIABLE 1 + +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT \ + "mtdparts=physmap-flash.0:" \ + "128k(u-boot)ro," \ + "128k(u-boot-env)," \ + "1408k(kernel)," \ + "-(rootfs)" + +#define CONFIG_BOOTARGS \ + "root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200" + +#define CONFIG_BOOTCOMMAND "run flashboot" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdid=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 " \ + "1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 " \ + "10000000 ${filesize}\0" \ + "flui=tftp 21000000 cpuat91/uImage; protect off 10040000 " \ + "1019ffff; erase 10040000 1019ffff; cp.b 21000000 " \ + "10040000 ${filesize}\0" \ + "flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off " \ + "101a0000 10ffffff; erase 101a0000 10ffffff; cp.b " \ + "21000000 101A0000 ${filesize}\0" \ + "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ + "flashboot=run ramargs;bootm 10040000\0" \ + "netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \ + "bootm 21000000\0" +#endif /* __CONFIG_H */ diff --git a/include/ks8721.h b/include/ks8721.h new file mode 100644 index 0000000..185d9bd --- /dev/null +++ b/include/ks8721.h @@ -0,0 +1,78 @@ +/* + * NOTE: MICREL ethernet Physical layer + * + * Version: KS8721.h + * + * Authors: Eric Benard (based on dm9161.h) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */ + +#define KS8721_BMCR 0 +#define KS8721_BMSR 1 +#define KS8721_PHYID1 2 +#define KS8721_PHYID2 3 +#define KS8721_ANAR 4 +#define KS8721_ANLPAR 5 +#define KS8721_ANER 6 +#define KS8721_RECR 15 +#define KS8721_MDINTR 27 +#define KS8721_100BT 31 + +/* --Bit definitions: KS8721_BMCR */ +#define KS8721_RESET (1 << 15) +#define KS8721_LOOPBACK (1 << 14) +#define KS8721_SPEED_SELECT (1 << 13) +#define KS8721_AUTONEG (1 << 12) +#define KS8721_POWER_DOWN (1 << 11) +#define KS8721_ISOLATE (1 << 10) +#define KS8721_RESTART_AUTONEG (1 << 9) +#define KS8721_DUPLEX_MODE (1 << 8) +#define KS8721_COLLISION_TEST (1 << 7) +#define KS8721_DISABLE (1 << 0) + +/*--Bit definitions: KS8721_BMSR */ +#define KS8721_100BASE_T4 (1 << 15) +#define KS8721_100BASE_TX_FD (1 << 14) +#define KS8721_100BASE_T4_HD (1 << 13) +#define KS8721_10BASE_T_FD (1 << 12) +#define KS8721_10BASE_T_HD (1 << 11) +#define KS8721_MF_PREAMB_SUPPR (1 << 6) +#define KS8721_AUTONEG_COMP (1 << 5) +#define KS8721_REMOTE_FAULT (1 << 4) +#define KS8721_AUTONEG_ABILITY (1 << 3) +#define KS8721_LINK_STATUS (1 << 2) +#define KS8721_JABBER_DETECT (1 << 1) +#define KS8721_EXTEND_CAPAB (1 << 0) + +/*--Bit definitions: KS8721_PHYID */ +#define KS8721_PHYID_OUI 0x0885 +#define KS8721_LSB_MASK 0x3F + +#define KS8721BL_MODEL 0x21 +#define KS8721_MODELMASK 0x3F0 +#define KS8721BL_REV 0x9 +#define KS8721_REVMASK 0xF + +/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */ +#define KS8721_NP (1 << 15) +#define KS8721_ACK (1 << 14) +#define KS8721_RF (1 << 13) +#define KS8721_PAUSE (1 << 10) +#define KS8721_T4 (1 << 9) +#define KS8721_TX_FDX (1 << 8) +#define KS8721_TX_HDX (1 << 7) +#define KS8721_10_FDX (1 << 6) +#define KS8721_10_HDX (1 << 5) +#define KS8721_AN_IEEE_802_3 0x0001 + +/****************** function prototypes **********************/ +unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac); +unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac); +unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status); +unsigned char ks8721_initphy(AT91PS_EMAC p_mac);

Dear Eric Benard,

In message 1249816414-18989-1-git-send-email-eric@eukrea.com you wrote:

CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode.

...

meesc \ diff --git a/Makefile b/Makefile index 54c0b67..2386cdc 100644 --- a/Makefile +++ b/Makefile @@ -2674,6 +2674,19 @@ at91rm9200ek_config : unconfig cmc_pu2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200

+cpuat91_ram_config \ +cpuat91_config : unconfig

• @mkdir -p $(obj)include
• @if [ "$(findstring _ram_,$@)" ] ; then \

• echo "#define CONFIG_SKIP_LOWLEVEL_INIT" >> $(obj)include/config.h; \
  

• echo "#define CONFIG_SKIP_RELOCATE_UBOOT" >> $(obj)include/config.h; \
  

• $(XECHO) "... CPUAT91 configured for RAM" ; \
  

• else \

• echo "#define CONFIG_BOOTDELAY 1" >>$(obj)include/config.h ; \
  

• $(XECHO) "... CPUAT91 configured for Flash" ;\
  

• fi;
• @$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200

csb637_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200

Please do not add such scripting to the top level Makefile. Perform it in your board config file instead.

For an example, please see http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/65499

...

+int board_init(void) +{

• /* Enable Ctrlc */
• console_init_f();
• /* memory and cpu-speed are setup before relocation

• * so we do _nothing_ here
  

• */
  

Incorrect multicomment style.

+unsigned char ks8721_initphy(AT91PS_EMAC p_mac) +{

• unsigned char ret = 1;
• unsigned short intvalue;
• at91rm9200_EmacEnableMDIO(p_mac);
• if (!ks8721_getlinkspeed(p_mac)) {

• /* Try another time */
  

• ret = ks8721_getlinkspeed(p_mac);
  

• }

Move comment up into the "if" line, and remove the braces for a single-line statement.

...

+unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status) +{

• unsigned short value;
• unsigned short phyanar;
• unsigned short phyanalpar;
• /* Set ks8721 control register */
• if (!at91rm9200_EmacReadPhy(p_mac,

• CONFIG_PHY_ADDRESS | KS8721_BMCR, &value))
  

• return 0;
  

Here and everywhere else: please add braces around multiline statements.

• value &= ~KS8721_AUTONEG; /* remove autonegotiation enable */
• value |= KS8721_ISOLATE; /* Electrically isolate PHY */
• if (!at91rm9200_EmacWritePhy(p_mac,

• CONFIG_PHY_ADDRESS | KS8721_BMCR, &value))
  

• return 0;
  

• /* Set the Auto_negotiation Advertisement Register */
• /* MII advertising for Next page, 100BaseTxFD and HD, */
• /* 10BaseTFD and HD, IEEE 802.3 */

Incorrect multiline comment style.

Best regards,

Wolfgang Denk

Signed-off-by: Eric Benard eric@eukrea.com --- MAKEALL | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/MAKEALL b/MAKEALL index 97a29f2..759ccc2 100755 --- a/MAKEALL +++ b/MAKEALL @@ -595,7 +595,7 @@ LIST_at91=" \ at91sam9260ek \ at91sam9261ek \ at91sam9263ek \ - at91sam9g10ek \ + at91sam9g10ek \ at91sam9g20ek \ at91sam9m10g45ek \ at91sam9rlek \

On 22:24 Wed 22 Jul , Ben Warren wrote:

Jean-Christophe PLAGNIOL-VILLARD wrote:

...

...

...

-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y)) all: $(obj).depend $(LIB) diff --git a/cpu/arm920t/at91rm9200/ks8721.c b/cpu/arm920t/at91rm9200/ks8721.c new file mode 100644 index 0000000..703e58c --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8721.c @@ -0,0 +1,244 @@ +/*

• • (C) Copyright 2006
• • Author : Eric Benard (Eukrea Electromatique)
• • based on dm9161.c which is :
• • (C) Copyright 2003
• • Author : Hamid Ikdoumi (Atmel)

I'm not a fan of this implementation at all

but as I've not yet finish the rm9200 cleanup I'll ack this ben what do you think? ben please note that the rm9200 cleanup will introduce a phylib support

Ben ping

Best Regards, J.

This patch has many coding style violations that haven't been addressed, so it can't go in. I"m not a fan of the piece-meal PHY implementation either, but realize that a real PHY lib isn't imminent, unless your rm2000 implementation is useful across architectures.

it will be a generic implementation as we need it also for other soc and arch for our boards.

Best Regards, J.