[PATCH 0/5] update venice dts
This series brings some recent upstream Linux dt updates into U-Boot for the Gateworks Venice family.
Tim Harvey (5): arm: dts: imx8mm-venice-gw7901: add digital I/O direction control GPIO's arm: dts: imx8mm-venice-gw7901: add TPM device arm: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS arm: dts: imx8mm-venice-gw71xx: add TPM device arm: dts: imx8mp-venice-gw71xx: add TPM device
.../dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 7 ++++ arch/arm/dts/imx8mm-venice-gw71xx.dtsi | 40 +++++++++---------- arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 14 +++++++ arch/arm/dts/imx8mm-venice-gw7901.dts | 14 ++++++- .../dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 9 +++++ arch/arm/dts/imx8mp-venice-gw71xx.dtsi | 10 ++++- 6 files changed, 69 insertions(+), 25 deletions(-)
The GW7901 has GPIO's to configure the direction of its isolated digital I/O signals. Add the GPIO pinmux, line names, and hog configuration.
Signed-off-by: Tim Harvey tharvey@gateworks.com --- arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 14 ++++++++++++++ arch/arm/dts/imx8mm-venice-gw7901.dts | 4 +++- 2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi index e68030e7b22c..9fa21942c0c6 100644 --- a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi @@ -43,6 +43,20 @@ };
&gpio4 { + dig1ctl { + gpio-hog; + output-low; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "dig1_ctl"; + }; + + dig2ctl { + gpio-hog; + output-low; + gpios = <5 GPIO_ACTIVE_HIGH>; + line-name = "dig2_ctl"; + }; + uart3_rs232 { gpio-hog; output-high; diff --git a/arch/arm/dts/imx8mm-venice-gw7901.dts b/arch/arm/dts/imx8mm-venice-gw7901.dts index 826627bd4503..ec8d80b76aee 100644 --- a/arch/arm/dts/imx8mm-venice-gw7901.dts +++ b/arch/arm/dts/imx8mm-venice-gw7901.dts @@ -303,7 +303,7 @@
&gpio4 { gpio-line-names = "", "", "", "", - "", "", "uart3_rs232#", "uart3_rs422#", + "dig1_ctl", "dig2_ctl", "uart3_rs232#", "uart3_rs422#", "uart3_rs485#", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "uart4_rs485#", "", "sim1det#", "sim2det#", ""; @@ -820,6 +820,8 @@
pinctrl_hog: hoggrp { fsl,pins = < + MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x40000041 /* DIG1_CTL */ + MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x40000041 /* DIG2_CTL */ MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* DIG2_OUT */ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* DIG2_IN */ MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* DIG1_IN */
Add the TPM device found on the GW7901 revision D PCB.
Signed-off-by: Tim Harvey tharvey@gateworks.com --- arch/arm/dts/imx8mm-venice-gw7901.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx8mm-venice-gw7901.dts b/arch/arm/dts/imx8mm-venice-gw7901.dts index ec8d80b76aee..9c1d68f2b741 100644 --- a/arch/arm/dts/imx8mm-venice-gw7901.dts +++ b/arch/arm/dts/imx8mm-venice-gw7901.dts @@ -269,7 +269,8 @@ &ecspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; - cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, + <&gpio4 24 GPIO_ACTIVE_LOW>; status = "okay";
flash@0 { @@ -278,6 +279,12 @@ spi-max-frequency = <40000000>; status = "okay"; }; + + tpm@1 { + compatible = "tcg,tpm_tis-spi"; + reg = <0x1>; + spi-max-frequency = <36000000>; + }; };
&fec1 { @@ -967,6 +974,7 @@ MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x140 + MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x140 >; };
The GW71xx does not have a gpio controlled vbus regulator but it does require some pinctrl. Remove the regulator and move the valid pinctrl into the usbotg1 node.
Signed-off-by: Tim Harvey tharvey@gateworks.com --- arch/arm/dts/imx8mm-venice-gw71xx.dtsi | 29 ++++++++------------------ 1 file changed, 9 insertions(+), 20 deletions(-)
diff --git a/arch/arm/dts/imx8mm-venice-gw71xx.dtsi b/arch/arm/dts/imx8mm-venice-gw71xx.dtsi index c557dbf4dcd6..2e90466db89a 100644 --- a/arch/arm/dts/imx8mm-venice-gw71xx.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw71xx.dtsi @@ -47,17 +47,6 @@ gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; status = "okay"; }; - - reg_usb_otg1_vbus: regulator-usb-otg1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usb1_en>; - compatible = "regulator-fixed"; - regulator-name = "usb_otg1_vbus"; - gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; };
/* off-board header */ @@ -146,9 +135,10 @@ };
&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; dr_mode = "otg"; over-current-active-low; - vbus-supply = <®_usb_otg1_vbus>; status = "okay"; };
@@ -206,14 +196,6 @@ >; };
- pinctrl_reg_usb1_en: regusb1grp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x41 - MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141 - MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41 - >; - }; - pinctrl_spi2: spi2grp { fsl,pins = < MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 @@ -236,4 +218,11 @@ MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 >; }; + + pinctrl_usbotg1: usbotg1grp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141 + MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41 + >; + }; };
Add the TPM device found on the GW71xx revision E PCB.
This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.
Signed-off-by: Tim Harvey tharvey@gateworks.com --- arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 7 +++++++ arch/arm/dts/imx8mm-venice-gw71xx.dtsi | 11 +++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi index b3592331c72b..07789c8d8835 100644 --- a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi @@ -25,6 +25,13 @@ gpios = <9 GPIO_ACTIVE_HIGH>; line-name = "dio1"; }; + + tpm_rst { + gpio-hog; + output-high; + gpios = <11 GPIO_ACTIVE_HIGH>; + line-name = "tpm_rst#"; + }; };
&gpio4 { diff --git a/arch/arm/dts/imx8mm-venice-gw71xx.dtsi b/arch/arm/dts/imx8mm-venice-gw71xx.dtsi index 2e90466db89a..ff8b367b3ab2 100644 --- a/arch/arm/dts/imx8mm-venice-gw71xx.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw71xx.dtsi @@ -49,12 +49,18 @@ }; };
-/* off-board header */ &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi2>; - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, + <&gpio1 10 GPIO_ACTIVE_LOW>; status = "okay"; + + tpm@1 { + compatible = "tcg,tpm_tis-spi"; + reg = <0x1>; + spi-max-frequency = <36000000>; + }; };
&gpio1 { @@ -202,6 +208,7 @@ MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6 >; };
Add the TPM device found on the GW71xx revision E PCB.
This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.
Signed-off-by: Tim Harvey tharvey@gateworks.com --- arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 9 +++++++++ arch/arm/dts/imx8mp-venice-gw71xx.dtsi | 10 +++++++++- 2 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi index 5c33f8c9cdcf..216a7a0d8d7c 100644 --- a/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi @@ -4,6 +4,15 @@ */ #include "imx8mp-venice-gw702x-u-boot.dtsi"
+&gpio1 { + tpm_rst { + gpio-hog; + output-high; + gpios = <11 GPIO_ACTIVE_HIGH>; + line-name = "tpm_rst#"; + }; +}; + &gpio4 { dio_1 { gpio-hog; diff --git a/arch/arm/dts/imx8mp-venice-gw71xx.dtsi b/arch/arm/dts/imx8mp-venice-gw71xx.dtsi index 86999f52d4b2..4b1dbaa64b6b 100644 --- a/arch/arm/dts/imx8mp-venice-gw71xx.dtsi +++ b/arch/arm/dts/imx8mp-venice-gw71xx.dtsi @@ -48,8 +48,15 @@ &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi2>; - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, + <&gpio1 10 GPIO_ACTIVE_LOW>; status = "okay"; + + tpm@1 { + compatible = "tcg,tpm_tis-spi"; + reg = <0x1>; + spi-max-frequency = <36000000>; + }; };
&gpio4 { @@ -217,6 +224,7 @@ MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 + MX8MP_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x140 >; };
Hi Tim,
On Mon, Feb 5, 2024 at 4:09 PM Tim Harvey tharvey@gateworks.com wrote:
This series brings some recent upstream Linux dt updates into U-Boot for the Gateworks Venice family.
Please specify what "some recent upstream Linux dt" means.
Is it 6.8-rc, linux-next, or Shawn's tree?
Can't you instead sync the imx8mm-venice DTs in U-Boot with this kernel tree?
Tim Harvey (5): arm: dts: imx8mm-venice-gw7901: add digital I/O direction control GPIO's arm: dts: imx8mm-venice-gw7901: add TPM device arm: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS arm: dts: imx8mm-venice-gw71xx: add TPM device arm: dts: imx8mp-venice-gw71xx: add TPM device
.../dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 7 ++++ arch/arm/dts/imx8mm-venice-gw71xx.dtsi | 40 +++++++++---------- arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 14 +++++++
Why is u-boot.dtsi being touched? Please add a justification.
arch/arm/dts/imx8mm-venice-gw7901.dts | 14 ++++++- .../dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 9 +++++
Same here.
On Mon, Feb 5, 2024 at 11:22 AM Fabio Estevam festevam@gmail.com wrote:
Hi Tim,
On Mon, Feb 5, 2024 at 4:09 PM Tim Harvey tharvey@gateworks.com wrote:
This series brings some recent upstream Linux dt updates into U-Boot for the Gateworks Venice family.
Please specify what "some recent upstream Linux dt" means.
Is it 6.8-rc, linux-next, or Shawn's tree?
Can't you instead sync the imx8mm-venice DTs in U-Boot with this kernel tree?
Tim Harvey (5): arm: dts: imx8mm-venice-gw7901: add digital I/O direction control GPIO's arm: dts: imx8mm-venice-gw7901: add TPM device arm: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS arm: dts: imx8mm-venice-gw71xx: add TPM device arm: dts: imx8mp-venice-gw71xx: add TPM device
.../dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 7 ++++ arch/arm/dts/imx8mm-venice-gw71xx.dtsi | 40 +++++++++---------- arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 14 +++++++
Why is u-boot.dtsi being touched? Please add a justification.
arch/arm/dts/imx8mm-venice-gw7901.dts | 14 ++++++- .../dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 9 +++++
Same here.
Fabio,
Ok, makes sense - drop this series. I will send a single patch instead with more detail if needed in the commit log.
Best regards,
Tim
On Mon, Feb 05, 2024 at 12:19:47PM -0800, Tim Harvey wrote:
On Mon, Feb 5, 2024 at 11:22 AM Fabio Estevam festevam@gmail.com wrote:
Hi Tim,
On Mon, Feb 5, 2024 at 4:09 PM Tim Harvey tharvey@gateworks.com wrote:
This series brings some recent upstream Linux dt updates into U-Boot for the Gateworks Venice family.
Please specify what "some recent upstream Linux dt" means.
Is it 6.8-rc, linux-next, or Shawn's tree?
Can't you instead sync the imx8mm-venice DTs in U-Boot with this kernel tree?
Tim Harvey (5): arm: dts: imx8mm-venice-gw7901: add digital I/O direction control GPIO's arm: dts: imx8mm-venice-gw7901: add TPM device arm: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS arm: dts: imx8mm-venice-gw71xx: add TPM device arm: dts: imx8mp-venice-gw71xx: add TPM device
.../dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 7 ++++ arch/arm/dts/imx8mm-venice-gw71xx.dtsi | 40 +++++++++---------- arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 14 +++++++
Why is u-boot.dtsi being touched? Please add a justification.
arch/arm/dts/imx8mm-venice-gw7901.dts | 14 ++++++- .../dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 9 +++++
Same here.
Fabio,
Ok, makes sense - drop this series. I will send a single patch instead with more detail if needed in the commit log.
Can you please look at https://patchwork.ozlabs.org/project/uboot/list/?series=393337&state=* and work on top of that? I would like to pull that in to v2024.04, still, and that will be a better long term path for your platforms as well. And if it looks like it would be a problem, getting that kind of feedback now is also appreciated. Thanks!
participants (3)
-
Fabio Estevam -
Tim Harvey -
Tom Rini