[U-Boot] [PATCH] riscv: serial: fix to load binary file over y-modem
This patch fixes the failure where loady a y-modem serial loader fails to load a binary over the serial port.
#loady <load-addr> <baudrate>
With loady after the serial port on board is put in receive mode, the tera-term sends a file using y-modem mode, but the tstc/getc never comes to know that a character has been received in RX buffer, and so cannot identify the header which results in serial transfer failure.
RX watermark bit is set when ever a character is received on serial port. Using RX watermark bit in the IP register solves this problem.
Patch is based on commit 884512f7dbf9 ("Merge tag 'uniphier-v2019.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier").
Booted linux kernel uImage loaded over y-modem on the HiFive Unleashed A00 board.
Sagar Shrikant Kadam (1): riscv : serial: use rx watermark to indicate rx data is present
drivers/serial/serial_sifive.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-)
In y-modem transfer mode, tstc/getc fail to check if there is any data available / received in RX FIFO, and so y-modem transfer never succeeds. Using receive watermark bit within ip register fixes the issue.
This patch is based on commit c7392b7bc4e1 ("Use the RX watermark interrupt pending bit for TSTC") available at[1]
[1] https://github.com/sifive/HiFive_U-Boot/tree/regression
Signed-off-by: Sagar Shrikant Kadam sagar.kadam@sifive.com ---
drivers/serial/serial_sifive.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index fdfef69..c142ccd 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -22,6 +22,9 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_TXCTRL_TXEN 0x1 #define UART_RXCTRL_RXEN 0x1
+/* IP register */ +#define UART_IP_RXWM 0x2 + struct uart_sifive { u32 txfifo; u32 rxfifo; @@ -34,7 +37,6 @@ struct uart_sifive {
struct sifive_uart_platdata { unsigned long clock; - int saved_input_char; struct uart_sifive *regs; };
@@ -94,7 +96,7 @@ static int _sifive_serial_getc(struct uart_sifive *regs) return -EAGAIN; ch &= UART_RXFIFO_DATA;
- return (!ch) ? -EAGAIN : ch; + return ch; }
static int sifive_serial_setbrg(struct udevice *dev, int baudrate) @@ -133,7 +135,6 @@ static int sifive_serial_probe(struct udevice *dev) if (gd->flags & GD_FLG_RELOC) return 0;
- platdata->saved_input_char = 0; _sifive_serial_init(platdata->regs);
return 0; @@ -145,12 +146,6 @@ static int sifive_serial_getc(struct udevice *dev) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
- if (platdata->saved_input_char > 0) { - c = platdata->saved_input_char; - platdata->saved_input_char = 0; - return c; - } - while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ;
return c; @@ -171,14 +166,10 @@ static int sifive_serial_pending(struct udevice *dev, bool input) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
- if (input) { - if (platdata->saved_input_char > 0) - return 1; - platdata->saved_input_char = _sifive_serial_getc(regs); - return (platdata->saved_input_char > 0) ? 1 : 0; - } else { + if (input) + return (readl(®s->ip) & UART_IP_RXWM); + else return !!(readl(®s->txfifo) & UART_TXFIFO_FULL); - } }
static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
On Tue, Jul 9, 2019 at 5:55 PM Sagar Shrikant Kadam sagar.kadam@sifive.com wrote:
In y-modem transfer mode, tstc/getc fail to check if there is any data available / received in RX FIFO, and so y-modem transfer never succeeds. Using receive watermark bit within ip register fixes the issue.
This patch is based on commit c7392b7bc4e1 ("Use the RX watermark interrupt pending bit for TSTC") available at[1]
[1] https://github.com/sifive/HiFive_U-Boot/tree/regression
Signed-off-by: Sagar Shrikant Kadam sagar.kadam@sifive.com
drivers/serial/serial_sifive.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index fdfef69..c142ccd 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -22,6 +22,9 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_TXCTRL_TXEN 0x1 #define UART_RXCTRL_RXEN 0x1
+/* IP register */ +#define UART_IP_RXWM 0x2
struct uart_sifive { u32 txfifo; u32 rxfifo; @@ -34,7 +37,6 @@ struct uart_sifive {
struct sifive_uart_platdata { unsigned long clock;
int saved_input_char; struct uart_sifive *regs;};
@@ -94,7 +96,7 @@ static int _sifive_serial_getc(struct uart_sifive *regs) return -EAGAIN; ch &= UART_RXFIFO_DATA;
return (!ch) ? -EAGAIN : ch;
return ch;}
static int sifive_serial_setbrg(struct udevice *dev, int baudrate) @@ -133,7 +135,6 @@ static int sifive_serial_probe(struct udevice *dev) if (gd->flags & GD_FLG_RELOC) return 0;
platdata->saved_input_char = 0; _sifive_serial_init(platdata->regs); return 0;@@ -145,12 +146,6 @@ static int sifive_serial_getc(struct udevice *dev) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (platdata->saved_input_char > 0) {c = platdata->saved_input_char;platdata->saved_input_char = 0;return c;}while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ; return c;@@ -171,14 +166,10 @@ static int sifive_serial_pending(struct udevice *dev, bool input) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (input) {if (platdata->saved_input_char > 0)return 1;platdata->saved_input_char = _sifive_serial_getc(regs);return (platdata->saved_input_char > 0) ? 1 : 0;} else {
if (input)return (readl(®s->ip) & UART_IP_RXWM);else return !!(readl(®s->txfifo) & UART_TXFIFO_FULL);
}}
static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
2.7.4
Looks good to me.
Reviewed-by: Anup Patel anup.patel@wdc.com Tested-by: Anup Patel anup.patel@wdc.com
Regards, Anup
Hi Anup,
On Wed, Jul 10, 2019 at 10:03 AM Anup Patel anup@brainfault.org wrote:
On Tue, Jul 9, 2019 at 5:55 PM Sagar Shrikant Kadam sagar.kadam@sifive.com wrote:
In y-modem transfer mode, tstc/getc fail to check if there is any data available / received in RX FIFO, and so y-modem transfer never succeeds. Using receive watermark bit within ip register fixes the issue.
This patch is based on commit c7392b7bc4e1 ("Use the RX watermark interrupt pending bit for TSTC") available at[1]
[1] https://github.com/sifive/HiFive_U-Boot/tree/regression
Signed-off-by: Sagar Shrikant Kadam sagar.kadam@sifive.com
drivers/serial/serial_sifive.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index fdfef69..c142ccd 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -22,6 +22,9 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_TXCTRL_TXEN 0x1 #define UART_RXCTRL_RXEN 0x1
+/* IP register */ +#define UART_IP_RXWM 0x2
struct uart_sifive { u32 txfifo; u32 rxfifo; @@ -34,7 +37,6 @@ struct uart_sifive {
struct sifive_uart_platdata { unsigned long clock;
int saved_input_char; struct uart_sifive *regs;};
@@ -94,7 +96,7 @@ static int _sifive_serial_getc(struct uart_sifive *regs) return -EAGAIN; ch &= UART_RXFIFO_DATA;
return (!ch) ? -EAGAIN : ch;
return ch;}
static int sifive_serial_setbrg(struct udevice *dev, int baudrate) @@ -133,7 +135,6 @@ static int sifive_serial_probe(struct udevice *dev) if (gd->flags & GD_FLG_RELOC) return 0;
platdata->saved_input_char = 0; _sifive_serial_init(platdata->regs); return 0;@@ -145,12 +146,6 @@ static int sifive_serial_getc(struct udevice *dev) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (platdata->saved_input_char > 0) {c = platdata->saved_input_char;platdata->saved_input_char = 0;return c;}while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ; return c;@@ -171,14 +166,10 @@ static int sifive_serial_pending(struct udevice *dev, bool input) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (input) {if (platdata->saved_input_char > 0)return 1;platdata->saved_input_char = _sifive_serial_getc(regs);return (platdata->saved_input_char > 0) ? 1 : 0;} else {
if (input)return (readl(®s->ip) & UART_IP_RXWM);else return !!(readl(®s->txfifo) & UART_TXFIFO_FULL);
}}
static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
2.7.4
Looks good to me.
Reviewed-by: Anup Patel anup.patel@wdc.com Tested-by: Anup Patel anup.patel@wdc.com
Thank you for testing it.
Regards, Anup
Reviewed-by: Padmarao Begari padmarao.begari@microchip.com Tested-by: Padmarao Begari padmarao.begari@microchip.com
Regards Padmarao
On Tue, Jul 9, 2019 at 5:56 PM Sagar Shrikant Kadam sagar.kadam@sifive.com wrote:
In y-modem transfer mode, tstc/getc fail to check if there is any data available / received in RX FIFO, and so y-modem transfer never succeeds. Using receive watermark bit within ip register fixes the issue.
This patch is based on commit c7392b7bc4e1 ("Use the RX watermark interrupt pending bit for TSTC") available at[1]
[1] https://github.com/sifive/HiFive_U-Boot/tree/regression
Signed-off-by: Sagar Shrikant Kadam sagar.kadam@sifive.com
drivers/serial/serial_sifive.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index fdfef69..c142ccd 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -22,6 +22,9 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_TXCTRL_TXEN 0x1 #define UART_RXCTRL_RXEN 0x1
+/* IP register */ +#define UART_IP_RXWM 0x2
struct uart_sifive { u32 txfifo; u32 rxfifo; @@ -34,7 +37,6 @@ struct uart_sifive {
struct sifive_uart_platdata { unsigned long clock;
int saved_input_char; struct uart_sifive *regs;};
@@ -94,7 +96,7 @@ static int _sifive_serial_getc(struct uart_sifive *regs) return -EAGAIN; ch &= UART_RXFIFO_DATA;
return (!ch) ? -EAGAIN : ch;
return ch;}
static int sifive_serial_setbrg(struct udevice *dev, int baudrate) @@ -133,7 +135,6 @@ static int sifive_serial_probe(struct udevice *dev) if (gd->flags & GD_FLG_RELOC) return 0;
platdata->saved_input_char = 0; _sifive_serial_init(platdata->regs); return 0;@@ -145,12 +146,6 @@ static int sifive_serial_getc(struct udevice *dev) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (platdata->saved_input_char > 0) {c = platdata->saved_input_char;platdata->saved_input_char = 0;return c;}while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ; return c;@@ -171,14 +166,10 @@ static int sifive_serial_pending(struct udevice *dev, bool input) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (input) {if (platdata->saved_input_char > 0)return 1;platdata->saved_input_char = _sifive_serial_getc(regs);return (platdata->saved_input_char > 0) ? 1 : 0;} else {
if (input)return (readl(®s->ip) & UART_IP_RXWM);else return !!(readl(®s->txfifo) & UART_TXFIFO_FULL);
}}
static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
2.7.4
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Hi Padmarao,
On Mon, Jul 15, 2019 at 5:31 PM Padmarao Begari padmarao.b@gmail.com wrote:
Reviewed-by: Padmarao Begari padmarao.begari@microchip.com Tested-by: Padmarao Begari padmarao.begari@microchip.com
Thank you for the review and testing the changes.
Regards Padmarao
BR, Sagar Kadam
On Tue, Jul 9, 2019 at 5:56 PM Sagar Shrikant Kadam sagar.kadam@sifive.com wrote:
In y-modem transfer mode, tstc/getc fail to check if there is any data available / received in RX FIFO, and so y-modem transfer never succeeds. Using receive watermark bit within ip register fixes the issue.
This patch is based on commit c7392b7bc4e1 ("Use the RX watermark interrupt pending bit for TSTC") available at[1]
[1] https://github.com/sifive/HiFive_U-Boot/tree/regression
Signed-off-by: Sagar Shrikant Kadam sagar.kadam@sifive.com
drivers/serial/serial_sifive.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index fdfef69..c142ccd 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -22,6 +22,9 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_TXCTRL_TXEN 0x1 #define UART_RXCTRL_RXEN 0x1
+/* IP register */ +#define UART_IP_RXWM 0x2
struct uart_sifive { u32 txfifo; u32 rxfifo; @@ -34,7 +37,6 @@ struct uart_sifive {
struct sifive_uart_platdata { unsigned long clock;
int saved_input_char; struct uart_sifive *regs;};
@@ -94,7 +96,7 @@ static int _sifive_serial_getc(struct uart_sifive *regs) return -EAGAIN; ch &= UART_RXFIFO_DATA;
return (!ch) ? -EAGAIN : ch;
return ch;}
static int sifive_serial_setbrg(struct udevice *dev, int baudrate) @@ -133,7 +135,6 @@ static int sifive_serial_probe(struct udevice *dev) if (gd->flags & GD_FLG_RELOC) return 0;
platdata->saved_input_char = 0; _sifive_serial_init(platdata->regs); return 0;@@ -145,12 +146,6 @@ static int sifive_serial_getc(struct udevice *dev) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (platdata->saved_input_char > 0) {c = platdata->saved_input_char;platdata->saved_input_char = 0;return c;}while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ; return c;@@ -171,14 +166,10 @@ static int sifive_serial_pending(struct udevice *dev, bool input) struct sifive_uart_platdata *platdata = dev_get_platdata(dev); struct uart_sifive *regs = platdata->regs;
if (input) {if (platdata->saved_input_char > 0)return 1;platdata->saved_input_char = _sifive_serial_getc(regs);return (platdata->saved_input_char > 0) ? 1 : 0;} else {
if (input)return (readl(®s->ip) & UART_IP_RXWM);else return !!(readl(®s->txfifo) & UART_TXFIFO_FULL);
}}
static int sifive_serial_ofdata_to_platdata(struct udevice *dev)
2.7.4
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participants (4)
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Sagar Shrikant Kadam