[U-Boot] saveenv corrupts QSPI flash with latest commit U-Boot 2019.04-rc4-00047-gcfb3e102c4

26 Mar 2019


      Hello Maintainers,
With latest commit I see that saveenv command corrupts QSPI-flash, meaning if I read QSPI-flash at 0x0 offset RCW(reset configuration word) is erased after saveenv command was executed.
This is tested on LS1088ARDB, but it should not be limited to LS1088ARDB rather it will valid for all LS Freescale ARM boards.( like LS1088, LS2080/LS2085, LS1012, LS1043, LS1046).
Logs below:
U-Boot 2019.04-rc4-00047-gcfb3e102c4 (Mar 25 2019 - 17:09:17 +0530)
SoC:  LS1088AE Rev1.0 (0x87030010)
Clock Configuration:
       CPU0(A53):1600 MHz  CPU1(A53):1600 MHz  CPU2(A53):1600 MHz
       CPU3(A53):1600 MHz  CPU4(A53):1600 MHz  CPU5(A53):1600 MHz
       CPU6(A53):1600 MHz  CPU7(A53):1600 MHz
       Bus:      700  MHz  DDR:      2100 MT/s
Reset Configuration Word (RCW):
       00000000: 4000541c 00000040 00000000 00000000
       00000010: 00000000 000a0000 00300000 00000000
       00000020: 00a011a0 00002580 00000000 00000040
       00000030: 0000005b 00000000 00002403 00000000
       00000040: 00000000 00000000 00000000 00000000
       00000050: 00000000 00000000 00000000 00000000
       00000060: 00000000 00000000 00000011 000009e7
       00000070: 44110000 00509555
I2C:   ready
VID: Core voltage after adjustment is at 1025 mV
DRAM:  Initializing DDR....using SPD
Detected UDIMM 18ASF1G72AZ-2G3B1
Address hashing enabled.
7.9 GiB
DDR    7.9 GiB (DDR4, 64-bit, CL=15, ECC on)
       DDR Chip-Select Interleaving Mode: CS0+CS1
PPA Firmware: Version LSDK-18.09
Using SERDES1 Protocol: 29 (0x1d)
Using SERDES2 Protocol: 13 (0xd)
NAND:  512 MiB
MMC:   FSL_SDHC: 0
Loading Environment from SPI Flash... SF: Detected s25fl512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB
*** Warning - bad CRC, using default environment
EEPROM: NXID v1
In:    serial
Out:   serial
Err:   serial
Model: NXP Layerscape 1088a RDB Board
Board: LS1088A-RDB, Board Arch: V1, Board version: C, boot from QSPI:1
CPLD: v1.8
SERDES1 Reference : Clock1 = 100MHz Clock2 = 156.25MHz
SERDES2 Reference : Clock1 = 100MHz Clock2 = 100MHz
Net:   PHY reset timed out
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
PCIe2: pcie@3600000 Root Complex: x1 gen1
e1000: 68:05:ca:16:8b:30
       DPMAC1@xgmii [PRIME], DPMAC2@xgmii, DPMAC3@qsgmii, DPMAC4@qsgmii, DPMAC5@qsgmii, DPMAC6@qsgmii, DPMAC7@qsgmii, DPMAC8@qsgmii, DPMAC9@qsgmii, DPMAC10@qsgmii, e1000#0
Warning: e1000#0 MAC addresses don't match:
Address in SROM is         68:05:ca:16:8b:30
Address in environment is  00:04:9f:04:79:f3
SF: Detected s25fl512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB
device 0 offset 0xa00000, size 0x100000
SF: 1048576 bytes @ 0xa00000 Read: OK
device 0 offset 0xe00000, size 0x100000
SF: 1048576 bytes @ 0xe00000 Read: OK
crc32+
fsl-mc: Booting Management Complex ... SUCCESS
fsl-mc: Management Complex booted (version: 10.10.0, boot status: 0x1)
Hit any key to stop autoboot:  0
=>
=>
=>
=>
=>
=>
=> savee
Saving Environment to SPI Flash... Erasing SPI flash...Writing to SPI flash...done
OK
=> sf read a0000000 0 40000
device 0 offset 0x0, size 0x40000
SF: 262144 bytes @ 0x0 Read: OK
=> md a0000000
a0000000: ffffffff ffffffff ffffffff ffffffff    ................
a0000010: ffffffff ffffffff ffffffff ffffffff    ................
a0000020: ffffffff ffffffff ffffffff ffffffff    ................
a0000030: ffffffff ffffffff ffffffff ffffffff    ................
a0000040: ffffffff ffffffff ffffffff ffffffff    ................
a0000050: ffffffff ffffffff ffffffff ffffffff    ................
a0000060: ffffffff ffffffff ffffffff ffffffff    ................
a0000070: ffffffff ffffffff ffffffff ffffffff    ................
a0000080: ffffffff ffffffff ffffffff ffffffff    ................
a0000090: ffffffff ffffffff ffffffff ffffffff    ................
a00000a0: ffffffff ffffffff ffffffff ffffffff    ................
a00000b0: ffffffff ffffffff ffffffff ffffffff    ................
a00000c0: ffffffff ffffffff ffffffff ffffffff    ................
a00000d0: ffffffff ffffffff ffffffff ffffffff    ................
a00000e0: ffffffff ffffffff ffffffff ffffffff    ................
a00000f0: ffffffff ffffffff ffffffff ffffffff    ................
Regards
Ashish

Ashish Kumar

Vignesh Raghavendra

Ashish Kumar

Vignesh Raghavendra

Ashish Kumar

Vignesh Raghavendra

Ashish Kumar

Vignesh Raghavendra

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