[U-Boot] [PATCH 00/10] Add Marvell ESPRESSOBin community board support

From: Konstantin Porotchkin kostap@marvell.com
This patch set adds support for Marvell ESPRESSOBin community board. The Marvell ESPRESSOBin is a tiny board made by Globalscale and available on KickStarter site. It has (current board version 3.1.1): - Dual core Cortex-A53 @1.2GHz CPU (Marvell Armada-3720) - 512MB/1GB/2GB DDR3 RAM (depends on selected configuration) - Mini-PCIe 2.0 slot - Single SATA-3 port with Molex SATA power connector - USB 2.0 port - USB 3.0 port - Gigabit Ethernet switch with 3 ports - Micro-SD socket - Two 46-pin GPIO connectors. - SPI boot flash - Boot source selection jumpers (SPI/SATA/UART/Auto) - Micro JTAG connector (10 pin) - Micro USB serial port
Konstantin Porotchkin (10): arm64: a37xx: Enable Marvell ETH PHY support arm64: a37xx: Enable bubt command support on A3720-DB arm64: a37xx: dts: Add pin control nodes to DT arm64: a37xx: Handle pin controls in early board init mvebu: neta: Add support for board init function mvebu: neta: a37xx: Add fixed link support to neta driver mvebu: a37xx: Add init for ESPRESSBin Topaz switch arm64: dts: Add device tree for ESPRESSOBin board arm64: mvebu: Add default config for ESPRESSOBin board arm64: a3720: Disable DB configurations on ESPRESSOBin board
arch/arm/dts/Makefile | 1 + arch/arm/dts/armada-3720-espressobin.dts | 135 ++++++++++++++++++++++++++++ arch/arm/dts/armada-37xx.dtsi | 14 +++ board/Marvell/mvebu_db-88f3720/board.c | 83 ++++++++++++++++- configs/mvebu_db-88f3720_defconfig | 3 + configs/mvebu_espressobin-88f3720_defconfig | 67 ++++++++++++++ drivers/net/mvneta.c | 125 ++++++++++++++++++++------ include/configs/mvebu_db-88f3720.h | 1 + 8 files changed, 400 insertions(+), 29 deletions(-) create mode 100644 arch/arm/dts/armada-3720-espressobin.dts create mode 100644 configs/mvebu_espressobin-88f3720_defconfig

From: Konstantin Porotchkin kostap@marvell.com
Enable support for Marvell Ethernet PHYs on A37xx platforms
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- include/configs/mvebu_db-88f3720.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/configs/mvebu_db-88f3720.h b/include/configs/mvebu_db-88f3720.h index 753ed1e..fb30073 100644 --- a/include/configs/mvebu_db-88f3720.h +++ b/include/configs/mvebu_db-88f3720.h @@ -93,6 +93,7 @@ #define CONFIG_PHY_GIGE /* GbE speed/duplex detect */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 +#define CONFIG_PHY_MARVELL
/* USB 2.0 */ #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3

From: Konstantin Porotchkin kostap@marvell.com
Enable mvebu bubt command support on A3720 DB
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- configs/mvebu_db-88f3720_defconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 80f2599..7478b74 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -33,6 +33,9 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_MAC_PARTITION=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_SHA1=y +CONFIG_SHA256=y CONFIG_BLOCK_CACHE=y CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y

From: Konstantin Porotchkin kostap@marvell.com
Add pin control nodes for North and South bridges to Armada-37xx DT
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- arch/arm/dts/armada-37xx.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi index 062f2a6..5bea63b 100644 --- a/arch/arm/dts/armada-37xx.dtsi +++ b/arch/arm/dts/armada-37xx.dtsi @@ -193,6 +193,20 @@ status = "disabled"; };
+ pinctl0: pinctl@13830 { /* north bridge */ + compatible = "marvell,armada-3700-pinctl"; + bank-name = "armada-3700-nb"; + reg = <0x13830 0x4>; + pin-count = <36>; + }; + + pinctl1: pinctl@18830 { /* south bridge */ + compatible = "marvell,armada-3700-pinctl"; + bank-name = "armada-3700-sb"; + reg = <0x18830 0x4>; + pin-count = <30>; + }; + comphy: comphy@18300 { compatible = "marvell,mvebu-comphy", "marvell,comphy-armada-3700"; reg = <0x18300 0x28>,

From: Konstantin Porotchkin kostap@marvell.com
Fix the default pin control values in a board-specific function on early board init stage. This fix allows the NETA driver to work in RGMII mode until the full-featured pin control driver gets introduced.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- board/Marvell/mvebu_db-88f3720/board.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index edf88c7..3337f3f 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -19,9 +19,33 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_IO_REG_0_SATA_OFF 2 #define I2C_IO_REG_0_USB_H_OFF 1
+#define PINCTRL_NB_REG_VALUE 0x000173fa +#define PINCTRL_SB_REG_VALUE 0x00007a23 + int board_early_init_f(void) { - /* Nothing to do (yet), perhaps later some pin-muxing etc */ + const void *blob = gd->fdt_blob; + const char *bank_name; + const char *compat = "marvell,armada-3700-pinctl"; + int off, len; + void __iomem *addr; + + /* FIXME + * Temporary WA for setting correct pin control values + * until the real pin control driver is awailable. + */ + off = fdt_node_offset_by_compatible(blob, -1, compat); + while (off != -FDT_ERR_NOTFOUND) { + bank_name = fdt_getprop(blob, off, "bank-name", &len); + addr = (void __iomem *)fdtdec_get_addr_size_auto_noparent( + blob, off, "reg", 0, NULL, true); + if (!strncmp(bank_name, "armada-3700-nb", len)) + writel(PINCTRL_NB_REG_VALUE, addr); + else if (!strncmp(bank_name, "armada-3700-sb", len)) + writel(PINCTRL_SB_REG_VALUE, addr); + + off = fdt_node_offset_by_compatible(blob, off, compat); + }
return 0; }

Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Fix the default pin control values in a board-specific function on early board init stage. This fix allows the NETA driver to work in RGMII mode until the full-featured pin control driver gets introduced.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index edf88c7..3337f3f 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -19,9 +19,33 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_IO_REG_0_SATA_OFF 2 #define I2C_IO_REG_0_USB_H_OFF 1
+#define PINCTRL_NB_REG_VALUE 0x000173fa +#define PINCTRL_SB_REG_VALUE 0x00007a23
I am aware that this is a temporary solution, but are these values correct for the A3720-DB or only the ESPRESSBin board?
BTW: You are now using the "Marvell/mvebu_db-88f3720" board directory for multiple board and not only the A3720-DB. I would prefer to see a rename of the board directory before this, like we've done to the A7k/8k directory. What do you think?
int board_early_init_f(void) {
- /* Nothing to do (yet), perhaps later some pin-muxing etc */
const void *blob = gd->fdt_blob;
const char *bank_name;
const char *compat = "marvell,armada-3700-pinctl";
int off, len;
void __iomem *addr;
/* FIXME
* Temporary WA for setting correct pin control values
* until the real pin control driver is awailable.
*/
off = fdt_node_offset_by_compatible(blob, -1, compat);
while (off != -FDT_ERR_NOTFOUND) {
bank_name = fdt_getprop(blob, off, "bank-name", &len);
addr = (void __iomem *)fdtdec_get_addr_size_auto_noparent(
blob, off, "reg", 0, NULL, true);
if (!strncmp(bank_name, "armada-3700-nb", len))
writel(PINCTRL_NB_REG_VALUE, addr);
else if (!strncmp(bank_name, "armada-3700-sb", len))
writel(PINCTRL_SB_REG_VALUE, addr);
off = fdt_node_offset_by_compatible(blob, off, compat);
}
return 0;
}
Thanks, Stefan

Hi, Stefan,
On 2/14/2017 13:43, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Fix the default pin control values in a board-specific function on early board init stage. This fix allows the NETA driver to work in RGMII mode until the full-featured pin control driver gets introduced.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index edf88c7..3337f3f 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -19,9 +19,33 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_IO_REG_0_SATA_OFF 2 #define I2C_IO_REG_0_USB_H_OFF 1
+#define PINCTRL_NB_REG_VALUE 0x000173fa +#define PINCTRL_SB_REG_VALUE 0x00007a23
I am aware that this is a temporary solution, but are these values correct for the A3720-DB or only the ESPRESSBin board?
They are good for the DB board as well. Actually without this change the NETA driver will crash if we try to ping the server.
BTW: You are now using the "Marvell/mvebu_db-88f3720" board directory for multiple board and not only the A3720-DB. I would prefer to see a rename of the board directory before this, like we've done to the A7k/8k directory. What do you think?
Agree, I can do it. Should we change it in this patch series or introduce an additional patch later?
int board_early_init_f(void) {
- /* Nothing to do (yet), perhaps later some pin-muxing etc */
const void *blob = gd->fdt_blob;
const char *bank_name;
const char *compat = "marvell,armada-3700-pinctl";
int off, len;
void __iomem *addr;
/* FIXME
* Temporary WA for setting correct pin control values
* until the real pin control driver is awailable.
*/
off = fdt_node_offset_by_compatible(blob, -1, compat);
while (off != -FDT_ERR_NOTFOUND) {
bank_name = fdt_getprop(blob, off, "bank-name", &len);
addr = (void __iomem *)fdtdec_get_addr_size_auto_noparent(
blob, off, "reg", 0, NULL, true);
if (!strncmp(bank_name, "armada-3700-nb", len))
writel(PINCTRL_NB_REG_VALUE, addr);
else if (!strncmp(bank_name, "armada-3700-sb", len))
writel(PINCTRL_SB_REG_VALUE, addr);
off = fdt_node_offset_by_compatible(blob, off, compat);
}
return 0;
}
Thanks, Stefan

On 14.02.2017 13:07, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:43, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Fix the default pin control values in a board-specific function on early board init stage. This fix allows the NETA driver to work in RGMII mode until the full-featured pin control driver gets introduced.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index edf88c7..3337f3f 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -19,9 +19,33 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_IO_REG_0_SATA_OFF 2 #define I2C_IO_REG_0_USB_H_OFF 1
+#define PINCTRL_NB_REG_VALUE 0x000173fa +#define PINCTRL_SB_REG_VALUE 0x00007a23
I am aware that this is a temporary solution, but are these values correct for the A3720-DB or only the ESPRESSBin board?
They are good for the DB board as well. Actually without this change the NETA driver will crash if we try to ping the server.
Okay. And do you have any ideas on when this pinctrl driver might be available?
BTW: You are now using the "Marvell/mvebu_db-88f3720" board directory for multiple board and not only the A3720-DB. I would prefer to see a rename of the board directory before this, like we've done to the A7k/8k directory. What do you think?
Agree, I can do it. Should we change it in this patch series or introduce an additional patch later?
We have no chance to get this patchset into this release, so we have a bit of time for the next one. I would prefer a clean switch and add this rename as one of the first patches in the next version of this patchset.
Thanks, Stefan

On 2/14/2017 14:21, Stefan Roese wrote:
On 14.02.2017 13:07, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:43, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Fix the default pin control values in a board-specific function on early board init stage. This fix allows the NETA driver to work in RGMII mode until the full-featured pin control driver gets introduced.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index edf88c7..3337f3f 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -19,9 +19,33 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_IO_REG_0_SATA_OFF 2 #define I2C_IO_REG_0_USB_H_OFF 1
+#define PINCTRL_NB_REG_VALUE 0x000173fa +#define PINCTRL_SB_REG_VALUE 0x00007a23
I am aware that this is a temporary solution, but are these values correct for the A3720-DB or only the ESPRESSBin board?
They are good for the DB board as well. Actually without this change the NETA driver will crash if we try to ping the server.
Okay. And do you have any ideas on when this pinctrl driver might be available?
I will query our team that is responsible for A37xx features. I think they are currently working on SATA/SCSI issues discovered when moved to the new code base. Hope the pin control will be the next task, but I have to ensure it.
BTW: You are now using the "Marvell/mvebu_db-88f3720" board directory for multiple board and not only the A3720-DB. I would prefer to see a rename of the board directory before this, like we've done to the A7k/8k directory. What do you think?
Agree, I can do it. Should we change it in this patch series or introduce an additional patch later?
We have no chance to get this patchset into this release, so we have a bit of time for the next one. I would prefer a clean switch and add this rename as one of the first patches in the next version of this patchset.
Ok, got you, I will work on this change.
Thanks, Stefan

On 02/14/2017 02:25 PM, Konstantin Porotchkin wrote:
On 2/14/2017 14:21, Stefan Roese wrote:
On 14.02.2017 13:07, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:43, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Fix the default pin control values in a board-specific function on early board init stage. This fix allows the NETA driver to work in RGMII mode until the full-featured pin control driver gets introduced.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index edf88c7..3337f3f 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -19,9 +19,33 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_IO_REG_0_SATA_OFF 2 #define I2C_IO_REG_0_USB_H_OFF 1
+#define PINCTRL_NB_REG_VALUE 0x000173fa +#define PINCTRL_SB_REG_VALUE 0x00007a23
I am aware that this is a temporary solution, but are these values correct for the A3720-DB or only the ESPRESSBin board?
They are good for the DB board as well. Actually without this change the NETA driver will crash if we try to ping the server.
Okay. And do you have any ideas on when this pinctrl driver might be available?
I will query our team that is responsible for A37xx features. I think they are currently working on SATA/SCSI issues discovered when moved to the new code base. Hope the pin control will be the next task, but I have to ensure it.
Just got an update - the pin control driver task is scheduled to March.
BTW: You are now using the "Marvell/mvebu_db-88f3720" board directory for multiple board and not only the A3720-DB. I would prefer to see a rename of the board directory before this, like we've done to the A7k/8k directory. What do you think?
Agree, I can do it. Should we change it in this patch series or introduce an additional patch later?
We have no chance to get this patchset into this release, so we have a bit of time for the next one. I would prefer a clean switch and add this rename as one of the first patches in the next version of this patchset.
Ok, got you, I will work on this change.
Thanks, Stefan

From: Konstantin Porotchkin kostap@marvell.com
Add ability to use board-specific initialization flow to NETA driver (for instance Ethernet switch bring-up)
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- drivers/net/mvneta.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index 674075f..a1e2136 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -404,6 +404,15 @@ static struct buffer_location buffer_loc; */ #define BD_SPACE (1 << 20)
+/* + * Dummy implementation that can be overwritten by a board + * specific function + */ +__weak int board_network_enable(struct mii_dev *bus) +{ + return 0; +} + /* Utility/helper methods */
/* Write helper method */ @@ -1615,6 +1624,7 @@ static int mvneta_probe(struct udevice *dev) struct mii_dev *bus; unsigned long addr; void *bd_space; + int ret;
/* * Allocate buffer area for descs and rx_buffers. This is only @@ -1664,7 +1674,11 @@ static int mvneta_probe(struct udevice *dev) bus->priv = (void *)pp; pp->bus = bus;
- return mdio_register(bus); + ret = mdio_register(bus); + if (ret) + return ret; + + return board_network_enable(bus); }
static void mvneta_stop(struct udevice *dev)

From: Konstantin Porotchkin kostap@marvell.com
Add support for fixed link to NETA driver. This feature requred for proper support of SFP modules and onboard connected devices like Ethernet switches
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Signed-off-by: Terry Zhou bjzhou@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- drivers/net/mvneta.c | 109 ++++++++++++++++++++++++++++++++++++++------------- 1 file changed, 82 insertions(+), 27 deletions(-)
diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index a1e2136..8881cc7 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -191,11 +191,16 @@ DECLARE_GLOBAL_DATA_PTR; #define MVNETA_GMAC_AUTONEG_CONFIG 0x2c0c #define MVNETA_GMAC_FORCE_LINK_DOWN BIT(0) #define MVNETA_GMAC_FORCE_LINK_PASS BIT(1) +#define MVNETA_GMAC_FORCE_LINK_UP (BIT(0) | BIT(1)) +#define MVNETA_GMAC_IB_BYPASS_AN_EN BIT(3) #define MVNETA_GMAC_CONFIG_MII_SPEED BIT(5) #define MVNETA_GMAC_CONFIG_GMII_SPEED BIT(6) #define MVNETA_GMAC_AN_SPEED_EN BIT(7) +#define MVNETA_GMAC_SET_FC_EN BIT(8) +#define MVNETA_GMAC_ADVERT_FC_EN BIT(9) #define MVNETA_GMAC_CONFIG_FULL_DUPLEX BIT(12) #define MVNETA_GMAC_AN_DUPLEX_EN BIT(13) +#define MVNETA_GMAC_SAMPLE_TX_CFG_EN BIT(15) #define MVNETA_MIB_COUNTERS_BASE 0x3080 #define MVNETA_MIB_LATE_COLLISION 0x7c #define MVNETA_DA_FILT_SPEC_MCAST 0x3400 @@ -566,6 +571,13 @@ static void mvneta_rxq_buf_size_set(struct mvneta_port *pp, mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), val); }
+static int mvneta_port_is_fixed_link(struct mvneta_port *pp) +{ + /* phy_addr is set to invalid value for fixed link */ + return pp->phyaddr > PHY_MAX_ADDR; +} + + /* Start the Ethernet port RX and TX activity */ static void mvneta_port_up(struct mvneta_port *pp) { @@ -816,10 +828,12 @@ static void mvneta_defaults_set(struct mvneta_port *pp) /* Assign port SDMA configuration */ mvreg_write(pp, MVNETA_SDMA_CONFIG, val);
- /* Enable PHY polling in hardware for U-Boot */ - val = mvreg_read(pp, MVNETA_UNIT_CONTROL); - val |= MVNETA_PHY_POLLING_ENABLE; - mvreg_write(pp, MVNETA_UNIT_CONTROL, val); + /* Enable PHY polling in hardware if not in fixed-link mode */ + if (!mvneta_port_is_fixed_link(pp)) { + val = mvreg_read(pp, MVNETA_UNIT_CONTROL); + val |= MVNETA_PHY_POLLING_ENABLE; + mvreg_write(pp, MVNETA_UNIT_CONTROL, val); + }
mvneta_set_ucast_table(pp, -1); mvneta_set_special_mcast_table(pp, -1); @@ -1137,6 +1151,11 @@ static void mvneta_adjust_link(struct udevice *dev) struct phy_device *phydev = pp->phydev; int status_change = 0;
+ if (mvneta_port_is_fixed_link(pp)) { + debug("Using fixed link, skip link adjust\n"); + return; + } + if (phydev->link) { if ((pp->speed != phydev->speed) || (pp->duplex != phydev->duplex)) { @@ -1507,28 +1526,54 @@ static int mvneta_start(struct udevice *dev) mvneta_port_power_up(pp, pp->phy_interface);
if (!pp->init || pp->link == 0) { - /* Set phy address of the port */ - mvreg_write(pp, MVNETA_PHY_ADDR, pp->phyaddr); - phydev = phy_connect(pp->bus, pp->phyaddr, dev, - pp->phy_interface); - - pp->phydev = phydev; - phy_config(phydev); - phy_startup(phydev); - if (!phydev->link) { - printf("%s: No link.\n", phydev->dev->name); - return -1; - } + if (mvneta_port_is_fixed_link(pp)) { + u32 val;
- /* Full init on first call */ - mvneta_init(dev); - pp->init = 1; - } else { - /* Upon all following calls, this is enough */ - mvneta_port_up(pp); - mvneta_port_enable(pp); + pp->init = 1; + pp->link = 1; + mvneta_init(dev); + + val = MVNETA_GMAC_FORCE_LINK_UP | + MVNETA_GMAC_IB_BYPASS_AN_EN | + MVNETA_GMAC_SET_FC_EN | + MVNETA_GMAC_ADVERT_FC_EN | + MVNETA_GMAC_SAMPLE_TX_CFG_EN; + + if (pp->duplex) + val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; + + if (pp->speed == SPEED_1000) + val |= MVNETA_GMAC_CONFIG_GMII_SPEED; + else if (pp->speed == SPEED_100) + val |= MVNETA_GMAC_CONFIG_MII_SPEED; + + mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); + } else { + /* Set phy address of the port */ + mvreg_write(pp, MVNETA_PHY_ADDR, pp->phyaddr); + + phydev = phy_connect(pp->bus, pp->phyaddr, dev, + pp->phy_interface); + + pp->phydev = phydev; + phy_config(phydev); + phy_startup(phydev); + if (!phydev->link) { + printf("%s: No link.\n", phydev->dev->name); + return -1; + } + + /* Full init on first call */ + mvneta_init(dev); + pp->init = 1; + return 0; + } }
+ /* Upon all following calls, this is enough */ + mvneta_port_up(pp); + mvneta_port_enable(pp); + return 0; }
@@ -1625,6 +1670,7 @@ static int mvneta_probe(struct udevice *dev) unsigned long addr; void *bd_space; int ret; + int fl_node;
/* * Allocate buffer area for descs and rx_buffers. This is only @@ -1657,10 +1703,19 @@ static int mvneta_probe(struct udevice *dev) /* PHY interface is already decoded in mvneta_ofdata_to_platdata() */ pp->phy_interface = pdata->phy_interface;
- /* Now read phyaddr from DT */ - addr = fdtdec_get_int(blob, node, "phy", 0); - addr = fdt_node_offset_by_phandle(blob, addr); - pp->phyaddr = fdtdec_get_int(blob, addr, "reg", 0); + /* fetch 'fixed-link' property from 'neta' node */ + fl_node = fdt_subnode_offset(blob, node, "fixed-link"); + if (fl_node != -FDT_ERR_NOTFOUND) { + /* set phy_addr to invalid value for fixed link */ + pp->phyaddr = PHY_MAX_ADDR + 1; + pp->duplex = fdtdec_get_bool(blob, fl_node, "full-duplex"); + pp->speed = fdtdec_get_int(blob, fl_node, "speed", 0); + } else { + /* Now read phyaddr from DT */ + addr = fdtdec_get_int(blob, node, "phy", 0); + addr = fdt_node_offset_by_phandle(blob, addr); + pp->phyaddr = fdtdec_get_int(blob, addr, "reg", 0); + }
bus = mdio_alloc(); if (!bus) {

From: Konstantin Porotchkin kostap@marvell.com
Implement the board-specific network init function for ESPRESSOBin community board, setting the on-board Topaz switch port to forward mode and allow network connection through any of the available Etherenet ports.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- board/Marvell/mvebu_db-88f3720/board.c | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 3337f3f..45098ce 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -6,6 +6,7 @@
#include <common.h> #include <i2c.h> +#include <phy.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -156,3 +157,51 @@ int board_xhci_enable(void)
return 0; } + +static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr, + int smi_addr, int reg, u16 value) +{ + u16 data = 0; + + if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) { + printf("Error writing to the PHY addr=%02x reg=%02x\n", + smi_addr, reg); + return -EFAULT; + } + + data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) | reg; + if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) { + printf("Error writing to the PHY addr=%02x reg=%02x\n", + smi_addr, reg); + return -EFAULT; + } + + return 0; +} + + +int board_network_enable(struct mii_dev *bus) +{ + if (!of_machine_is_compatible("marvell,armada-3720-espressobin")) + return 0; + + /* + * FIXME: remove this code once Topaz driver gets available + * A3720 Community Board Only + * Configure Topaz switch (88E6341) + * Set port 0,1,2,3 to forwarding Mode + */ + mii_multi_chip_mode_write(bus, 1, 16, 4, 0x7f); + mii_multi_chip_mode_write(bus, 1, 17, 4, 0x7f); + mii_multi_chip_mode_write(bus, 1, 18, 4, 0x7f); + mii_multi_chip_mode_write(bus, 1, 19, 4, 0x7f); + /* RGMII Delay on Port 0*/ + mii_multi_chip_mode_write(bus, 1, 16, 1, 0xe002); + /* Power up PHY 1, 2, 3 */ + mii_multi_chip_mode_write(bus, 1, 28, 25, 0x1140); + mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9620); + mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9640); + mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9660); + + return 0; +}

Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Implement the board-specific network init function for ESPRESSOBin community board, setting the on-board Topaz switch port to forward mode and allow network connection through any of the available Etherenet ports.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 3337f3f..45098ce 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -6,6 +6,7 @@
#include <common.h> #include <i2c.h> +#include <phy.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -156,3 +157,51 @@ int board_xhci_enable(void)
return 0; }
+static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
int smi_addr, int reg, u16 value)
+{
- u16 data = 0;
- if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) | reg;
- if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- return 0;
+}
+int board_network_enable(struct mii_dev *bus) +{
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
- /*
* FIXME: remove this code once Topaz driver gets available
* A3720 Community Board Only
* Configure Topaz switch (88E6341)
* Set port 0,1,2,3 to forwarding Mode
*/
Just checking: Is this "Topaz switch driver" something thats being worked on or in the queue to do?
- mii_multi_chip_mode_write(bus, 1, 16, 4, 0x7f);
- mii_multi_chip_mode_write(bus, 1, 17, 4, 0x7f);
- mii_multi_chip_mode_write(bus, 1, 18, 4, 0x7f);
- mii_multi_chip_mode_write(bus, 1, 19, 4, 0x7f);
- /* RGMII Delay on Port 0*/
- mii_multi_chip_mode_write(bus, 1, 16, 1, 0xe002);
- /* Power up PHY 1, 2, 3 */
- mii_multi_chip_mode_write(bus, 1, 28, 25, 0x1140);
- mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9620);
- mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9640);
- mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9660);
- return 0;
+}
Thanks, Stefan

Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Implement the board-specific network init function for ESPRESSOBin community board, setting the on-board Topaz switch port to forward mode and allow network connection through any of the available Etherenet ports.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 3337f3f..45098ce 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -6,6 +6,7 @@
#include <common.h> #include <i2c.h> +#include <phy.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -156,3 +157,51 @@ int board_xhci_enable(void)
return 0;
}
+static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
int smi_addr, int reg, u16 value)
+{
- u16 data = 0;
- if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) | reg;
- if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- return 0;
+}
+int board_network_enable(struct mii_dev *bus) +{
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
- /*
* FIXME: remove this code once Topaz driver gets available
* A3720 Community Board Only
* Configure Topaz switch (88E6341)
* Set port 0,1,2,3 to forwarding Mode
*/
Just checking: Is this "Topaz switch driver" something thats being worked on or in the queue to do?
I currently do not have it in my queue. I think the driver exists in the kernel (or will exist in 4.10/4.11 release), so we may want to port it if required. Which switch operations are needed at u-bot stage?
- mii_multi_chip_mode_write(bus, 1, 16, 4, 0x7f);
- mii_multi_chip_mode_write(bus, 1, 17, 4, 0x7f);
- mii_multi_chip_mode_write(bus, 1, 18, 4, 0x7f);
- mii_multi_chip_mode_write(bus, 1, 19, 4, 0x7f);
- /* RGMII Delay on Port 0*/
- mii_multi_chip_mode_write(bus, 1, 16, 1, 0xe002);
- /* Power up PHY 1, 2, 3 */
- mii_multi_chip_mode_write(bus, 1, 28, 25, 0x1140);
- mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9620);
- mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9640);
- mii_multi_chip_mode_write(bus, 1, 28, 24, 0x9660);
- return 0;
+}
Thanks, Stefan

(added Joe to Cc as network custodian)
On 14.02.2017 13:13, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Implement the board-specific network init function for ESPRESSOBin community board, setting the on-board Topaz switch port to forward mode and allow network connection through any of the available Etherenet ports.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 3337f3f..45098ce 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -6,6 +6,7 @@
#include <common.h> #include <i2c.h> +#include <phy.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -156,3 +157,51 @@ int board_xhci_enable(void)
return 0;
}
+static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
int smi_addr, int reg, u16 value)
+{
- u16 data = 0;
- if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) | reg;
- if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- return 0;
+}
+int board_network_enable(struct mii_dev *bus) +{
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
- /*
* FIXME: remove this code once Topaz driver gets available
* A3720 Community Board Only
* Configure Topaz switch (88E6341)
* Set port 0,1,2,3 to forwarding Mode
*/
Just checking: Is this "Topaz switch driver" something thats being worked on or in the queue to do?
I currently do not have it in my queue. I think the driver exists in the kernel (or will exist in 4.10/4.11 release), so we may want to port it if required. Which switch operations are needed at u-bot stage?
I'm not 100% sure if there is anything really "needed" other than to get some ports into operation for the ethernet driver connected to this switch. So it might be that such a few register writes are acceptable - I'm pretty sure other boards do it this way as well.
On the other hand you could take a look at the "drivers/net/phy/mv88e61xx.c" switch driver. Might be that this is something similar to what you want / need.
Thanks, Stefan

On Tue, Feb 14, 2017 at 6:32 AM, Stefan Roese sr@denx.de wrote:
(added Joe to Cc as network custodian)
On 14.02.2017 13:13, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Implement the board-specific network init function for ESPRESSOBin community board, setting the on-board Topaz switch port to forward mode and allow network connection through any of the available Etherenet ports.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 3337f3f..45098ce 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -6,6 +6,7 @@
#include <common.h> #include <i2c.h> +#include <phy.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -156,3 +157,51 @@ int board_xhci_enable(void)
return 0;
}
+static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
int smi_addr, int reg, u16 value)
+{
- u16 data = 0;
- if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) | reg;
- if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- return 0;
+}
+int board_network_enable(struct mii_dev *bus) +{
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
- /*
* FIXME: remove this code once Topaz driver gets available
* A3720 Community Board Only
* Configure Topaz switch (88E6341)
* Set port 0,1,2,3 to forwarding Mode
*/
Just checking: Is this "Topaz switch driver" something thats being worked on or in the queue to do?
I currently do not have it in my queue. I think the driver exists in the kernel (or will exist in 4.10/4.11 release), so we may want to port it if required. Which switch operations are needed at u-bot stage?
I'm not 100% sure if there is anything really "needed" other than to get some ports into operation for the ethernet driver connected to this switch. So it might be that such a few register writes are acceptable - I'm pretty sure other boards do it this way as well.
On the other hand you could take a look at the "drivers/net/phy/mv88e61xx.c" switch driver. Might be that this is something similar to what you want / need.
I think the switch driver to model after is drivers/net/vsc9953.c - there is a command: cmd/ethsw.c / include ethsw.h that implements the framework (doc/README.t1040-l2switch).
There is also the drivers/net/cpsw.c that just hard-codes the config. Eth switches have varying levels of support. What level of support are you able to implement?
Thanks, -Joe

Hi, Joe,
On 02/14/2017 07:17 PM, Joe Hershberger wrote:
On Tue, Feb 14, 2017 at 6:32 AM, Stefan Roese sr@denx.de wrote:
(added Joe to Cc as network custodian)
On 14.02.2017 13:13, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Implement the board-specific network init function for ESPRESSOBin community board, setting the on-board Topaz switch port to forward mode and allow network connection through any of the available Etherenet ports.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 3337f3f..45098ce 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -6,6 +6,7 @@
#include <common.h> #include <i2c.h> +#include <phy.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -156,3 +157,51 @@ int board_xhci_enable(void)
return 0;
}
+static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
int smi_addr, int reg, u16 value)
+{
- u16 data = 0;
- if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) | reg;
- if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- return 0;
+}
+int board_network_enable(struct mii_dev *bus) +{
- if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
- /*
* FIXME: remove this code once Topaz driver gets available
* A3720 Community Board Only
* Configure Topaz switch (88E6341)
* Set port 0,1,2,3 to forwarding Mode
*/
Just checking: Is this "Topaz switch driver" something thats being worked on or in the queue to do?
I currently do not have it in my queue. I think the driver exists in the kernel (or will exist in 4.10/4.11 release), so we may want to port it if required. Which switch operations are needed at u-bot stage?
I'm not 100% sure if there is anything really "needed" other than to get some ports into operation for the ethernet driver connected to this switch. So it might be that such a few register writes are acceptable - I'm pretty sure other boards do it this way as well.
On the other hand you could take a look at the "drivers/net/phy/mv88e61xx.c" switch driver. Might be that this is something similar to what you want / need.
I think the switch driver to model after is drivers/net/vsc9953.c - there is a command: cmd/ethsw.c / include ethsw.h that implements the framework (doc/README.t1040-l2switch).
I will check this code, thank you for the reference!
There is also the drivers/net/cpsw.c that just hard-codes the config. Eth switches have varying levels of support. What level of support are you able to implement?
I am not really sure about level of support required by the u-boot. The Linux driver configures the 3 output ports of this switch as lan0, lan1 and wan interfaces, so they are presented to the kernel as separate NICs. So if I set the NFS server on lan0 and the cable connected to lan1, the connection attempt will fail. The u-boot code however just sets the switch ports to follow all the traffic to the CPU. So when I tfttpload image using default neta0 interface, any switch port will work for that. Anyway, I will check what is supported by the reference code you just pointed and check what I can provide. I personally not an expert in this Topaz switch internals and may need to request help from other Marvell teams for doing something smarter than the code already provided in this patch.
Thanks, -Joe

On 02/15/2017 11:07 AM, Konstantin Porotchkin wrote:
Hi, Joe,
On 02/14/2017 07:17 PM, Joe Hershberger wrote:
On Tue, Feb 14, 2017 at 6:32 AM, Stefan Roese sr@denx.de wrote:
(added Joe to Cc as network custodian)
On 14.02.2017 13:13, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Implement the board-specific network init function for ESPRESSOBin community board, setting the on-board Topaz switch port to forward mode and allow network connection through any of the available Etherenet ports.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com
board/Marvell/mvebu_db-88f3720/board.c | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 3337f3f..45098ce 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -6,6 +6,7 @@
#include <common.h> #include <i2c.h> +#include <phy.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -156,3 +157,51 @@ int board_xhci_enable(void)
return 0;
}
+static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
int smi_addr, int reg, u16 value)
+{
- u16 data = 0;
- if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) |
reg;
- if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) {
printf("Error writing to the PHY addr=%02x reg=%02x\n",
smi_addr, reg);
return -EFAULT;
- }
- return 0;
+}
+int board_network_enable(struct mii_dev *bus) +{
- if
(!of_machine_is_compatible("marvell,armada-3720-espressobin"))
return 0;
- /*
* FIXME: remove this code once Topaz driver gets available
* A3720 Community Board Only
* Configure Topaz switch (88E6341)
* Set port 0,1,2,3 to forwarding Mode
*/
Just checking: Is this "Topaz switch driver" something thats being worked on or in the queue to do?
I currently do not have it in my queue. I think the driver exists in the kernel (or will exist in 4.10/4.11 release), so we may want to port it if required. Which switch operations are needed at u-bot stage?
I'm not 100% sure if there is anything really "needed" other than to get some ports into operation for the ethernet driver connected to this switch. So it might be that such a few register writes are acceptable - I'm pretty sure other boards do it this way as well.
On the other hand you could take a look at the "drivers/net/phy/mv88e61xx.c" switch driver. Might be that this is something similar to what you want / need.
I think the switch driver to model after is drivers/net/vsc9953.c - there is a command: cmd/ethsw.c / include ethsw.h that implements the framework (doc/README.t1040-l2switch).
I will check this code, thank you for the reference!
There is also the drivers/net/cpsw.c that just hard-codes the config. Eth switches have varying levels of support. What level of support are you able to implement?
I am not really sure about level of support required by the u-boot. The Linux driver configures the 3 output ports of this switch as lan0, lan1 and wan interfaces, so they are presented to the kernel as separate NICs. So if I set the NFS server on lan0 and the cable connected to lan1, the connection attempt will fail. The u-boot code however just sets the switch ports to follow all the traffic to the CPU. So when I tfttpload image using default neta0 interface, any switch port will work for that. Anyway, I will check what is supported by the reference code you just pointed and check what I can provide. I personally not an expert in this Topaz switch internals and may need to request help from other Marvell teams for doing something smarter than the code already provided in this patch.
I went trough the Vitesse driver and understood that at this moment I cannot implement something similar. There are two reasons for this: 1. I am not an expert in SOHO switches. 2. It looks like a long task and it is not included in my current schedule. So I will try to make this code more readable by adding some defines that replace the numeric values at least for pointing to the register names. My current target is to enable early adopters of the Espressobin board to work with the mainline u-boot sources. Is it a good reason and will this temporary solution be acceptable?
Thanks, -Joe

On Wed, Feb 15, 2017 at 9:32 AM, Konstantin Porotchkin kostap@marvell.com wrote:
On 02/15/2017 11:07 AM, Konstantin Porotchkin wrote:
Hi, Joe,
On 02/14/2017 07:17 PM, Joe Hershberger wrote:
On Tue, Feb 14, 2017 at 6:32 AM, Stefan Roese sr@denx.de wrote:
(added Joe to Cc as network custodian)
On 14.02.2017 13:13, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kostap@marvell.com wrote: > > From: Konstantin Porotchkin kostap@marvell.com > > Implement the board-specific network init function for > ESPRESSOBin community board, setting the on-board Topaz > switch port to forward mode and allow network connection > through any of the available Etherenet ports. > > Signed-off-by: Konstantin Porotchkin kostap@marvell.com > Cc: Stefan Roese sr@denx.de > Cc: Igal Liberman igall@marvell.com > --- > board/Marvell/mvebu_db-88f3720/board.c | 49 > ++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > > diff --git a/board/Marvell/mvebu_db-88f3720/board.c > b/board/Marvell/mvebu_db-88f3720/board.c > index 3337f3f..45098ce 100644 > --- a/board/Marvell/mvebu_db-88f3720/board.c > +++ b/board/Marvell/mvebu_db-88f3720/board.c > @@ -6,6 +6,7 @@ > > #include <common.h> > #include <i2c.h> > +#include <phy.h> > #include <asm/io.h> > #include <asm/arch/cpu.h> > #include <asm/arch/soc.h> > @@ -156,3 +157,51 @@ int board_xhci_enable(void) > > return 0; > } > + > +static int mii_multi_chip_mode_write(struct mii_dev *bus, int > dev_smi_addr, > + int smi_addr, int reg, u16 value) > +{ > + u16 data = 0; > + > + if (bus->write(bus, dev_smi_addr, 0, 1, value) != 0) { > + printf("Error writing to the PHY addr=%02x reg=%02x\n", > + smi_addr, reg); > + return -EFAULT; > + } > + > + data = (1 << 15) | (1 << 12) | (1 << 10) | (smi_addr << 5) |
reg;
> + if (bus->write(bus, dev_smi_addr, 0, 0, data) != 0) { > + printf("Error writing to the PHY addr=%02x reg=%02x\n", > + smi_addr, reg); > + return -EFAULT; > + } > + > + return 0; > +} > + > + > +int board_network_enable(struct mii_dev *bus) > +{ > + if
(!of_machine_is_compatible("marvell,armada-3720-espressobin"))
> + return 0; > + > + /* > + * FIXME: remove this code once Topaz driver gets available > + * A3720 Community Board Only > + * Configure Topaz switch (88E6341) > + * Set port 0,1,2,3 to forwarding Mode > + */
Just checking: Is this "Topaz switch driver" something thats being worked on or in the queue to do?
I currently do not have it in my queue. I think the driver exists in the kernel (or will exist in 4.10/4.11 release), so we may want to port it if required. Which switch operations are needed at u-bot stage?
I'm not 100% sure if there is anything really "needed" other than to get some ports into operation for the ethernet driver connected to this switch. So it might be that such a few register writes are acceptable - I'm pretty sure other boards do it this way as well.
On the other hand you could take a look at the "drivers/net/phy/mv88e61xx.c" switch driver. Might be that this is something similar to what you want / need.
I think the switch driver to model after is drivers/net/vsc9953.c - there is a command: cmd/ethsw.c / include ethsw.h that implements the framework (doc/README.t1040-l2switch).
I will check this code, thank you for the reference!
There is also the drivers/net/cpsw.c that just hard-codes the config. Eth switches have varying levels of support. What level of support are you able to implement?
I am not really sure about level of support required by the u-boot. The Linux driver configures the 3 output ports of this switch as lan0, lan1 and wan interfaces, so they are presented to the kernel as separate NICs. So if I set the NFS server on lan0 and the cable connected to lan1, the connection attempt will fail. The u-boot code however just sets the switch ports to follow all the traffic to the CPU. So when I tfttpload image using default neta0 interface, any switch port will work for that. Anyway, I will check what is supported by the reference code you just pointed and check what I can provide. I personally not an expert in this Topaz switch internals and may need to request help from other Marvell teams for doing something smarter than the code already provided in this patch.
I went trough the Vitesse driver and understood that at this moment I cannot implement something similar. There are two reasons for this:
- I am not an expert in SOHO switches.
- It looks like a long task and it is not included in my current schedule.
So I will try to make this code more readable by adding some defines that replace the numeric values at least for pointing to the register names. My current target is to enable early adopters of the Espressobin board to work with the mainline u-boot sources. Is it a good reason and will this temporary solution be acceptable?
Yes, that's fine. Thanks! -Joe

From: Konstantin Porotchkin kostap@marvell.com
Initial DTS file for Marvell ESPRESSOBin comunity board based on Armada-3720 SoC. The Marvell ESPRESSOBin is a tiny board made by Globalscale and available on KickStarter site. It has dual core Armv8 Marvell SoC (Armada-3720) with 512MB/1GB/2GB DDR3 RAM, mini-PCIe 2.0 slot, single SATA-3 port, USB 2.0 and USB 3.0 interfaces, Gigabit Ethernet switch with 3 ports, micro-SD socket and two 46-pin GPIO connectors.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/armada-3720-espressobin.dts | 135 +++++++++++++++++++++++++++++++ 2 files changed, 136 insertions(+) create mode 100644 arch/arm/dts/armada-3720-espressobin.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index eb68c20..d85210c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -70,6 +70,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
dtb-$(CONFIG_ARCH_MVEBU) += \ armada-3720-db.dtb \ + armada-3720-espressobin.dtb \ armada-375-db.dtb \ armada-388-clearfog.dtb \ armada-388-gp.dtb \ diff --git a/arch/arm/dts/armada-3720-espressobin.dts b/arch/arm/dts/armada-3720-espressobin.dts new file mode 100644 index 0000000..aa6587a --- /dev/null +++ b/arch/arm/dts/armada-3720-espressobin.dts @@ -0,0 +1,135 @@ +/* + * Device Tree file for Marvell Armada 3720 community board + * (ESPRESSOBin) + * Copyright (C) 2016 Marvell + * + * Gregory CLEMENT gregory.clement@free-electrons.com + * Konstantin Porotchkin kostap@marvell.com + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "armada-372x.dtsi" + +/ { + model = "Marvell Armada 3720 Community Board ESPRESSOBin"; + compatible = "marvell,armada-3720-espressobin", "marvell,armada3720", "marvell,armada3710"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + ethernet0 = ð0; + i2c0 = &i2c0; + spi0 = &spi0; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; +}; + +&comphy { + max-lanes = <3>; + phy0 { + phy-type = <PHY_TYPE_PEX0>; + phy-speed = <PHY_SPEED_2_5G>; + }; + + phy1 { + phy-type = <PHY_TYPE_USB3_HOST0>; + phy-speed = <PHY_SPEED_5G>; + }; + + phy2 { + phy-type = <PHY_TYPE_SATA0>; + phy-speed = <PHY_SPEED_5G>; + }; +}; + +ð0 { + status = "okay"; + phy-mode = "rgmii"; + phy_addr = <0x1>; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&i2c0 { + status = "okay"; +}; + +/* CON3 */ +&sata { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128", "spi-flash"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + m25p,fast-read; + }; +}; + +/* Exported on the micro USB connector CON32 through an FTDI */ +&uart0 { + status = "okay"; +}; + +/* CON29 */ +&usb2 { + status = "okay"; +}; + +/* CON31 */ +&usb3 { + status = "okay"; +};

From: Konstantin Porotchkin kostap@marvell.com
Add initial default configuration for Marvell ESPRESSOBin community board based on Aramda-3720 SoC
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- configs/mvebu_espressobin-88f3720_defconfig | 67 +++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 configs/mvebu_espressobin-88f3720_defconfig
diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig new file mode 100644 index 0000000..544e233 --- /dev/null +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -0,0 +1,67 @@ +CONFIG_ARM=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TARGET_MVEBU_DB_88F3720=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_MAC_PARTITION=y +CONFIG_ISO_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_SHA1=y +CONFIG_SHA256=y +CONFIG_BLOCK_CACHE=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_COMPAT=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +# CONFIG_SPL_SERIAL_PRESENT is not set +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_MVEBU_A3700_UART=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=25804800 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y

From: Konstantin Porotchkin kostap@marvell.com
Bypass XHCI and AHCi board configuration flow on ESPRESSOBin community board. The community board does not have i2c expander and USB VBUS is always on, so the scan for AHCi and USB devices can be faster.
Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Igal Liberman igall@marvell.com --- board/Marvell/mvebu_db-88f3720/board.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/board/Marvell/mvebu_db-88f3720/board.c b/board/Marvell/mvebu_db-88f3720/board.c index 45098ce..029ca6d 100644 --- a/board/Marvell/mvebu_db-88f3720/board.c +++ b/board/Marvell/mvebu_db-88f3720/board.c @@ -66,6 +66,10 @@ int board_ahci_enable(void) int ret; u8 buf[8];
+ /* There is no IO expander on ESPRESSOBin boards */ + if (of_machine_is_compatible("marvell,armada-3720-espressobin")) + return 0; + /* Configure IO exander PCA9555: 7bit address 0x22 */ ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev); if (ret) { @@ -100,6 +104,10 @@ int board_xhci_enable(void) int ret; u8 buf[8];
+ /* There is no IO expander on ESPRESSOBin boards */ + if (of_machine_is_compatible("marvell,armada-3720-espressobin")) + return 0; + /* Configure IO exander PCA9555: 7bit address 0x22 */ ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev); if (ret) {
participants (4)
-
Joe Hershberger
-
Konstantin Porotchkin
-
kostap@marvell.com
-
Stefan Roese