[U-Boot] [PATCH V5 1/4] ide: add configuration CONFIG_IDE_SWAP_IO
This configuration option replaces a complex conditional in cmd_ide.c with an explicit define to be added to SoC or board configs.
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- This patch set introduces CONFIG_IDE_SWAP_IO as suggested by Wolfgang Denk, adds orion5x support to cmd_ide.c and adds IDE support to edminiv2.
Patchset history:
V1: Initial 4-patch set -- not cleanly submitted (does not appear on gmane for instance) and contained some unrelated changes.
V2: Slimmed down to 3 patches and removed unrelated changes.
V3: Back to 4 patches (cmd_ide improvement, driver addition, cmd_ide support for orion, edminiv2 support for sata); made initialization code reuseable as a block driver ; moved to C structures; commented some constants.
V4: Reordered objects alphabetically in drivers/block/Makefile. Shortened mv_sata to mvsata. Removed volatile qualifier in mvsata port structure. Moved port pointer definition from SoC to board code. Removed unrelated changes.
V5: Fixed typo in mvsata_ide driver (IMP, should have been IPM).
arch/powerpc/include/asm/config.h | 3 +++ common/cmd_ide.c | 18 +++++++++--------- doc/README.PXA_CF | 8 ++++++++ include/configs/ap325rxa.h | 1 + include/configs/ms7720se.h | 1 + include/configs/r2dplus.h | 1 + include/configs/r7780mp.h | 1 + 7 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index fc3facb..371989d 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -76,4 +76,7 @@ /* Relocation to SDRAM works on all PPC boards */ #define CONFIG_RELOC_FIXUP_WORKS
+/* All PPC boards must swap IDE bytes */ +#define CONFIG_IDE_SWAP_IO + #endif /* _ASM_CONFIG_H_ */ diff --git a/common/cmd_ide.c b/common/cmd_ide.c index d486697..9292a5b 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -853,7 +853,7 @@ input_swap_data(int dev, ulong *sect_buf, int words) #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) +#if defined(CONFIG_IDE_SWAP_IO) static void output_data(int dev, ulong *sect_buf, int words) { @@ -897,15 +897,15 @@ output_data(int dev, ulong *sect_buf, int words) } #endif } -#else /* ! __PPC__ */ +#else /* ! CONFIG_IDE_SWAP_IO */ static void output_data(int dev, ulong *sect_buf, int words) { outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1); } -#endif /* __PPC__ */ +#endif /* CONFIG_IDE_SWAP_IO */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) +#if defined(CONFIG_IDE_SWAP_IO) static void input_data(int dev, ulong *sect_buf, int words) { @@ -955,14 +955,14 @@ input_data(int dev, ulong *sect_buf, int words) } #endif } -#else /* ! __PPC__ */ +#else /* ! CONFIG_IDE_SWAP_IO */ static void input_data(int dev, ulong *sect_buf, int words) { insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1); }
-#endif /* __PPC__ */ +#endif /* CONFIG_IDE_SWAP_IO */
/* ------------------------------------------------------------------------- */ @@ -1579,7 +1579,7 @@ int ide_device_present(int dev) * ATAPI Support */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(CONFIG_IDE_SWAP_IO) /* since ATAPI may use commands with not 4 bytes alligned length * we have our own transfer functions, 2 bytes alligned */ static void @@ -1646,7 +1646,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) #endif }
-#else /* ! __PPC__ */ +#else /* ! CONFIG_IDE_SWAP_IO */ static void output_data_shorts(int dev, ushort *sect_buf, int shorts) { @@ -1659,7 +1659,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts); }
-#endif /* __PPC__ */ +#endif /* CONFIG_IDE_SWAP_IO */
/* * Wait until (Status & mask) == res, or timeout (in ms) diff --git a/doc/README.PXA_CF b/doc/README.PXA_CF index 6a0f236..1d76b32 100644 --- a/doc/README.PXA_CF +++ b/doc/README.PXA_CF @@ -6,6 +6,14 @@ follow the connections of the standard lubbock. Anyway just the block marked memory configuration should be touched since the other parameters are imposed by the PXA architecture.
+EDIT 2010-07-01: in common/cmd_ide.c, having CONFIG_PXA_PCMCIA defined +would cause looping on inw()/outw() rather than using insw()/outsw(), +thus making sure IDE / ATA bytes are properly swapped. This behaviour +is now controlled by CONFIG_IDE_SWAP_IO, therefore PXA boards with +PCMCIA should #define CONFIG_IDE_SWAP_IO. + +#define CONFIG_IDE_SWAP_IO + #define CONFIG_PXA_PCMCIA 1 #define CONFIG_PXA_IDE 1
diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 70dd47e..80a5797 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -138,6 +138,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO
/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index ba0a3f8..0ea3527 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -122,5 +122,6 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO
#endif /* __MS7720SE_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 8931b97..955f3ff 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -96,6 +96,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO
/* * SuperH PCI Bridge Configration diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 71c570e..3afe93a 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -171,6 +171,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO #endif /* CONFIG_CMD_IDE */
#endif /* __R7780RP_H */
This driver only provides initialization code; actual driving is done by cmd_ide.c using the ATA compatibility mode of the Marvell SATAHC controller.
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- drivers/block/Makefile | 7 +++-- drivers/block/mvsata_ide.c | 60 ++++++++++++++++++++++++++++++++++++++++++++ include/mvsata_ide.h | 55 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 119 insertions(+), 3 deletions(-) create mode 100644 drivers/block/mvsata_ide.c create mode 100644 include/mvsata_ide.h
diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 3f6ad5c..64dcf4e 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -25,15 +25,16 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libblock.a
+COBJS-$(CONFIG_SCSI_AHCI) += ahci.o COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o -COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o -COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_LIBATA) += libata.o +COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o +COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o -COBJS-$(CONFIG_SCSI_AHCI) += ahci.o +COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o COBJS-$(CONFIG_SYSTEMACE) += systemace.o
diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c new file mode 100644 index 0000000..f538839 --- /dev/null +++ b/drivers/block/mvsata_ide.c @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2010 Albert ARIBAUD albert.aribaud@free.fr + * + * Written-by: Albert ARIBAUD albert.aribaud@free.fr + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <asm/io.h> +#include "mvsata_ide.h" + +/* Mask and values for device DETection and link initialization */ +#define MVSATA_SCONTROL_DET_MASK 0x0000000F +#define MVSATA_SCONTROL_DET_NONE 0x00000000 +#define MVSATA_SCONTROL_DET_INIT 0x00000001 + +/* Mask and values for device Interface Power Management */ +#define MVSATA_SCONTROL_IPM_MASK 0x00000F00 +#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300 + +#define MVSATA_SCONTROL_MASK \ + (MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK) + +#define MVSATA_PORT_INIT \ + (MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED) + +#define MVSATA_PORT_USE \ + (MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED) + +void mvsata_ide_initialize_port(struct mvsata_port_registers *port) +{ + u32 reg; + + reg = readl(&port->SControl); + + reg = (reg & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT; + + writel(reg, &port->SControl); + + reg = (reg & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE; + + writel(reg, &port->SControl); +} diff --git a/include/mvsata_ide.h b/include/mvsata_ide.h new file mode 100644 index 0000000..ad0f854 --- /dev/null +++ b/include/mvsata_ide.h @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2010 Albert ARIBAUD albert.aribaud@free.fr + * + * Written-by: Albert ARIBAUD albert.aribaud@free.fr + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _MVSATA_IDE_H +#define _MVSATA_IDE_H + +#ifndef __ASSEMBLY__ + +/* SATA port registers */ +struct mvsata_port_registers +{ + u32 Reserved1[192]; + /* offset 0x300 : ATA Interface registers */ + u32 SStatus; + u32 SError; + u32 SControl; + u32 LTMode; + u32 PhyMode3; + u32 PhyMode4; + u32 Reserved2[5]; + u32 PhyMode1; + u32 PhyMode2; + u32 BIST_CR; + u32 BIST_DW1; + u32 BIST_DW2; + u32 SErrorIntrMask; +}; + +/* Initialize a SATA port */ +void mvsata_ide_initialize_port(struct mvsata_port_registers *port); + +#endif /* __ASSEMBLY__ */ + +#endif /* _MVSATA_IDE_H */
Add MVSATAHC definitions to orion5x. Add support for orion5x in cmd_ide.
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- arch/arm/include/asm/arch-orion5x/orion5x.h | 3 +++ common/cmd_ide.c | 4 ++++ 2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index 4008c84..100a411 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -55,6 +55,9 @@ #define ORION5X_USB20_PORT0_BASE (ORION5X_REGISTER(0x50000)) #define ORION5X_USB20_PORT1_BASE (ORION5X_REGISTER(0xA0000)) #define ORION5X_EGIGA_BASE (ORION5X_REGISTER(0x72000)) +#define ORION5X_SATA_BASE (ORION5X_REGISTER(0x80000)) +#define ORION5X_SATA_PORT0_OFFSET 0x2000 +#define ORION5X_SATA_PORT1_OFFSET 0x4000
#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024)
diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 9292a5b..7f98ebb 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -45,6 +45,10 @@ #include <mpc5xxx.h> #endif
+#ifdef CONFIG_ORION5X +#include <asm/arch/orion5x.h> +#endif + #include <ide.h> #include <ata.h>
Add mvsata_ide port 1 initialization in edminiv2 init code Add mvsata_ide and cmd_ide configuration in edminiv2 config
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- board/LaCie/edminiv2/edminiv2.c | 7 ++++++ include/configs/edminiv2.h | 46 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 52 insertions(+), 1 deletions(-)
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c index 54c0ffe..f0c2110 100644 --- a/board/LaCie/edminiv2/edminiv2.c +++ b/board/LaCie/edminiv2/edminiv2.c @@ -88,5 +88,12 @@ int board_init(void) /* boot parameter start at 256th byte of RAM base */ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
+#if defined(CONFIG_MVSATA_IDE) + /* Enable SATA port 1 if SATA IDE was configured */ + mvsata_ide_initialize_port( + (struct mv_sata_port_registers *) + (ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET)); +#endif + return 0; } diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index c3d95a0..0c1a8fc 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -52,6 +52,12 @@ #define CONFIG_SYS_HZ 1000
/* + * __io is necessary for cmd_ide to compile + */ + +#define __io + +/* * Board-specific values for Orion5x MPP low level init: * - MPPs 12 to 15 are SATA LEDs (mode 5) * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for @@ -60,7 +66,7 @@
#define ORION5X_MPP0_7 0x00000003 #define ORION5X_MPP8_15 0x55550000 -#define ORION5X_MPP16_23 0x00000000 +#define ORION5X_MPP16_23 0x00005555
/* * Board-specific values for Orion5x GPIO low level init: @@ -131,6 +137,7 @@ * Commands configuration - using default command set for now */ #include <config_cmd_default.h> + /* * Disabling some default commands for staggered bring-up */ @@ -138,6 +145,43 @@ #undef CONFIG_CMD_NET /* no net since no eth */ #undef CONFIG_CMD_NFS /* no NFS since no net */
+#define CONFIG_CMD_IDE +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 + +/* + * ED Mini V2 has an IDE-compatible SATA connector for port 1 + */ + +#define CONFIG_MVSATA_IDE +#define CONFIG_MVSATA_IDE_USE_PORT1 + +/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO + +/* Data, registers and alternate blocks are at the same offset */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) +#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) +#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) + +/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4 + +/* Controller supports 48-bits LBA addressing */ +#define CONFIG_LBA48 + +/* + * CONFIG_CMD_IDE requires some #defines for ATA registers + */ + +/* A single bus, a single device */ +#define CONFIG_SYS_IDE_MAXBUS 1 +#define CONFIG_SYS_IDE_MAXDEVICE 1 +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE +/* ATA bus 0 is orion5x port 1 on ED Mini V2 */ +#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET + /* * Environment variables configurations */
Pls remove below warning
edminiv2.c: In function ‘board_init’: edminiv2.c:93: warning: implicit declaration of function ‘mvsata_ide_initialize_port’
Regards.. Prafulla . ..
___________________________________ From: u-boot-bounces@lists.denx.de [u-boot-bounces@lists.denx.de] On Behalf Of Albert Aribaud [albert.aribaud@free.fr] Sent: Tuesday, July 13, 2010 5:32 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
Add mvsata_ide port 1 initialization in edminiv2 init code Add mvsata_ide and cmd_ide configuration in edminiv2 config
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- board/LaCie/edminiv2/edminiv2.c | 7 ++++++ include/configs/edminiv2.h | 46 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 52 insertions(+), 1 deletions(-)
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c index 54c0ffe..f0c2110 100644 --- a/board/LaCie/edminiv2/edminiv2.c +++ b/board/LaCie/edminiv2/edminiv2.c @@ -88,5 +88,12 @@ int board_init(void) /* boot parameter start at 256th byte of RAM base */ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
+#if defined(CONFIG_MVSATA_IDE) + /* Enable SATA port 1 if SATA IDE was configured */ + mvsata_ide_initialize_port( + (struct mv_sata_port_registers *) + (ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET)); +#endif + return 0; } diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index c3d95a0..0c1a8fc 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -52,6 +52,12 @@ #define CONFIG_SYS_HZ 1000
/* + * __io is necessary for cmd_ide to compile + */ + +#define __io + +/* * Board-specific values for Orion5x MPP low level init: * - MPPs 12 to 15 are SATA LEDs (mode 5) * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for @@ -60,7 +66,7 @@
#define ORION5X_MPP0_7 0x00000003 #define ORION5X_MPP8_15 0x55550000 -#define ORION5X_MPP16_23 0x00000000 +#define ORION5X_MPP16_23 0x00005555
/* * Board-specific values for Orion5x GPIO low level init: @@ -131,6 +137,7 @@ * Commands configuration - using default command set for now */ #include <config_cmd_default.h> + /* * Disabling some default commands for staggered bring-up */ @@ -138,6 +145,43 @@ #undef CONFIG_CMD_NET /* no net since no eth */ #undef CONFIG_CMD_NFS /* no NFS since no net */
+#define CONFIG_CMD_IDE +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 + +/* + * ED Mini V2 has an IDE-compatible SATA connector for port 1 + */ + +#define CONFIG_MVSATA_IDE +#define CONFIG_MVSATA_IDE_USE_PORT1 + +/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO + +/* Data, registers and alternate blocks are at the same offset */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) +#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) +#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) + +/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4 + +/* Controller supports 48-bits LBA addressing */ +#define CONFIG_LBA48 + +/* + * CONFIG_CMD_IDE requires some #defines for ATA registers + */ + +/* A single bus, a single device */ +#define CONFIG_SYS_IDE_MAXBUS 1 +#define CONFIG_SYS_IDE_MAXDEVICE 1 +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE +/* ATA bus 0 is orion5x port 1 on ED Mini V2 */ +#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET + /* * Environment variables configurations */ -- 1.6.4.4
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-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Albert Aribaud Sent: Tuesday, July 13, 2010 5:33 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
Add mvsata_ide port 1 initialization in edminiv2 init code Add mvsata_ide and cmd_ide configuration in edminiv2 config
Signed-off-by: Albert Aribaud albert.aribaud@free.fr
board/LaCie/edminiv2/edminiv2.c | 7 ++++++ include/configs/edminiv2.h | 46 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 52 insertions(+), 1 deletions(-)
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c index 54c0ffe..f0c2110 100644 --- a/board/LaCie/edminiv2/edminiv2.c +++ b/board/LaCie/edminiv2/edminiv2.c @@ -88,5 +88,12 @@ int board_init(void) /* boot parameter start at 256th byte of RAM base */ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
+#if defined(CONFIG_MVSATA_IDE)
- /* Enable SATA port 1 if SATA IDE was configured */
- mvsata_ide_initialize_port(
(struct mv_sata_port_registers *)(ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET));+#endif
- return 0;
} diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index c3d95a0..0c1a8fc 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -52,6 +52,12 @@ #define CONFIG_SYS_HZ 1000
/*
- __io is necessary for cmd_ide to compile
- */
+#define __io
Pls move this below inside #ifdef CONFIG_CMD_IDE
+/*
- Board-specific values for Orion5x MPP low level init:
- MPPs 12 to 15 are SATA LEDs (mode 5)
- Others are GPIO/unused (mode 3 for MPP0, mode 5 for
@@ -60,7 +66,7 @@
#define ORION5X_MPP0_7 0x00000003 #define ORION5X_MPP8_15 0x55550000 -#define ORION5X_MPP16_23 0x00000000 +#define ORION5X_MPP16_23 0x00005555
/*
- Board-specific values for Orion5x GPIO low level init:
@@ -131,6 +137,7 @@
- Commands configuration - using default command set for now
*/ #include <config_cmd_default.h>
/*
- Disabling some default commands for staggered bring-up
*/ @@ -138,6 +145,43 @@ #undef CONFIG_CMD_NET /* no net since no eth */ #undef CONFIG_CMD_NFS /* no NFS since no net */
+#define CONFIG_CMD_IDE +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2
It's good if you use #ifdef here and pull all IDE specific configuration in it I had already provided same comment for previous patch
+/*
- ED Mini V2 has an IDE-compatible SATA connector for port 1
- */
+#define CONFIG_MVSATA_IDE +#define CONFIG_MVSATA_IDE_USE_PORT1
+/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO
+/* Data, registers and alternate blocks are at the same offset */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) +#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) +#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
+/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4
+/* Controller supports 48-bits LBA addressing */ +#define CONFIG_LBA48
+/*
- CONFIG_CMD_IDE requires some #defines for ATA registers
- */
+/* A single bus, a single device */ +#define CONFIG_SYS_IDE_MAXBUS 1 +#define CONFIG_SYS_IDE_MAXDEVICE 1 +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE +/* ATA bus 0 is orion5x port 1 on ED Mini V2 */ +#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET
Secondly I tried to generate similar patches for Kirkwood oneprd_base (attached) on the top of this patch series But somehow "ide reset" is unable to detect device on port. If you have openrd_base board, can you pls give a try? May be you may need to look at mpp config.
Regards.. Prafulla . .
Hi Prafulla et al.,
Le 21/07/2010 12:26, Prafulla Wadaskar a écrit :
+#define __io
Pls move this below inside #ifdef CONFIG_CMD_IDE
Wilco.
+#define CONFIG_CMD_IDE +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2
It's good if you use #ifdef here and pull all IDE specific configuration in it I had already provided same comment for previous patch
You're right--I thought I'd done it but failed to cherry-pick it into V5.
Secondly I tried to generate similar patches for Kirkwood oneprd_base (attached) on the top of this patch series But somehow "ide reset" is unable to detect device on port. If you have openrd_base board, can you pls give a try?
May be you may need to look at mpp config.
I have an OpenRD Client, not base; client has a SATA connector to which I have a disk connected, so I could give it a try but we'll need to make sur how many SATA ports kirkwood has and which ones are used on either openrd client and base (orion5x has two sata ports and edmini uses port 1, not 0, for its sole SATA conector). I am away from home right now, but I will be able to give it a try as soon as August 1st.
Regards.. Prafulla . .
Amicalement,
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Friday, July 23, 2010 4:21 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de Subject: Re: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
...snip...
Secondly I tried to generate similar patches for Kirkwood
oneprd_base (attached) on the top of this patch series
But somehow "ide reset" is unable to detect device on port. If you have openrd_base board, can you pls give a try?
May be you may need to look at mpp config.
I have an OpenRD Client, not base; client has a SATA connector to which I have a disk connected, so I could give it a try but we'll need to make sur how many SATA ports kirkwood has and which ones are used on either openrd client and base (orion5x has two sata ports and edmini uses port 1, not 0, for its sole SATA conector). I am away from home right now, but I will be able to give it a try as soon as August 1st.
Hi Albert Ping ...if you are back Pls include my email address in your white list, the mails to you bounces back to me.
Regards.. Prafulla . .
Hi Prafulla et al.,
Le 01/08/2010 18:48, Prafulla Wadaskar a écrit :
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Friday, July 23, 2010 4:21 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de Subject: Re: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
...snip...
Secondly I tried to generate similar patches for Kirkwood
oneprd_base (attached) on the top of this patch series
But somehow "ide reset" is unable to detect device on port. If you have openrd_base board, can you pls give a try?
May be you may need to look at mpp config.
I have an OpenRD Client, not base; client has a SATA connector to which I have a disk connected, so I could give it a try but we'll need to make sur how many SATA ports kirkwood has and which ones are used on either openrd client and base (orion5x has two sata ports and edmini uses port 1, not 0, for its sole SATA conector). I am away from home right now, but I will be able to give it a try as soon as August 1st.
Hi Albert Ping ...if you are back
I am, and I have done some work on your problem, but for the moment I am still at the same stage as you -- a continuous sequence of dots when doing an ide reset, right?
I have #define'd DEBUG in cmd_ide.c and compared the debug messages for my ED Mini V2 (working) and my OpenRD-Client (not working). I have also performed manual SATA and IDE reset sequences. Short story:
1) the board code correctly initializes the SATA link, which correctly detects a disk if there is one:
Marvell>> md.l f1082300 4 f1082300: 00000113 14010000 00000300 010300b0 ................ Marvell>> md.l f1084300 4 f1084300: 00000000 00000000 00000300 010300b0 ................ Marvell>>
(this is consistent with my system which has a 1.5 GBps disk on port 0).
2) The problem is that the drive appears continuously non-RDY (SStatus register remains at 0x80 while on the ED Mini V2 it ends up at 0x50, which basically means it is ready).
I will now compare the MPP / GPIO settings performed by the FLASH-resident U-Boot (its 'ide reset' command works ok) to those in effect when the patched u-boot fails. Maybe one GPIO controls power to the internal SATA port, although I doubt it -- if the drive was off, the controller would not see it at all, and SStatus at F1082300 would not report it present.
Pls include my email address in your white list, the mails to you bounces back to me.
It's not an issue of (not) whitelisting your e-mail address; it's your mail server being blacklisted by my email provider. If you have a recent non-delivery report please send it to me in private to my gmail account (albert.aribaud@gmail.com), I'll try to sort things out and contact your mail server's admin with the relevant details.
Regards.. Prafulla . .
Amicalement,
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Sunday, August 01, 2010 11:05 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de Subject: Re: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
Hi Prafulla et al.,
Le 01/08/2010 18:48, Prafulla Wadaskar a écrit :
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Friday, July 23, 2010 4:21 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de Subject: Re: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
...snip...
Secondly I tried to generate similar patches for Kirkwood
oneprd_base (attached) on the top of this patch series
But somehow "ide reset" is unable to detect device on port. If you have openrd_base board, can you pls give a try?
May be you may need to look at mpp config.
I have an OpenRD Client, not base; client has a SATA connector to which I have a disk connected, so I could give it a try but we'll need to make sur how many SATA ports kirkwood has and which ones are used on either openrd client and base (orion5x has two sata ports and edmini uses port 1, not 0, for its sole SATA conector). I am away from home
right now,
but I will be able to give it a try as soon as August 1st.
Hi Albert Ping ...if you are back
I am, and I have done some work on your problem, but for the moment I am still at the same stage as you -- a continuous sequence of dots when doing an ide reset, right?
Right..
I have #define'd DEBUG in cmd_ide.c and compared the debug messages for my ED Mini V2 (working) and my OpenRD-Client (not working). I have also performed manual SATA and IDE reset sequences. Short story:
- the board code correctly initializes the SATA link, which
correctly detects a disk if there is one:
Marvell>> md.l f1082300 4 f1082300: 00000113 14010000 00000300 010300b0 ................ Marvell>> md.l f1084300 4 f1084300: 00000000 00000000 00000300 010300b0 ................ Marvell>>
(this is consistent with my system which has a 1.5 GBps disk on port 0).
- The problem is that the drive appears continuously non-RDY
(SStatus register remains at 0x80 while on the ED Mini V2 it ends up at 0x50, which basically means it is ready).
I will now compare the MPP / GPIO settings performed by the FLASH-resident U-Boot (its 'ide reset' command works ok) to those in effect when the patched u-boot fails. Maybe one GPIO controls power to the internal SATA port, although I doubt it -- if the drive was off, the controller would not see it at all, and SStatus at F1082300 would not report it present.
I tried tweaking MPP setup for SATA related stuff, it's multiplexed with UART and other I/Os (NAND), What I observed: if I boot kernel with sata support, kernel sata driver works properly and I can detect and use IDE devices.
So I doubt MPP, I don't know kernel (latest stable) overrides MPP settings done by u-boot?? We can get some reference from there.
Pls include my email address in your white list, the mails
to you bounces back to me.
It's not an issue of (not) whitelisting your e-mail address; it's your mail server being blacklisted by my email provider. If you have a recent non-delivery report please send it to me in private to my gmail account (albert.aribaud@gmail.com), I'll try to sort things out and contact your mail server's admin with the relevant details.
I will post you log seperately
Regards.. Prafulla . .
Hi,
Le 02/08/2010 05:35, Prafulla Wadaskar a écrit :
I tried tweaking MPP setup for SATA related stuff, it's multiplexed with UART and other I/Os (NAND), What I observed: if I boot kernel with sata support, kernel sata driver works properly and I can detect and use IDE devices.
So I doubt MPP, I don't know kernel (latest stable) overrides MPP settings done by u-boot?? We can get some reference from there.
I went the low level route and compared MPP / GPIO settings (content of 0xf1010000, 0xf1010100, 0xf1010140) at original U-boot start and at (patched) mainline u-boot start: three MPPs are set up differently, namely MPP13 and 14 (original had UART 1 signals, mainline has SD signals) and MPP29 (original had TS MP[9], mainline has GPIO).
I have taken the OpenRD schematics from GlobalScale Technologies, and I have found no indication that these signals have anything to do with SATA.
Also, I have noticed that 'ide reset' may work on kirkwood dependending on conditions yet imprecise, possibly related to whether an 'ide reset' was already done from the original u-boot; also there are times when I get garbled console output or no console at all.
These random issues could come from the fact I use OpenOCD to reset the Open-RD client, set up the RAM and upload and run the u-boot image, rather than rely on the kwbimage process -- that's because I don't want to flash to NAND until I am sure the boot loader works enough -- and there may be initialization differences between the kwbimage wrapper and the OpenOCD init script. I'll have a look at that too, just in case.
As for the ATAPI issue as such, I'll try adding a delay between the writes within the port initialization function, although I could find no indication in the 88F6281 specs that such a delay is required or what order of duration it should have.
I'll post my results at end of day today.
Amicalement,
(adding Tanmay who might be interested in the OpenOCD init sequence issue)
Le 02/08/2010 08:13, Albert ARIBAUD a écrit :
Hi,
Le 02/08/2010 05:35, Prafulla Wadaskar a écrit :
I tried tweaking MPP setup for SATA related stuff, it's multiplexed with UART and other I/Os (NAND), What I observed: if I boot kernel with sata support, kernel sata driver works properly and I can detect and use IDE devices.
So I doubt MPP, I don't know kernel (latest stable) overrides MPP settings done by u-boot?? We can get some reference from there.
I went the low level route and compared MPP / GPIO settings (content of 0xf1010000, 0xf1010100, 0xf1010140) at original U-boot start and at (patched) mainline u-boot start: three MPPs are set up differently, namely MPP13 and 14 (original had UART 1 signals, mainline has SD signals) and MPP29 (original had TS MP[9], mainline has GPIO).
I have taken the OpenRD schematics from GlobalScale Technologies, and I have found no indication that these signals have anything to do with SATA.
Also, I have noticed that 'ide reset' may work on kirkwood dependending on conditions yet imprecise, possibly related to whether an 'ide reset' was already done from the original u-boot; also there are times when I get garbled console output or no console at all.
These random issues could come from the fact I use OpenOCD to reset the Open-RD client, set up the RAM and upload and run the u-boot image, rather than rely on the kwbimage process -- that's because I don't want to flash to NAND until I am sure the boot loader works enough -- and there may be initialization differences between the kwbimage wrapper and the OpenOCD init script. I'll have a look at that too, just in case.
I've had a look, and the OpenOCD config file for openrd has an incomplete init sequence, mostly concerning MPP settings. I've completed it and so far it seems to work better (I'll check/submit an update to the OpenOCD project for this).
As for the ATAPI issue as such, I'll try adding a delay between the writes within the port initialization function, although I could find no indication in the 88F6281 specs that such a delay is required or what order of duration it should have.
I'll post my results at end of day today.
Actually two things were necessary to get ide reset to work reliably:
1) adding a delay between the writes to SControl. Experimentation showed this delay should be at least 41 us on my board. I have set it to 50 us to play safe on possible HW characteristics dispersions.
2) moving the call(s) to mvsata_ide_initialize_port() from board_init() function to function ide_preinit(), which is called just before an IDE reset if CONFIG_IDE_INIT is set -- accordingly, I added ide_preinit() to openrd_base.c and defined CONFIG_IDE_INIT in kirkwood.h.
Prafulla, can you try the patch attached above yours?
If this works, then I'll backport the above fixes to orion5x/edminiv2 and post a V7 patch.
Amicalement,
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Tuesday, August 03, 2010 5:32 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; tanmay.upadhyay@einfochips.com Subject: Re: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
(adding Tanmay who might be interested in the OpenOCD init sequence issue)
Le 02/08/2010 08:13, Albert ARIBAUD a écrit :
Hi,
Le 02/08/2010 05:35, Prafulla Wadaskar a écrit :
I tried tweaking MPP setup for SATA related stuff, it's
multiplexed with UART and other I/Os (NAND),
What I observed: if I boot kernel with sata support,
kernel sata driver works properly and I can detect and use IDE devices.
So I doubt MPP, I don't know kernel (latest stable)
overrides MPP settings done by u-boot?? We can get some reference from there.
I went the low level route and compared MPP / GPIO settings
(content of
0xf1010000, 0xf1010100, 0xf1010140) at original U-boot start and at (patched) mainline u-boot start: three MPPs are set up differently, namely MPP13 and 14 (original had UART 1 signals, mainline has SD signals) and MPP29 (original had TS MP[9], mainline has GPIO).
I have taken the OpenRD schematics from GlobalScale
Technologies, and I
have found no indication that these signals have anything
to do with SATA.
Also, I have noticed that 'ide reset' may work on kirkwood
dependending
on conditions yet imprecise, possibly related to whether an
'ide reset'
was already done from the original u-boot; also there are
times when I
get garbled console output or no console at all.
These random issues could come from the fact I use OpenOCD
to reset the
Open-RD client, set up the RAM and upload and run the u-boot image, rather than rely on the kwbimage process -- that's because
I don't want
to flash to NAND until I am sure the boot loader works enough -- and there may be initialization differences between the
kwbimage wrapper and
the OpenOCD init script. I'll have a look at that too, just in case.
I've had a look, and the OpenOCD config file for openrd has an incomplete init sequence, mostly concerning MPP settings. I've completed it and so far it seems to work better (I'll check/submit an update to the OpenOCD project for this).
As for the ATAPI issue as such, I'll try adding a delay between the writes within the port initialization function, although I
could find no
indication in the 88F6281 specs that such a delay is
required or what
order of duration it should have.
I'll post my results at end of day today.
Actually two things were necessary to get ide reset to work reliably:
- adding a delay between the writes to SControl.
Experimentation showed this delay should be at least 41 us on my board. I have set it to 50 us to play safe on possible HW characteristics dispersions.
- moving the call(s) to mvsata_ide_initialize_port() from
board_init() function to function ide_preinit(), which is called just before an IDE reset if CONFIG_IDE_INIT is set -- accordingly, I added ide_preinit() to openrd_base.c and defined CONFIG_IDE_INIT in kirkwood.h.
Prafulla, can you try the patch attached above yours?
Sure, I will try this and let you know
Regards.. Prafulla . .
If this works, then I'll backport the above fixes to orion5x/edminiv2 and post a V7 patch.
Amicalement,
Albert.
-----Original Message----- From: Prafulla Wadaskar Sent: Tuesday, August 03, 2010 5:40 PM To: 'Albert ARIBAUD' Cc: u-boot@lists.denx.de; tanmay.upadhyay@einfochips.com; Prabhanjan Sarnaik; Ashish Karkare Subject: RE: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
...snip...
Actually two things were necessary to get ide reset to work
reliably:
- adding a delay between the writes to SControl.
Experimentation showed this delay should be at least 41 us on my board. I have set it to 50 us to play safe on possible HW characteristics dispersions.
- moving the call(s) to mvsata_ide_initialize_port() from
board_init() function to function ide_preinit(), which is called just before an IDE reset if CONFIG_IDE_INIT is set -- accordingly, I added ide_preinit() to openrd_base.c and defined CONFIG_IDE_INIT in kirkwood.h.
Prafulla, can you try the patch attached above yours?
Sure, I will try this and let you know
Hi Albert
It worked for me. You may post V7, then I will post my patches for Kirkwood sata support
I have two more suggestion, 1. put ide_preinit function in mvsata driver, define CONFIG_IDE_PREINIT in board config file
2. pls remove the blank lines between each command in function mvsata_ide_initialize_port, it looks ugly.
3. Instead of adding fixed 41/50 usec delay between the writes to Scontrol It would be good if you can check/poll some status bit associated with IDE controller, this will make mvsata driver rock solid on any platform.
Regards.. Prafulla . .
Regards.. Prafulla . .
If this works, then I'll backport the above fixes to
orion5x/edminiv2
and post a V7 patch.
Amicalement,
Albert.
Le 04/08/2010 08:08, Prafulla Wadaskar a écrit :
-----Original Message----- From: Prafulla Wadaskar Sent: Tuesday, August 03, 2010 5:40 PM To: 'Albert ARIBAUD' Cc: u-boot@lists.denx.de; tanmay.upadhyay@einfochips.com; Prabhanjan Sarnaik; Ashish Karkare Subject: RE: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
...snip...
Actually two things were necessary to get ide reset to work
reliably:
- adding a delay between the writes to SControl.
Experimentation showed this delay should be at least 41 us on my board. I have set it to 50 us to play safe on possible HW characteristics dispersions.
- moving the call(s) to mvsata_ide_initialize_port() from
board_init() function to function ide_preinit(), which is called just before an IDE reset if CONFIG_IDE_INIT is set -- accordingly, I added ide_preinit() to openrd_base.c and defined CONFIG_IDE_INIT in kirkwood.h.
Prafulla, can you try the patch attached above yours?
Sure, I will try this and let you know
Hi Albert
It worked for me.
Great!
You may post V7, then I will post my patches for Kirkwood sata support
Will do.
I have two more suggestion,
put ide_preinit function in mvsata driver, define CONFIG_IDE_PREINIT in board config file
pls remove the blank lines between each command in function mvsata_ide_initialize_port, it looks ugly.
Ok for 1 and 2.
- Instead of adding fixed 41/50 usec delay between the writes to Scontrol
It would be good if you can check/poll some status bit associated with IDE controller, this will make mvsata driver rock solid on any platform.
I've looked up the marvell kirkwood and orion docs for such a control bit but found none. I'll look it up again, however it might help if you can find someone inside Marvell who would, and could, provide the info.
Regards.. Prafulla . .
Amicalement,
Le 04/08/2010 09:23, Albert ARIBAUD a écrit :
Le 04/08/2010 08:08, Prafulla Wadaskar a écrit :
- Instead of adding fixed 41/50 usec delay between the writes to
Scontrol It would be good if you can check/poll some status bit associated with IDE controller, this will make mvsata driver rock solid on any platform.
I've looked up the marvell kirkwood and orion docs for such a control bit but found none. I'll look it up again, however it might help if you can find someone inside Marvell who would, and could, provide the info.
I think I've found out how it works.
I initially thought the DET field in SControl was a sort of reset line, and that writing a 1 would put the controller in continuous reset and writing a 0 to put it out of reset.
But actually, DET is a command field : a write of 1 starts the reset sequence immediately: the DET field of the SStatus register will go from 0 to 3 (possibly passing through 1).
Then you can set SControl's DET back to 0 so that you can use the port.
Thus the init sequence becomes: write 3 to SControl's IPM and 1 to DET, read SStatus until its DET field is 3, write 0 to SControl's DET.
However I'll keep a timeout value in the status read loop, because you can't expect SStatus to become 3: it could stay 0 if no drive is connected, for instance. If I did not keep a timeout, u-boot would freeze. :/
Amicalement,
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Thursday, August 05, 2010 1:34 AM To: Albert ARIBAUD Cc: Prafulla Wadaskar; u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare; tanmay.upadhyay@einfochips.com Subject: Re: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
Le 04/08/2010 09:23, Albert ARIBAUD a écrit :
Le 04/08/2010 08:08, Prafulla Wadaskar a écrit :
- Instead of adding fixed 41/50 usec delay between the writes to
Scontrol It would be good if you can check/poll some status bit associated with IDE controller, this will make mvsata driver rock solid on any platform.
I've looked up the marvell kirkwood and orion docs for
such a control
bit but found none. I'll look it up again, however it might help if you can find someone inside Marvell who would, and could,
provide the
info.
I think I've found out how it works.
I initially thought the DET field in SControl was a sort of reset line, and that writing a 1 would put the controller in continuous reset and writing a 0 to put it out of reset.
But actually, DET is a command field : a write of 1 starts the reset sequence immediately: the DET field of the SStatus register will go from 0 to 3 (possibly passing through 1).
Then you can set SControl's DET back to 0 so that you can use the port.
Thus the init sequence becomes: write 3 to SControl's IPM and 1 to DET, read SStatus until its DET field is 3, write 0 to SControl's DET.
However I'll keep a timeout value in the status read loop, because you can't expect SStatus to become 3: it could stay 0 if no drive is connected, for instance. If I did not keep a timeout, u-boot would freeze. :/
Hi Albert Good findings.... This would be great improvement with right approach.
Regards.. Prafulla . .
Some thoughts, and then a question for Wolfgang regarding IDE config macros
Le 04/08/2010 08:08, Prafulla Wadaskar a écrit :
I have two more suggestion,
- put ide_preinit function in mvsata driver, define CONFIG_IDE_PREINIT in board config file
This could help reducing the source code size, because then we don't need an mvsata_ide.h any more as mvsata_ide_initialize_port() would become a static function ov mvsata_ide.c, called by ide_preinit().
One issue is that ide_preinit() should initialize only those ports that exist and are used in a given board. If we put it in mvsata_ide.c, then we need to rely on config macros to tell ide_preinit() where port 0 is, and if port 1 exists/is used, where it is too.
Note that this info is exactly the same as that given in configs for cmd_ide.
For instance, for ED Mini V2 (uses port 1 only) we'd have something like
/* ATA registers base is at SATA controller base */ #define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE /* ATA bus 0 is orion5x port 1 on ED Mini V2 */ #define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET
... and for OpenRD, which has two SATA ports:
/* ATA registers base is at SATA controller base */ #define CONFIG_SYS_ATA_BASE_ADDR KW_SATA_BASE /* ATA bus 0 is orion5x port 1 on ED Mini V2 */ #define CONFIG_SYS_ATA_IDE0_OFFSET KW_SATA_PORT0_OFFSET #define CONFIG_SYS_ATA_IDE1_OFFSET KW_SATA_PORT1_OFFSET
Theoretically I should create a similar set of macros for mvsata_ide, but it seems to be that since mvsata_ide is intended to always be used along with cmd_ide, it would be simpler to use the cmd_ide macros CONFIG_SYS_ATA_x macros in mvsata_ide.c to determine port0's address and, if port1 exists, port1's address.
Wolfgang, would it be allowable for mvsata_ide to use macros intended for cmd_ide?
Amicalement,
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Thursday, August 05, 2010 2:06 AM To: Prafulla Wadaskar; Wolfgang Denk Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik; Prabhanjan@theia.denx.de; tanmay.upadhyay@einfochips.com Subject: Re: [PATCH V5 4/4] edminiv2: add mvsata_ide and cmd_ide support
Some thoughts, and then a question for Wolfgang regarding IDE config macros
Le 04/08/2010 08:08, Prafulla Wadaskar a écrit :
I have two more suggestion,
- put ide_preinit function in mvsata driver, define
CONFIG_IDE_PREINIT in board config file
This could help reducing the source code size, because then we don't need an mvsata_ide.h any more as mvsata_ide_initialize_port() would become a static function ov mvsata_ide.c, called by ide_preinit().
I vote for this approach
One issue is that ide_preinit() should initialize only those ports that exist and are used in a given board. If we put it in mvsata_ide.c, then we need to rely on config macros to tell ide_preinit() where port 0 is, and if port 1 exists/is used, where it is too.
Note that this info is exactly the same as that given in configs for cmd_ide.
For instance, for ED Mini V2 (uses port 1 only) we'd have something like
/* ATA registers base is at SATA controller base */ #define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE /* ATA bus 0 is orion5x port 1 on ED Mini V2 */ #define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET
... and for OpenRD, which has two SATA ports:
/* ATA registers base is at SATA controller base */ #define CONFIG_SYS_ATA_BASE_ADDR KW_SATA_BASE /* ATA bus 0 is orion5x port 1 on ED Mini V2 */ #define CONFIG_SYS_ATA_IDE0_OFFSET KW_SATA_PORT0_OFFSET #define CONFIG_SYS_ATA_IDE1_OFFSET KW_SATA_PORT1_OFFSET
Theoretically I should create a similar set of macros for mvsata_ide, but it seems to be that since mvsata_ide is intended to always be used along with cmd_ide, it would be simpler to use the cmd_ide macros CONFIG_SYS_ATA_x macros in mvsata_ide.c to determine port0's address and, if port1 exists, port1's address.
Wolfgang, would it be allowable for mvsata_ide to use macros intended for cmd_ide?
I don't think there will be any issue, let's wait for Wolfgang's feedback
Regards.. Prafulla . .
Le 05/08/2010 07:27, Prafulla Wadaskar a écrit :
Wolfgang, would it be allowable for mvsata_ide to use macros intended for cmd_ide?
I don't think there will be any issue, let's wait for Wolfgang's feedback
Regards.. Prafulla . .
I'll push a V7 of the patch and see if Wolfgang NAKs it or not.
Amicalement,
Dear Albert ARIBAUD,
In message 4C59CF1B.6050904@free.fr you wrote:
Wolfgang, would it be allowable for mvsata_ide to use macros intended for cmd_ide?
I see no problems with that, so yes from me.
Best regards,
Wolfgang Denk
-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Albert Aribaud Sent: Tuesday, July 13, 2010 5:33 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V5 3/4] cmd_ide: add support for orion5x
Add MVSATAHC definitions to orion5x. Add support for orion5x in cmd_ide.
Signed-off-by: Albert Aribaud albert.aribaud@free.fr
arch/arm/include/asm/arch-orion5x/orion5x.h | 3 +++ common/cmd_ide.c | 4 ++++ 2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index 4008c84..100a411 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -55,6 +55,9 @@ #define ORION5X_USB20_PORT0_BASE (ORION5X_REGISTER(0x50000)) #define ORION5X_USB20_PORT1_BASE (ORION5X_REGISTER(0xA0000)) #define ORION5X_EGIGA_BASE (ORION5X_REGISTER(0x72000)) +#define ORION5X_SATA_BASE (ORION5X_REGISTER(0x80000)) +#define ORION5X_SATA_PORT0_OFFSET 0x2000 +#define ORION5X_SATA_PORT1_OFFSET 0x4000
#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024)
diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 9292a5b..7f98ebb 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -45,6 +45,10 @@ #include <mpc5xxx.h> #endif
+#ifdef CONFIG_ORION5X +#include <asm/arch/orion5x.h> +#endif
#include <ide.h> #include <ata.h>
Acked-by: Prafulla Wadaskar prafulla@marvell.com
-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Albert Aribaud Sent: Tuesday, July 13, 2010 5:33 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V5 2/4] ide: add mvsata_ide driver
This driver only provides initialization code; actual driving is done by cmd_ide.c using the ATA compatibility mode of the Marvell SATAHC controller.
Signed-off-by: Albert Aribaud albert.aribaud@free.fr
drivers/block/Makefile | 7 +++-- drivers/block/mvsata_ide.c | 60 ++++++++++++++++++++++++++++++++++++++++++++ include/mvsata_ide.h | 55 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 119 insertions(+), 3 deletions(-) create mode 100644 drivers/block/mvsata_ide.c create mode 100644 include/mvsata_ide.h
diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 3f6ad5c..64dcf4e 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -25,15 +25,16 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libblock.a
+COBJS-$(CONFIG_SCSI_AHCI) += ahci.o COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o -COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o -COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_LIBATA) += libata.o +COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o +COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o -COBJS-$(CONFIG_SCSI_AHCI) += ahci.o +COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o COBJS-$(CONFIG_SYSTEMACE) += systemace.o
diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c new file mode 100644 index 0000000..f538839 --- /dev/null +++ b/drivers/block/mvsata_ide.c @@ -0,0 +1,60 @@ +/*
- Copyright (C) 2010 Albert ARIBAUD albert.aribaud@free.fr
- Written-by: Albert ARIBAUD albert.aribaud@free.fr
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#include <common.h> +#include <asm/io.h> +#include "mvsata_ide.h"
+/* Mask and values for device DETection and link initialization */ +#define MVSATA_SCONTROL_DET_MASK 0x0000000F +#define MVSATA_SCONTROL_DET_NONE 0x00000000 +#define MVSATA_SCONTROL_DET_INIT 0x00000001
+/* Mask and values for device Interface Power Management */ +#define MVSATA_SCONTROL_IPM_MASK 0x00000F00 +#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300
+#define MVSATA_SCONTROL_MASK \
- (MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK)
+#define MVSATA_PORT_INIT \
- (MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
+#define MVSATA_PORT_USE \
- (MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
Can you move above macros to header file?
+void mvsata_ide_initialize_port(struct mvsata_port_registers *port) +{
- u32 reg;
- reg = readl(&port->SControl);
- reg = (reg & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
- writel(reg, &port->SControl);
- reg = (reg & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE;
- writel(reg, &port->SControl);
+} diff --git a/include/mvsata_ide.h b/include/mvsata_ide.h new file mode 100644 index 0000000..ad0f854 --- /dev/null +++ b/include/mvsata_ide.h @@ -0,0 +1,55 @@ +/*
- Copyright (C) 2010 Albert ARIBAUD albert.aribaud@free.fr
- Written-by: Albert ARIBAUD albert.aribaud@free.fr
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#ifndef _MVSATA_IDE_H +#define _MVSATA_IDE_H
+#ifndef __ASSEMBLY__
+/* SATA port registers */ +struct mvsata_port_registers +{
- u32 Reserved1[192];
- /* offset 0x300 : ATA Interface registers */
- u32 SStatus;
- u32 SError;
- u32 SControl;
- u32 LTMode;
- u32 PhyMode3;
- u32 PhyMode4;
- u32 Reserved2[5];
- u32 PhyMode1;
- u32 PhyMode2;
- u32 BIST_CR;
- u32 BIST_DW1;
- u32 BIST_DW2;
- u32 SErrorIntrMask;
As a part fo standard coding practice, let avoide mix letters Can you please use all lowercase for all variables?
Regards.. Prafulla . .
Hi Prafulla et al.,
Le 21/07/2010 12:16, Prafulla Wadaskar a écrit :
-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Albert Aribaud Sent: Tuesday, July 13, 2010 5:33 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V5 2/4] ide: add mvsata_ide driver
This driver only provides initialization code; actual driving is done by cmd_ide.c using the ATA compatibility mode of the Marvell SATAHC controller.
Signed-off-by: Albert Aribaudalbert.aribaud@free.fr
drivers/block/Makefile | 7 +++-- drivers/block/mvsata_ide.c | 60 ++++++++++++++++++++++++++++++++++++++++++++ include/mvsata_ide.h | 55 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 119 insertions(+), 3 deletions(-) create mode 100644 drivers/block/mvsata_ide.c create mode 100644 include/mvsata_ide.h
diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 3f6ad5c..64dcf4e 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -25,15 +25,16 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libblock.a
+COBJS-$(CONFIG_SCSI_AHCI) += ahci.o COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o -COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o -COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_LIBATA) += libata.o +COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o +COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o -COBJS-$(CONFIG_SCSI_AHCI) += ahci.o +COBJS-$(CONFIG_IDE_SIL680) += sil680.o COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o COBJS-$(CONFIG_SYSTEMACE) += systemace.o
diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c new file mode 100644 index 0000000..f538839 --- /dev/null +++ b/drivers/block/mvsata_ide.c @@ -0,0 +1,60 @@ +/*
- Copyright (C) 2010 Albert ARIBAUDalbert.aribaud@free.fr
- Written-by: Albert ARIBAUDalbert.aribaud@free.fr
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#include<common.h> +#include<asm/io.h> +#include "mvsata_ide.h"
+/* Mask and values for device DETection and link initialization */ +#define MVSATA_SCONTROL_DET_MASK 0x0000000F +#define MVSATA_SCONTROL_DET_NONE 0x00000000 +#define MVSATA_SCONTROL_DET_INIT 0x00000001
+/* Mask and values for device Interface Power Management */ +#define MVSATA_SCONTROL_IPM_MASK 0x00000F00 +#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300
+#define MVSATA_SCONTROL_MASK \
- (MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK)
+#define MVSATA_PORT_INIT \
- (MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
+#define MVSATA_PORT_USE \
- (MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
Can you move above macros to header file?
They are used / useful only in this .c file, and defined only to avoid magic numbers. What would be the point in moving them to a header file?
+void mvsata_ide_initialize_port(struct mvsata_port_registers *port) +{
- u32 reg;
- reg = readl(&port->SControl);
- reg = (reg& ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
- writel(reg,&port->SControl);
- reg = (reg& ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE;
- writel(reg,&port->SControl);
+} diff --git a/include/mvsata_ide.h b/include/mvsata_ide.h new file mode 100644 index 0000000..ad0f854 --- /dev/null +++ b/include/mvsata_ide.h @@ -0,0 +1,55 @@ +/*
- Copyright (C) 2010 Albert ARIBAUDalbert.aribaud@free.fr
- Written-by: Albert ARIBAUDalbert.aribaud@free.fr
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#ifndef _MVSATA_IDE_H +#define _MVSATA_IDE_H
+#ifndef __ASSEMBLY__
+/* SATA port registers */ +struct mvsata_port_registers +{
- u32 Reserved1[192];
- /* offset 0x300 : ATA Interface registers */
- u32 SStatus;
- u32 SError;
- u32 SControl;
- u32 LTMode;
- u32 PhyMode3;
- u32 PhyMode4;
- u32 Reserved2[5];
- u32 PhyMode1;
- u32 PhyMode2;
- u32 BIST_CR;
- u32 BIST_DW1;
- u32 BIST_DW2;
- u32 SErrorIntrMask;
As a part fo standard coding practice, let avoide mix letters Can you please use all lowercase for all variables?
Ok.
Regards.. Prafulla . .
Amicalement,
Hi all,
Looking at the custodians list on the Denx site, I haven't found one for ide or mass storage. Did I miss him/her? If not, then, apart from Prafulla's for Marvell stuff, whose Ack or Nak should I expect for this patch set?
Thanks in advance,
Amicalement, Albert.
Le 13/07/2010 14:02, Albert Aribaud a écrit :
This configuration option replaces a complex conditional in cmd_ide.c with an explicit define to be added to SoC or board configs.
Signed-off-by: Albert Aribaudalbert.aribaud@free.fr
This patch set introduces CONFIG_IDE_SWAP_IO as suggested by Wolfgang Denk, adds orion5x support to cmd_ide.c and adds IDE support to edminiv2.
Patchset history:
V1: Initial 4-patch set -- not cleanly submitted (does not appear on gmane for instance) and contained some unrelated changes.
V2: Slimmed down to 3 patches and removed unrelated changes.
V3: Back to 4 patches (cmd_ide improvement, driver addition, cmd_ide support for orion, edminiv2 support for sata); made initialization code reuseable as a block driver ; moved to C structures; commented some constants.
V4: Reordered objects alphabetically in drivers/block/Makefile. Shortened mv_sata to mvsata. Removed volatile qualifier in mvsata port structure. Moved port pointer definition from SoC to board code. Removed unrelated changes.
V5: Fixed typo in mvsata_ide driver (IMP, should have been IPM).
arch/powerpc/include/asm/config.h | 3 +++ common/cmd_ide.c | 18 +++++++++--------- doc/README.PXA_CF | 8 ++++++++ include/configs/ap325rxa.h | 1 + include/configs/ms7720se.h | 1 + include/configs/r2dplus.h | 1 + include/configs/r7780mp.h | 1 + 7 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index fc3facb..371989d 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -76,4 +76,7 @@ /* Relocation to SDRAM works on all PPC boards */ #define CONFIG_RELOC_FIXUP_WORKS
+/* All PPC boards must swap IDE bytes */ +#define CONFIG_IDE_SWAP_IO
- #endif /* _ASM_CONFIG_H_ */
diff --git a/common/cmd_ide.c b/common/cmd_ide.c index d486697..9292a5b 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -853,7 +853,7 @@ input_swap_data(int dev, ulong *sect_buf, int words) #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) +#if defined(CONFIG_IDE_SWAP_IO) static void output_data(int dev, ulong *sect_buf, int words) { @@ -897,15 +897,15 @@ output_data(int dev, ulong *sect_buf, int words) } #endif } -#else /* ! __PPC__ */ +#else /* ! CONFIG_IDE_SWAP_IO */ static void output_data(int dev, ulong *sect_buf, int words) { outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1); } -#endif /* __PPC__ */ +#endif /* CONFIG_IDE_SWAP_IO */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) +#if defined(CONFIG_IDE_SWAP_IO) static void input_data(int dev, ulong *sect_buf, int words) { @@ -955,14 +955,14 @@ input_data(int dev, ulong *sect_buf, int words) } #endif } -#else /* ! __PPC__ */ +#else /* ! CONFIG_IDE_SWAP_IO */ static void input_data(int dev, ulong *sect_buf, int words) { insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<< 1); }
-#endif /* __PPC__ */ +#endif /* CONFIG_IDE_SWAP_IO */
/* ------------------------------------------------------------------------- */ @@ -1579,7 +1579,7 @@ int ide_device_present(int dev)
- ATAPI Support
*/
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(CONFIG_IDE_SWAP_IO) /* since ATAPI may use commands with not 4 bytes alligned length
- we have our own transfer functions, 2 bytes alligned */
static void @@ -1646,7 +1646,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) #endif }
-#else /* ! __PPC__ */ +#else /* ! CONFIG_IDE_SWAP_IO */ static void output_data_shorts(int dev, ushort *sect_buf, int shorts) { @@ -1659,7 +1659,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts); }
-#endif /* __PPC__ */ +#endif /* CONFIG_IDE_SWAP_IO */
/*
- Wait until (Status& mask) == res, or timeout (in ms)
diff --git a/doc/README.PXA_CF b/doc/README.PXA_CF index 6a0f236..1d76b32 100644 --- a/doc/README.PXA_CF +++ b/doc/README.PXA_CF @@ -6,6 +6,14 @@ follow the connections of the standard lubbock. Anyway just the block marked memory configuration should be touched since the other parameters are imposed by the PXA architecture.
+EDIT 2010-07-01: in common/cmd_ide.c, having CONFIG_PXA_PCMCIA defined +would cause looping on inw()/outw() rather than using insw()/outsw(), +thus making sure IDE / ATA bytes are properly swapped. This behaviour +is now controlled by CONFIG_IDE_SWAP_IO, therefore PXA boards with +PCMCIA should #define CONFIG_IDE_SWAP_IO.
+#define CONFIG_IDE_SWAP_IO
- #define CONFIG_PXA_PCMCIA 1 #define CONFIG_PXA_IDE 1
diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 70dd47e..80a5797 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -138,6 +138,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO
/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index ba0a3f8..0ea3527 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -122,5 +122,6 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO
#endif /* __MS7720SE_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 8931b97..955f3ff 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -96,6 +96,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO
/*
- SuperH PCI Bridge Configration
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 71c570e..3afe93a 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -171,6 +171,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO #endif /* CONFIG_CMD_IDE */
#endif /* __R7780RP_H */
Dear Albert ARIBAUD,
In message 4C3DD1BF.7020106@free.fr you wrote:
Looking at the custodians list on the Denx site, I haven't found one for ide or mass storage. Did I miss him/her? If not, then, apart from Prafulla's for Marvell stuff, whose Ack or Nak should I expect for this patch set?
It's my bailiwick...
As this patch is independent of the rest of the series, I will probably pull it ASAP - I just want to wait for any comments from Marek, who submitted a patch using a different approach.
Best regards,
Wolfgang Denk
participants (4)
-
Albert ARIBAUD -
Albert Aribaud
-
Prafulla Wadaskar -
Wolfgang Denk