[U-Boot] [PATCH] mx6sabred: Add PFUZE100 PMIC support
From: Fabio Estevam fabio.estevam@freescale.com
mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- board/freescale/mx6sabresd/mx6sabresd.c | 83 +++++++++++++++++++++++++++++++++ include/configs/mx6sabresd.h | 14 ++++++ include/power/pfuze100_pmic.h | 4 ++ 3 files changed, 101 insertions(+)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 3e314da..9e35711 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -12,6 +12,7 @@ #include <asm/arch/mx6-pins.h> #include <asm/errno.h> #include <asm/gpio.h> +#include <asm/imx-common/mxc_i2c.h> #include <asm/imx-common/iomux-v3.h> #include <asm/imx-common/boot_mode.h> #include <asm/imx-common/video.h> @@ -23,6 +24,9 @@ #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> +#include <i2c.h> +#include <power/pmic.h> +#include <power/pfuze100_pmic.h> DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ @@ -39,6 +43,14 @@ DECLARE_GLOBAL_DATA_PTR; #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define I2C_PMIC 1 + +#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -129,6 +141,19 @@ iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), };
+static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD, + .gp = IMX_GPIO_NR(4, 13) + } +}; + static void setup_spi(void) { imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); @@ -426,6 +451,64 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + + return 0; +} + +int misc_init_r(void) +{ + struct pmic *p; + int ret; + unsigned int reg; + + ret = pmic_init(I2C_PMIC); + if (ret) + return ret; + + p = pmic_get("PFUZE100_PMIC"); + ret = pmic_probe(p); + if (ret) + return ret; + + pmic_reg_read(p, PFUZE100_DEVICEID, ®); + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + + /* Increase VGEN3 from 2.5 to 2.8V */ + pmic_reg_read(p, PFUZE100_VGEN3VOL, ®); + reg &= ~0xf; + reg |= 0xa; + pmic_reg_write(p, PFUZE100_VGEN3VOL, reg); + + /* Increase VGEN5 from 2.8 to 3V */ + pmic_reg_read(p, PFUZE100_VGEN5VOL, ®); + reg &= ~0xf; + reg |= 0xc; + pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); + + /* Set SW1AB stanby volage to 0.975V */ + pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®); + reg &= ~0x3f; + reg |= 0x1b; + pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg); + + /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ + pmic_reg_read(p, PUZE_100_SW1ABCONF, ®); + reg &= ~0xc0; + reg |= 0x40; + pmic_reg_write(p, PUZE_100_SW1ABCONF, reg); + + /* Set SW1C standby voltage to 0.975V */ + pmic_reg_read(p, PFUZE100_SW1CSTBY, ®); + reg &= ~0x3f; + reg |= 0x1b; + pmic_reg_write(p, PFUZE100_SW1CSTBY, reg); + + /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */ + pmic_reg_read(p, PFUZE100_SW1CCONF, ®); + reg &= ~0xc0; + reg |= 0x40; + pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
return 0; } diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 0fa6573..fe846e6 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -25,6 +25,8 @@
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
+#define CONFIG_MISC_INIT_R + #include "mx6sabre_common.h"
#define CONFIG_SYS_FSL_USDHC_NUM 3 @@ -59,4 +61,16 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif
+/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + #endif /* __MX6QSABRESD_CONFIG_H */ diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index 2a9032a..8968678 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -15,7 +15,11 @@ enum { PFUZE100_FABID = 0x04,
PFUZE100_SW1ABVOL = 0x20, + PFUZE100_SW1ABSTBY = 0x21, + PUZE_100_SW1ABCONF = 0x24, PFUZE100_SW1CVOL = 0x2e, + PFUZE100_SW1CSTBY = 0x2f, + PFUZE100_SW1CCONF = 0x32, PFUZE100_SW2VOL = 0x35, PFUZE100_SW3AVOL = 0x3c, PFUZE100_SW3BVOL = 0x43,
On Sun, May 4, 2014 at 4:14 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Are you doing to add the equivalent for the mx6slevk too?
On Mon, May 5, 2014 at 11:00 AM, Otavio Salvador otavio@ossystems.com.br wrote:
On Sun, May 4, 2014 at 4:14 PM, Fabio Estevam festevam@gmail.com wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Are you doing to add the equivalent for the mx6slevk too?
After this one gets accepted I will add PMIC support for mx6slevk and mx6qsabreauto.
I also plan to add ldo-bypass mode support.
Hi Fabio,
just a minor question:
On 04/05/2014 21:14, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus.
Add support for it.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
board/freescale/mx6sabresd/mx6sabresd.c | 83 +++++++++++++++++++++++++++++++++ include/configs/mx6sabresd.h | 14 ++++++ include/power/pfuze100_pmic.h | 4 ++ 3 files changed, 101 insertions(+)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 3e314da..9e35711 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -12,6 +12,7 @@ #include <asm/arch/mx6-pins.h> #include <asm/errno.h> #include <asm/gpio.h> +#include <asm/imx-common/mxc_i2c.h> #include <asm/imx-common/iomux-v3.h> #include <asm/imx-common/boot_mode.h> #include <asm/imx-common/video.h> @@ -23,6 +24,9 @@ #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> +#include <i2c.h> +#include <power/pmic.h> +#include <power/pfuze100_pmic.h> DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ @@ -39,6 +43,14 @@ DECLARE_GLOBAL_DATA_PTR; #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+#define I2C_PMIC 1
+#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -129,6 +141,19 @@ iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), };
+static struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,.gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,.gp = IMX_GPIO_NR(4, 12)- },
- .sda = {
.i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,.gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,.gp = IMX_GPIO_NR(4, 13)- }
+};
static void setup_spi(void) { imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); @@ -426,6 +451,64 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
- return 0;
+}
+int misc_init_r(void) +{
Do we need misc_init ? Why not to use power_init_board() ? It is already defined as weak.
OT: I confess I am quite losing which functions are already foreseen. Most of them have the prefix board_, and they are easier to find. However, power_init_board() does not follow the same rule.
struct pmic *p;
int ret;
unsigned int reg;
ret = pmic_init(I2C_PMIC);
if (ret)
return ret;p = pmic_get("PFUZE100_PMIC");
ret = pmic_probe(p);
if (ret)
return ret;pmic_reg_read(p, PFUZE100_DEVICEID, ®);
printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
/* Increase VGEN3 from 2.5 to 2.8V */
pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
reg &= ~0xf;
reg |= 0xa;
pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
/* Increase VGEN5 from 2.8 to 3V */
pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
reg &= ~0xf;
reg |= 0xc;
pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
/* Set SW1AB stanby volage to 0.975V */
pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
reg &= ~0x3f;
reg |= 0x1b;
pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
pmic_reg_read(p, PUZE_100_SW1ABCONF, ®);
reg &= ~0xc0;
reg |= 0x40;
pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
/* Set SW1C standby voltage to 0.975V */
pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
reg &= ~0x3f;
reg |= 0x1b;
pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
reg &= ~0xc0;
reg |= 0x40;
pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
return 0;
} diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 0fa6573..fe846e6 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -25,6 +25,8 @@
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
+#define CONFIG_MISC_INIT_R
#include "mx6sabre_common.h"
#define CONFIG_SYS_FSL_USDHC_NUM 3 @@ -59,4 +61,16 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif
+/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000
+/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#endif /* __MX6QSABRESD_CONFIG_H */ diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index 2a9032a..8968678 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -15,7 +15,11 @@ enum { PFUZE100_FABID = 0x04,
PFUZE100_SW1ABVOL = 0x20,
- PFUZE100_SW1ABSTBY = 0x21,
- PUZE_100_SW1ABCONF = 0x24, PFUZE100_SW1CVOL = 0x2e,
- PFUZE100_SW1CSTBY = 0x2f,
- PFUZE100_SW1CCONF = 0x32, PFUZE100_SW2VOL = 0x35, PFUZE100_SW3AVOL = 0x3c, PFUZE100_SW3BVOL = 0x43,
Best regards, Stefano Babic
On Mon, May 5, 2014 at 7:29 AM, Stefano Babic sbabic@denx.de wrote:
Hi Fabio,
just a minor question:
On 04/05/2014 21:14, Fabio Estevam wrote:
<snip>
+int misc_init_r(void) +{
Do we need misc_init ? Why not to use power_init_board() ? It is already defined as weak.
OT: I confess I am quite losing which functions are already foreseen. Most of them have the prefix board_, and they are easier to find. However, power_init_board() does not follow the same rule.
Hi Fabio,
Yes, I think Stefano is correct in that power_init_board() is the right place to put pmic init. He asked me to do that to my recent series as well and it worked fine. Note that in that series I do have a patch that will rename pmic_init() for the PFUZE100 to power_pfuze100_init() [1]. I'm hoping that will make it in soon.
Tim
[1] - http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/184853/focus=184851
On Mon, May 5, 2014 at 12:32 PM, Tim Harvey tharvey@gateworks.com wrote:
Hi Fabio,
Yes, I think Stefano is correct in that power_init_board() is the right place to put pmic init. He asked me to do that to my recent series as well and it worked fine. Note that in that series I do have a patch that will rename pmic_init() for the PFUZE100 to power_pfuze100_init() [1]. I'm hoping that will make it in soon.
Thanks, Tim.
Stefano,
It seems that I need to wait for Tim's series to be applied, otherwise there will be a build breakage.
Are you taking his series?
Regards,
Fabio Estevam
On Mon, May 5, 2014 at 12:56 PM, Fabio Estevam festevam@gmail.com wrote:
On Mon, May 5, 2014 at 12:32 PM, Tim Harvey tharvey@gateworks.com wrote:
Hi Fabio,
Yes, I think Stefano is correct in that power_init_board() is the right place to put pmic init. He asked me to do that to my recent series as well and it worked fine. Note that in that series I do have a patch that will rename pmic_init() for the PFUZE100 to power_pfuze100_init() [1]. I'm hoping that will make it in soon.
Thanks, Tim.
Stefano,
It seems that I need to wait for Tim's series to be applied, otherwise there will be a build breakage.
In the meantime I converted the current patch to using power_init_board() instead, but this causes problems:
=> pmic list PMIC devices: name: PFUZE100_PMIC bus: I2C_1 => pmic PFUZE100_PMIC dump PMIC: PFUZE100_PMIC wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=0 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=1 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=2 i2c_init_transfer: give up i2c_regs=021a0000 PMIC: Registers dump failed
With the previous misc_init_r() approach the 'dump' command worked correctly.
Any suggestions?
Regards,
Fabio Estevam
Hi Fabio,
On 05/05/2014 18:08, Fabio Estevam wrote:
On Mon, May 5, 2014 at 12:56 PM, Fabio Estevam festevam@gmail.com wrote:
On Mon, May 5, 2014 at 12:32 PM, Tim Harvey tharvey@gateworks.com wrote:
Hi Fabio,
Yes, I think Stefano is correct in that power_init_board() is the right place to put pmic init. He asked me to do that to my recent series as well and it worked fine. Note that in that series I do have a patch that will rename pmic_init() for the PFUZE100 to power_pfuze100_init() [1]. I'm hoping that will make it in soon.
Thanks, Tim.
Stefano,
It seems that I need to wait for Tim's series to be applied, otherwise there will be a build breakage.
In the meantime I converted the current patch to using power_init_board() instead, but this causes problems:
=> pmic list PMIC devices: name: PFUZE100_PMIC bus: I2C_1 => pmic PFUZE100_PMIC dump PMIC: PFUZE100_PMIC wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=0 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=1 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=2 i2c_init_transfer: give up i2c_regs=021a0000 PMIC: Registers dump failed
With the previous misc_init_r() approach the 'dump' command worked correctly.
Any suggestions?
Checkin in arch/arm/lib/board.c, I see that power_init_board() is called quite early (that makes sense, as power can be necessary to go on). Can you try moving power_init_board() later ? Anyway, I2C is already set (by board_init, called previously) and malloc is also available.
Regards, Stefano
On Tue, May 6, 2014 at 5:07 AM, Stefano Babic sbabic@denx.de wrote:
Checkin in arch/arm/lib/board.c, I see that power_init_board() is called quite early (that makes sense, as power can be necessary to go on). Can you try moving power_init_board() later ? Anyway, I2C is already set (by board_init, called previously) and malloc is also available.
I tried putting power_init_board() after misc_init_r() and even in this case the 'pmic dump' command fails.
On the v3 version I call the pmic initialization inside board_late_init().
Regards,
Fabio Estevam
participants (4)
-
Fabio Estevam -
Otavio Salvador -
Stefano Babic -
Tim Harvey