The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values so it was not possible to set a slow pixel clock and thus prevented display on small screens.

Signed-off-by: Kenneth Johansson kenneth@southpole.se

--- a/board/ads5121/ads5121_diu.c +++ b/board/ads5121/ads5121_diu.c @@ -57,7 +57,7 @@ void diu_set_pixel_clock(unsigned int pixclock) /* Modify PXCLK in GUTS CLKDVDR */ debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr); temp = *clkdvdr & 0xFFFFFF00; - *clkdvdr = temp | (pixval & 0x1F); + *clkdvdr = temp | (pixval & 0xFF); debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr); }