From: Ying Zhang b40530@freescale.com

The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator.

Signed-off-by: Ying Zhang b40530@freescale.com --- Changed from v1: - Not support IR chip is used in AMD mode --- board/freescale/common/vid.c | 19 +++++++++++++++++-- board/freescale/common/vid.h | 4 ++++ board/freescale/t4rdb/t4240rdb.c | 7 +++++++ include/configs/T4240RDB.h | 10 ++++++++++ 4 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index f1bed51..1bd65a8 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -42,7 +42,7 @@ int __weak board_vdd_drop_compensation(void) * The IR chip can show up under the following addresses: * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA) * 0x09 (Verified on T1040RDB-PA) - * 0x38 (Verified on T2080QDS, T2081QDS) + * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB) */ static int find_ir_chip_on_i2c(void) { @@ -292,7 +292,7 @@ int adjust_vdd(ulong vdd_override) (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif u32 fusesr; - u8 vid; + u8 vid, buf; int vdd_target, vdd_current, vdd_last; int ret, i2caddress; unsigned long vdd_string_override; @@ -346,6 +346,21 @@ int adjust_vdd(ulong vdd_override) debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); }

+ /* check IR chip work on Intel mode*/ + ret = i2c_read(i2caddress, + IR36021_INTEL_MODE_OOFSET, + 1, (void *)&buf, 1); + if (ret) { + printf("VID: failed to read IR chip mode.\n"); + ret = -1; + goto exit; + } + if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { + printf("VID: IR Chip is not used in Intel mode.\n"); + ret = -1; + goto exit; + } + /* get the voltage ID from fuse status register */ fusesr = in_be32(&gur->dcfg_fusesr); /* diff --git a/board/freescale/common/vid.h b/board/freescale/common/vid.h index a9c7bb4..9182c20 100644 --- a/board/freescale/common/vid.h +++ b/board/freescale/common/vid.h @@ -11,6 +11,10 @@ #define IR36021_LOOP1_VOUT_OFFSET 0x9A #define IR36021_MFR_ID_OFFSET 0x92 #define IR36021_MFR_ID 0x43 +#define IR36021_INTEL_MODE_OOFSET 0x14 +#define IR36021_MODE_MASK 0x20 +#define IR36021_INTEL_MODE 0x00 +#define IR36021_AMD_MODE 0x20

/* step the IR regulator in 5mV increments */ #define IR_VDD_STEP_DOWN 5 diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c index fac442b..99a8730 100644 --- a/board/freescale/t4rdb/t4240rdb.c +++ b/board/freescale/t4rdb/t4240rdb.c @@ -21,6 +21,7 @@

#include "t4rdb.h" #include "cpld.h" +#include "../common/vid.h"

DECLARE_GLOBAL_DATA_PTR;

@@ -79,6 +80,12 @@ int board_early_init_r(void) #ifdef CONFIG_SYS_DPAA_QBMAN setup_portals(); #endif + /* + * Adjust core voltage according to voltage ID + * This function changes I2C mux to channel 2. + */ + if (adjust_vdd(0)) + printf("Warning: Adjusting core voltage failed.\n");

return 0; } diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 73279c8..4a17f41 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -606,6 +606,16 @@ unsigned long get_board_ddr_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3

+#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv" +#ifndef CONFIG_SPL_BUILD +#define CONFIG_VID +#endif +#define CONFIG_VOL_MONITOR_IR36021_SET +#define CONFIG_VOL_MONITOR_IR36021_READ +/* The lowest and highest voltage allowed for T4240RDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + /* * eSPI - Enhanced SPI */