[U-Boot] [PATCH v2 1/2] rockchip: rk3288: Add TPL_LDSCRIPT
Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com --- Changes for v2: - none
arch/arm/mach-rockchip/Kconfig | 7 +++++++ arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1e5a7bb79b..d9218da64f 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -72,6 +72,13 @@ config ROCKCHIP_RK3288 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
+if ROCKCHIP_RK3288 + +config TPL_LDSCRIPT + default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds" + +endif + config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 diff --git a/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds new file mode 100644 index 0000000000..c7a60929e6 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds @@ -0,0 +1,10 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE + +#include "../../cpu/u-boot-spl.lds"
TPL offset 0xff704004 is unaligned address which is adding nearest 8-bytes for next instruction, So 0xff704004 is adding 0x20 for proper alignment which is causing the next instruction data 0xefffffff is moved.
Hexdump with overlaped bytes: ----------------------------- 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000010 0000 0000 0000 0000 0000 0000 ffff eaff
So, Fix the TEXT_BASE for proper aligned address 0xff704000
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com --- Changes for v2: - Update commit message
arch/arm/mach-rockchip/Kconfig | 3 +++ configs/vyasa-rk3288_defconfig | 1 - 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d9218da64f..0adaed4367 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -77,6 +77,9 @@ if ROCKCHIP_RK3288 config TPL_LDSCRIPT default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
+config TPL_TEXT_BASE + default 0xff704000 + endif
config ROCKCHIP_RK3328 diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 95c988c05c..24a955a94a 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -5,7 +5,6 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y -CONFIG_TPL_TEXT_BASE=0xff704004 CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"
TPL offset 0xff704004 is unaligned address which is adding nearest 8-bytes for next instruction, So 0xff704004 is adding 0x20 for proper alignment which is causing the next instruction data 0xefffffff is moved.
Hexdump with overlaped bytes:
0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000010 0000 0000 0000 0000 0000 0000 ffff eaff
So, Fix the TEXT_BASE for proper aligned address 0xff704000
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes for v2:
- Update commit message
arch/arm/mach-rockchip/Kconfig | 3 +++ configs/vyasa-rk3288_defconfig | 1 - 2 files changed, 3 insertions(+), 1 deletion(-)
Applied to u-boot-rockchip, thanks!
Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes for v2:
- none
arch/arm/mach-rockchip/Kconfig | 7 +++++++ arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds
Applied to u-boot-rockchip, thanks!
I prefer to share the TPL script between all Rockchip SoCs,
and put this at arch/arm/mach-rockchip/.
I got one in my local branch, will update it once I clean up everything.
Thanks, - Kever On 02/23/2018 03:43 PM, Jagan Teki wrote:
Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes for v2:
- none
arch/arm/mach-rockchip/Kconfig | 7 +++++++ arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1e5a7bb79b..d9218da64f 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -72,6 +72,13 @@ config ROCKCHIP_RK3288 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
+if ROCKCHIP_RK3288
+config TPL_LDSCRIPT
- default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
+endif
config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 diff --git a/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds new file mode 100644 index 0000000000..c7a60929e6 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds @@ -0,0 +1,10 @@ +/*
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+#include "../../cpu/u-boot-spl.lds"
Kever,
Cleaning this up will be great. Once ready, we can merge this onto next …
Regards, Philipp.
On 26 Feb 2018, at 07:26, Kever Yang kever.yang@rock-chips.com wrote:
I prefer to share the TPL script between all Rockchip SoCs,
and put this at arch/arm/mach-rockchip/.
I got one in my local branch, will update it once I clean up everything.
Thanks,
- Kever
On 02/23/2018 03:43 PM, Jagan Teki wrote:
Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes for v2:
- none
arch/arm/mach-rockchip/Kconfig | 7 +++++++ arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1e5a7bb79b..d9218da64f 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -72,6 +72,13 @@ config ROCKCHIP_RK3288 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
+if ROCKCHIP_RK3288
+config TPL_LDSCRIPT
- default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
+endif
config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 diff --git a/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds new file mode 100644 index 0000000000..c7a60929e6 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds @@ -0,0 +1,10 @@ +/*
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+#include "../../cpu/u-boot-spl.lds"
I prefer to share the TPL script between all Rockchip SoCs,
and put this at arch/arm/mach-rockchip/.
I got one in my local branch, will update it once I clean up everything.
Thanks, - Kever On 02/23/2018 03:43 PM, Jagan Teki wrote:
Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes for v2:
- none
arch/arm/mach-rockchip/Kconfig | 7 +++++++ arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1e5a7bb79b..d9218da64f 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -72,6 +72,13 @@ config ROCKCHIP_RK3288 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
+if ROCKCHIP_RK3288
+config TPL_LDSCRIPT
- default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
+endif
config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 diff --git a/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds new file mode 100644 index 0000000000..c7a60929e6 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds @@ -0,0 +1,10 @@ +/*
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+#include "../../cpu/u-boot-spl.lds"
participants (4)
-
Dr. Philipp Tomsich -
Jagan Teki -
Kever Yang -
Philipp Tomsich