[U-Boot] [PATCH 1/3] mx6memcal: Fix the UART ports for mx6sabresd/auto boards
mx6sabresd board uses the following pins for console:
PAD_CSI0_DAT10__UART1_TX_DATA PAD_CSI0_DAT11__UART1_RX_DATA
,so put it in the same config option as wandboard.
mx6sabreauto board uses the following pins for console:
PAD_KEY_COL0__UART4_TX_DATA PAD_KEY_ROW0__UART4_RX_DATA
So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option.
The config option for sabreauto can be added later when needed.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com --- board/freescale/mx6memcal/Kconfig | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/board/freescale/mx6memcal/Kconfig b/board/freescale/mx6memcal/Kconfig index 443804d..9987cba 100644 --- a/board/freescale/mx6memcal/Kconfig +++ b/board/freescale/mx6memcal/Kconfig @@ -45,20 +45,12 @@ choice NXP SABRELite.
config UART1_CSI0_DAT10_11 - bool "UART1 on CSI0_DAT10/11 (Wand)" + bool "UART1 on CSI0_DAT10/11 (Wand, SabreSD)" depends on SERIAL_CONSOLE_UART1 help Choose this configuration if you're using pads CSI0_DAT10 and DAT11 for a console on UART1 as - is done on the i.MX6 Wand board. - - config UART1_SD3_DAT6_7 - bool "UART1 on SD3_DAT6/7 (SabreSD, SabreAuto)" - depends on SERIAL_CONSOLE_UART1 - help - Choose this configuration if you're using pads - SD3_DAT6 and DAT7 for a console on UART1 as is - done on the NXP SABRESD or SABREAUTO designs. + is done on the i.MX6 Wand board and i.MX6 SabreSD.
config UART1_UART1 bool "UART1 on UART1 (i.MX6SL EVK, WaRP)"
i.MX6ULL also does not support 64-bit DDR bus, so add it to the check logic.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com --- board/freescale/mx6memcal/spl.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c index 8ee89ff..e8b992c 100644 --- a/board/freescale/mx6memcal/spl.c +++ b/board/freescale/mx6memcal/spl.c @@ -419,6 +419,7 @@ void board_init_f(ulong dummy) if (sysinfo.dsize != 1) { if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) || + is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6SL)) { printf("cpu type 0x%x doesn't support 64-bit bus\n", get_cpu_type());
On 03/01/2018 15:55, Fabio Estevam wrote:
i.MX6ULL also does not support 64-bit DDR bus, so add it to the check logic.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com
board/freescale/mx6memcal/spl.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c index 8ee89ff..e8b992c 100644 --- a/board/freescale/mx6memcal/spl.c +++ b/board/freescale/mx6memcal/spl.c @@ -419,6 +419,7 @@ void board_init_f(ulong dummy) if (sysinfo.dsize != 1) { if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) ||
is_cpu_type(MXC_CPU_MX6ULL) ||
Applied to u-boot-imx, thanks !
Best regards, Stefano Babic
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration() show the same error message, which is confusing for debugging.
Disambiguate the mmdc_do_dqs_calibration() error message.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com --- board/freescale/mx6memcal/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c index e8b992c..027da4f 100644 --- a/board/freescale/mx6memcal/spl.c +++ b/board/freescale/mx6memcal/spl.c @@ -446,7 +446,7 @@ void board_init_f(ulong dummy) } else { errs = mmdc_do_dqs_calibration(&sysinfo); if (errs) { - printf("error %d from write level calibration\n", errs); + printf("error %d from dqs calibration\n", errs); } else { printf("completed successfully\n"); mmdc_read_calibration(&sysinfo, &calibration);
On 03/01/2018 15:55, Fabio Estevam wrote:
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration() show the same error message, which is confusing for debugging.
Disambiguate the mmdc_do_dqs_calibration() error message.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com
board/freescale/mx6memcal/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c index e8b992c..027da4f 100644 --- a/board/freescale/mx6memcal/spl.c +++ b/board/freescale/mx6memcal/spl.c @@ -446,7 +446,7 @@ void board_init_f(ulong dummy) } else { errs = mmdc_do_dqs_calibration(&sysinfo); if (errs) {
printf("error %d from write level calibration\n", errs);
printf("error %d from dqs calibration\n", errs);
Applied to u-boot-imx, thanks !
Best regards, Stefano Babic
On 03/01/2018 15:55, Fabio Estevam wrote:
mx6sabresd board uses the following pins for console:
PAD_CSI0_DAT10__UART1_TX_DATA PAD_CSI0_DAT11__UART1_RX_DATA
,so put it in the same config option as wandboard.
mx6sabreauto board uses the following pins for console:
PAD_KEY_COL0__UART4_TX_DATA PAD_KEY_ROW0__UART4_RX_DATA
So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option.
The config option for sabreauto can be added later when needed.
Signed-off-by: Fabio Estevam fabio.estevam@nxp.com
board/freescale/mx6memcal/Kconfig | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/board/freescale/mx6memcal/Kconfig b/board/freescale/mx6memcal/Kconfig index 443804d..9987cba 100644 --- a/board/freescale/mx6memcal/Kconfig +++ b/board/freescale/mx6memcal/Kconfig @@ -45,20 +45,12 @@ choice NXP SABRELite.
config UART1_CSI0_DAT10_11
bool "UART1 on CSI0_DAT10/11 (Wand)"
bool "UART1 on CSI0_DAT10/11 (Wand, SabreSD)"
is done on the i.MX6 Wand board.- config UART1_SD3_DAT6_7
bool "UART1 on SD3_DAT6/7 (SabreSD, SabreAuto)"depends on SERIAL_CONSOLE_UART1helpChoose this configuration if you're using padsSD3_DAT6 and DAT7 for a console on UART1 as isdone on the NXP SABRESD or SABREAUTO designs.
is done on the i.MX6 Wand board and i.MX6 SabreSD.config UART1_UART1 bool "UART1 on UART1 (i.MX6SL EVK, WaRP)"
Applied to u-boot-imx, thanks !
Best regards, Stefano Babic
participants (2)
-
Fabio Estevam -
Stefano Babic