[PATCH 00/11] rockchip: rk3288-firefly: Migrate to OF_UPSTREAM
This series migrate Firefly-RK3288 to use OF_UPSTREAM, ensure devices and pinctrl is included in xPL control FDT, set ethaddr based on cpuid and finally change to use FIT with checksum validation.
I do not have a Firefly-RK3288 board and have only done limited runtime test, with adjusted sdram props, on a Tinker Board.
This series have a loose dependency on the "rockchip: rk3288-tinker: Migrate to OF_UPSTREAM" series. Specifically that series change of SYS_MALLOC_F_LEN and its TPL variant in Kconfig.
Jonas Karlman (11): rockchip: rk3288-firefly: Drop unused SPL_LED related code rockchip: rk3288-firefly: Sort u-boot.dtsi nodes alphabetically rockchip: rk3288-firefly: Set ethaddr env based on cpuid rockchip: rk3288-firefly: Use common bss and stack addresses rockchip: rk3288-firefly: Include required DT nodes in xPL rockchip: rk3288-firefly: Include sdmmc regulator in SPL rockchip: rk3288-firefly: Drop use of silent console and late boardinfo rockchip: rk3288-firefly: Drop USE_PREBOOT Kconfig option rockchip: rk3288-firefly: Migrate to OF_UPSTREAM rockchip: rk3288-firefly: Fix slow Ethernet initializion rockchip: rk3288-firefly: Change to use FIT
arch/arm/dts/Makefile | 1 - arch/arm/dts/rk3288-firefly-u-boot.dtsi | 91 +++- arch/arm/dts/rk3288-firefly.dts | 43 -- arch/arm/dts/rk3288-firefly.dtsi | 491 ------------------ arch/arm/mach-rockchip/rk3288/Kconfig | 2 +- board/firefly/firefly-rk3288/MAINTAINERS | 1 + board/firefly/firefly-rk3288/Makefile | 7 - board/firefly/firefly-rk3288/firefly-rk3288.c | 46 -- configs/firefly-rk3288_defconfig | 39 +- 9 files changed, 89 insertions(+), 632 deletions(-) delete mode 100644 arch/arm/dts/rk3288-firefly.dts delete mode 100644 arch/arm/dts/rk3288-firefly.dtsi delete mode 100644 board/firefly/firefly-rk3288/Makefile delete mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c
The firefly-rk3288_defconfig build target does not enable the SPL_LED Kconfig option.
Drop the unused SPL_LED related code and replace it with a default-state prop to ensure the LED driver enable the LED at U-Boot proper phase.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- arch/arm/dts/rk3288-firefly-u-boot.dtsi | 17 +------ arch/arm/mach-rockchip/rk3288/Kconfig | 1 - board/firefly/firefly-rk3288/Makefile | 7 --- board/firefly/firefly-rk3288/firefly-rk3288.c | 46 ------------------- 4 files changed, 1 insertion(+), 70 deletions(-) delete mode 100644 board/firefly/firefly-rk3288/Makefile delete mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 644198a4a2fb..30b471900b30 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -6,20 +6,9 @@ #include "rk3288-u-boot.dtsi"
/ { - config { - bootph-all; - u-boot,boot-led = "firefly:green:power"; - }; - leds { - bootph-all; - - work { - bootph-all; - }; - power { - bootph-all; + default-state = "on"; }; }; }; @@ -56,10 +45,6 @@ bootph-all; };
-&gpio8 { - bootph-all; -}; - &pcfg_pull_up_drv_12ma { bootph-pre-ram; }; diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index ff16d258b4f5..9cc97bacc41d 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -75,7 +75,6 @@ config TARGET_FENNEC_RK3288 config TARGET_FIREFLY_RK3288 bool "Firefly-RK3288" select BOARD_LATE_INIT - select SPL_BOARD_INIT if SPL select TPL help Firefly is a RK3288-based development board with 2 USB ports, diff --git a/board/firefly/firefly-rk3288/Makefile b/board/firefly/firefly-rk3288/Makefile deleted file mode 100644 index 671684597d23..000000000000 --- a/board/firefly/firefly-rk3288/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2015 Google, Inc -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += firefly-rk3288.o diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c deleted file mode 100644 index c65ce5890e52..000000000000 --- a/board/firefly/firefly-rk3288/firefly-rk3288.c +++ /dev/null @@ -1,46 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Google, Inc - */ - -#include <hang.h> -#include <led.h> -#include <log.h> -#include <asm/global_data.h> -#include <dm/ofnode.h> - -#ifdef CONFIG_XPL_BUILD -static int setup_led(void) -{ -#ifdef CONFIG_SPL_LED - struct udevice *dev; - char *led_name; - int ret; - - led_name = ofnode_conf_read_str("u-boot,boot-led"); - if (!led_name) - return 0; - ret = led_get_by_label(led_name, &dev); - if (ret) { - debug("%s: get=%d\n", __func__, ret); - return ret; - } - ret = led_set_state(dev, LEDST_ON); - if (ret) - return ret; -#endif - - return 0; -} - -void spl_board_init(void) -{ - int ret; - - ret = setup_led(); - if (ret) { - debug("LED ret=%d\n", ret); - hang(); - } -} -#endif
On 2024/12/13 06:09, Jonas Karlman wrote:
The firefly-rk3288_defconfig build target does not enable the SPL_LED Kconfig option.
Drop the unused SPL_LED related code and replace it with a default-state prop to ensure the LED driver enable the LED at U-Boot proper phase.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/rk3288-firefly-u-boot.dtsi | 17 +------ arch/arm/mach-rockchip/rk3288/Kconfig | 1 - board/firefly/firefly-rk3288/Makefile | 7 --- board/firefly/firefly-rk3288/firefly-rk3288.c | 46 ------------------- 4 files changed, 1 insertion(+), 70 deletions(-) delete mode 100644 board/firefly/firefly-rk3288/Makefile delete mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 644198a4a2fb..30b471900b30 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -6,20 +6,9 @@ #include "rk3288-u-boot.dtsi"
/ {
- config {
bootph-all;u-boot,boot-led = "firefly:green:power";- };
- leds {
bootph-all;work {bootph-all;};- power {
bootph-all;
default-state = "on";@@ -56,10 +45,6 @@ bootph-all; };
-&gpio8 {
- bootph-all;
-};
- &pcfg_pull_up_drv_12ma { bootph-pre-ram; };
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index ff16d258b4f5..9cc97bacc41d 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -75,7 +75,6 @@ config TARGET_FENNEC_RK3288 config TARGET_FIREFLY_RK3288 bool "Firefly-RK3288" select BOARD_LATE_INIT
- select SPL_BOARD_INIT if SPL select TPL help Firefly is a RK3288-based development board with 2 USB ports,
diff --git a/board/firefly/firefly-rk3288/Makefile b/board/firefly/firefly-rk3288/Makefile deleted file mode 100644 index 671684597d23..000000000000 --- a/board/firefly/firefly-rk3288/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2015 Google, Inc -# -# SPDX-License-Identifier: GPL-2.0+ -#
-obj-y += firefly-rk3288.o diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c deleted file mode 100644 index c65ce5890e52..000000000000 --- a/board/firefly/firefly-rk3288/firefly-rk3288.c +++ /dev/null @@ -1,46 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- (C) Copyright 2015 Google, Inc
- */
-#include <hang.h> -#include <led.h> -#include <log.h> -#include <asm/global_data.h> -#include <dm/ofnode.h>
-#ifdef CONFIG_XPL_BUILD -static int setup_led(void) -{ -#ifdef CONFIG_SPL_LED
- struct udevice *dev;
- char *led_name;
- int ret;
- led_name = ofnode_conf_read_str("u-boot,boot-led");
- if (!led_name)
return 0;- ret = led_get_by_label(led_name, &dev);
- if (ret) {
debug("%s: get=%d\n", __func__, ret);return ret;- }
- ret = led_set_state(dev, LEDST_ON);
- if (ret)
return ret;-#endif
- return 0;
-}
-void spl_board_init(void) -{
- int ret;
- ret = setup_led();
- if (ret) {
debug("LED ret=%d\n", ret);hang();- }
-} -#endif
Sort the nodes in rk3288-firefly-u-boot.dtsi in alphabetical order.
This has no intended change to board DT, this only rearrange nodes in preparation for future changes.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- arch/arm/dts/rk3288-firefly-u-boot.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 30b471900b30..8870188e6129 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -25,30 +25,26 @@ rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; };
-&pinctrl { +&emmc { bootph-all; };
-&uart2 { +&gpio3 { bootph-all; };
-&sdmmc { - bootph-all; +&pcfg_pull_up_drv_12ma { + bootph-pre-ram; };
-&emmc { +&pinctrl { bootph-all; };
-&gpio3 { +&sdmmc { bootph-all; };
-&pcfg_pull_up_drv_12ma { - bootph-pre-ram; -}; - &sdmmc_bus4 { bootph-pre-ram; }; @@ -64,3 +60,7 @@ &sdmmc_pwr { bootph-pre-ram; }; + +&uart2 { + bootph-all; +};
On 2024/12/13 06:09, Jonas Karlman wrote:
Sort the nodes in rk3288-firefly-u-boot.dtsi in alphabetical order.
This has no intended change to board DT, this only rearrange nodes in preparation for future changes.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/rk3288-firefly-u-boot.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 30b471900b30..8870188e6129 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -25,30 +25,26 @@ rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; };
-&pinctrl { +&emmc { bootph-all; };
-&uart2 { +&gpio3 { bootph-all; };
-&sdmmc {
- bootph-all;
+&pcfg_pull_up_drv_12ma {
- bootph-pre-ram; };
-&emmc { +&pinctrl { bootph-all; };
-&gpio3 { +&sdmmc { bootph-all; };
-&pcfg_pull_up_drv_12ma {
- bootph-pre-ram;
-};
- &sdmmc_bus4 { bootph-pre-ram; };
@@ -64,3 +60,7 @@ &sdmmc_pwr { bootph-pre-ram; };
+&uart2 {
- bootph-all;
+};
Enable Kconfig options to read cpuid from efuse and set cpuid#, serial# and ethaddr env vars based on the value read from efuse.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- configs/firefly-rk3288_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 00f23174210f..eed0806b2321 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set @@ -50,7 +51,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -63,6 +63,8 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_ETH_DESIGNWARE=y
On 2024/12/13 06:09, Jonas Karlman wrote:
Enable Kconfig options to read cpuid from efuse and set cpuid#, serial# and ethaddr env vars based on the value read from efuse.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/firefly-rk3288_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 00f23174210f..eed0806b2321 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set @@ -50,7 +51,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -63,6 +63,8 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_ETH_DESIGNWARE=y
Migrate to use common bss, stack and malloc heap size and addresses to unify memory use in TPL, SPL and pre-reloc.
ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- arch/arm/mach-rockchip/rk3288/Kconfig | 1 + configs/firefly-rk3288_defconfig | 10 ---------- 2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 9cc97bacc41d..e563bf455e68 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -75,6 +75,7 @@ config TARGET_FENNEC_RK3288 config TARGET_FIREFLY_RK3288 bool "Firefly-RK3288" select BOARD_LATE_INIT + select ROCKCHIP_COMMON_STACK_ADDR select TPL help Firefly is a RK3288-based development board with 2 USB ports, diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index eed0806b2321..87ed0c0d2aea 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -5,19 +5,11 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_DM_RESET=y -CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y -CONFIG_SPL_STACK_R_ADDR=0x80000 -CONFIG_SPL_STACK=0xff718000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_SIZE_LIMIT=0x40000 @@ -31,8 +23,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_NO_BSS_LIMIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y
On 2024/12/13 06:09, Jonas Karlman wrote:
Migrate to use common bss, stack and malloc heap size and addresses to unify memory use in TPL, SPL and pre-reloc.
ENV_OFFSET is using the default value of 0x3f8000 and is also dropped.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/mach-rockchip/rk3288/Kconfig | 1 + configs/firefly-rk3288_defconfig | 10 ---------- 2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 9cc97bacc41d..e563bf455e68 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -75,6 +75,7 @@ config TARGET_FENNEC_RK3288 config TARGET_FIREFLY_RK3288 bool "Firefly-RK3288" select BOARD_LATE_INIT
- select ROCKCHIP_COMMON_STACK_ADDR select TPL help Firefly is a RK3288-based development board with 2 USB ports,
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index eed0806b2321..87ed0c0d2aea 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -5,19 +5,11 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_DM_RESET=y -CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y -CONFIG_SPL_STACK_R_ADDR=0x80000 -CONFIG_SPL_STACK=0xff718000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_SIZE_LIMIT=0x40000 @@ -31,8 +23,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_NO_BSS_LIMIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y
Add bootph- props to emmc, sdmmc, uart and related pinctrl nodes to ensure devices and pinctrl can be used in xPL and U-Boot pre-reloc.
Remove the explicit bootph-all prop from the pinctrl node, any bootph- prop will automatically be propagated to the pinctrl node.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- arch/arm/dts/rk3288-firefly-u-boot.dtsi | 55 ++++++++++++++++++++++--- configs/firefly-rk3288_defconfig | 2 +- 2 files changed, 51 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 8870188e6129..435a02acea5d 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -26,35 +26,75 @@ };
&emmc { - bootph-all; + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_bus8 { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_clk { + bootph-pre-ram; + bootph-some-ram; };
-&gpio3 { +&emmc_cmd { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_pwr { + bootph-pre-ram; + bootph-some-ram; +}; + +&gpio7 { + /delete-property/ bootph-all; +}; + +&pcfg_pull_none { bootph-all; };
-&pcfg_pull_up_drv_12ma { +&pcfg_pull_none_12ma { bootph-pre-ram; + bootph-some-ram; };
-&pinctrl { +&pcfg_pull_up { bootph-all; };
+&pcfg_pull_up_drv_12ma { + bootph-pre-ram; + bootph-some-ram; +}; + &sdmmc { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc_bus4 { bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc_cd { + bootph-pre-ram; + bootph-some-ram; };
&sdmmc_clk { bootph-pre-ram; + bootph-some-ram; };
&sdmmc_cmd { bootph-pre-ram; + bootph-some-ram; };
&sdmmc_pwr { @@ -64,3 +104,8 @@ &uart2 { bootph-all; }; + +&uart2_xfer { + bootph-pre-sram; + bootph-pre-ram; +}; diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 87ed0c0d2aea..862a17c84e07 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -38,7 +38,7 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y
On 2024/12/13 06:09, Jonas Karlman wrote:
Add bootph- props to emmc, sdmmc, uart and related pinctrl nodes to ensure devices and pinctrl can be used in xPL and U-Boot pre-reloc.
Remove the explicit bootph-all prop from the pinctrl node, any bootph- prop will automatically be propagated to the pinctrl node.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/rk3288-firefly-u-boot.dtsi | 55 ++++++++++++++++++++++--- configs/firefly-rk3288_defconfig | 2 +- 2 files changed, 51 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 8870188e6129..435a02acea5d 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -26,35 +26,75 @@ };
&emmc {
- bootph-all;
- bootph-pre-ram;
- bootph-some-ram;
+};
+&emmc_bus8 {
- bootph-pre-ram;
- bootph-some-ram;
+};
+&emmc_clk {
- bootph-pre-ram;
- bootph-some-ram; };
-&gpio3 { +&emmc_cmd {
- bootph-pre-ram;
- bootph-some-ram;
+};
+&emmc_pwr {
- bootph-pre-ram;
- bootph-some-ram;
+};
+&gpio7 {
- /delete-property/ bootph-all;
+};
+&pcfg_pull_none { bootph-all; };
-&pcfg_pull_up_drv_12ma { +&pcfg_pull_none_12ma { bootph-pre-ram;
- bootph-some-ram; };
-&pinctrl { +&pcfg_pull_up { bootph-all; };
+&pcfg_pull_up_drv_12ma {
- bootph-pre-ram;
- bootph-some-ram;
+};
- &sdmmc {
- bootph-all;
bootph-pre-ram;
bootph-some-ram; };
&sdmmc_bus4 { bootph-pre-ram;
bootph-some-ram;
+};
+&sdmmc_cd {
bootph-pre-ram;
bootph-some-ram; };
&sdmmc_clk { bootph-pre-ram;
bootph-some-ram; };
&sdmmc_cmd { bootph-pre-ram;
bootph-some-ram; };
&sdmmc_pwr {
@@ -64,3 +104,8 @@ &uart2 { bootph-all; };
+&uart2_xfer {
- bootph-pre-sram;
- bootph-pre-ram;
+}; diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 87ed0c0d2aea..862a17c84e07 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -38,7 +38,7 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y
Add bootph props and enable related Kconfig options to include the sdmmc regulator in SPL. Also enable SPL_DM_SEQ_ALIAS to ensure aliases is handled correctly in SPL.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- arch/arm/dts/rk3288-firefly-u-boot.dtsi | 5 +++++ configs/firefly-rk3288_defconfig | 4 +++- 2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 435a02acea5d..f953f6821326 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -52,6 +52,7 @@
&gpio7 { /delete-property/ bootph-all; + bootph-pre-ram; };
&pcfg_pull_none { @@ -109,3 +110,7 @@ bootph-pre-sram; bootph-pre-ram; }; + +&vcc_sd { + bootph-pre-ram; +}; diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 862a17c84e07..2160474fe0f3 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -4,6 +4,7 @@ CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 +CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" @@ -41,6 +42,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -62,10 +64,10 @@ CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y -# CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_ACT8846=y CONFIG_REGULATOR_ACT8846=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y
On 2024/12/13 06:09, Jonas Karlman wrote:
Add bootph props and enable related Kconfig options to include the sdmmc regulator in SPL. Also enable SPL_DM_SEQ_ALIAS to ensure aliases is handled correctly in SPL.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/rk3288-firefly-u-boot.dtsi | 5 +++++ configs/firefly-rk3288_defconfig | 4 +++- 2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 435a02acea5d..f953f6821326 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -52,6 +52,7 @@
&gpio7 { /delete-property/ bootph-all;
bootph-pre-ram; };
&pcfg_pull_none {
@@ -109,3 +110,7 @@ bootph-pre-sram; bootph-pre-ram; };
+&vcc_sd {
- bootph-pre-ram;
+}; diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 862a17c84e07..2160474fe0f3 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -4,6 +4,7 @@ CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 +CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" @@ -41,6 +42,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -62,10 +64,10 @@ CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y -# CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_ACT8846=y CONFIG_REGULATOR_ACT8846=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y
Current use of SILENT_CONSOLE hide valuable information when something goes wrong during boot, drop this Kconfig option to allow user to see e.g. from what media U-Boot proper is loaded from.
A second Model line is printed on console due to DISPLAY_BOARDINFO_LATE, drop this Kconfig option to remove the second redundant line.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- configs/firefly-rk3288_defconfig | 2 -- 1 file changed, 2 deletions(-)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 2160474fe0f3..6e395f5c450d 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -20,8 +20,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" -CONFIG_SILENT_CONSOLE=y -CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPIO=y
On 2024/12/13 06:09, Jonas Karlman wrote:
Current use of SILENT_CONSOLE hide valuable information when something goes wrong during boot, drop this Kconfig option to allow user to see e.g. from what media U-Boot proper is loaded from.
A second Model line is printed on console due to DISPLAY_BOARDINFO_LATE, drop this Kconfig option to remove the second redundant line.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/firefly-rk3288_defconfig | 2 -- 1 file changed, 2 deletions(-)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 2160474fe0f3..6e395f5c450d 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -20,8 +20,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" -CONFIG_SILENT_CONSOLE=y -CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPIO=y
After the migration to use standard boot, storage media devices should automatically be initialized in the order listed in boot_targets env.
Drop USE_PREBOOT to speed up boot when booting from SD-card or eMMC.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- configs/firefly-rk3288_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 6e395f5c450d..661ac065ce39 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -18,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000
On 2024/12/13 06:09, Jonas Karlman wrote:
After the migration to use standard boot, storage media devices should automatically be initialized in the order listed in boot_targets env.
Drop USE_PREBOOT to speed up boot when booting from SD-card or eMMC.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/firefly-rk3288_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 6e395f5c450d..661ac065ce39 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -18,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000
The device tree for Firefly-RK3288 in dts/upstream can be used as-is by U-Boot, migrate board to use OF_UPSTREAM.
Add chosen stdout-path prop to board u-boot.dtsi as it is missing in DT from dts/upstream. Also change to use the upstream power_led symbol.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- arch/arm/dts/Makefile | 1 - arch/arm/dts/rk3288-firefly-u-boot.dtsi | 10 +- arch/arm/dts/rk3288-firefly.dts | 43 -- arch/arm/dts/rk3288-firefly.dtsi | 491 ----------------------- board/firefly/firefly-rk3288/MAINTAINERS | 1 + configs/firefly-rk3288_defconfig | 6 +- 6 files changed, 11 insertions(+), 541 deletions(-) delete mode 100644 arch/arm/dts/rk3288-firefly.dts delete mode 100644 arch/arm/dts/rk3288-firefly.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7f945d90d753..aea9e6acbf33 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -69,7 +69,6 @@ dtb-$(CONFIG_ROCKCHIP_RK322X) += \
dtb-$(CONFIG_ROCKCHIP_RK3288) += \ rk3288-evb.dtb \ - rk3288-firefly.dtb \ rk3288-popmetal.dtb \ rk3288-rock2-square.dtb \ rk3288-rock-pi-n8.dtb \ diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index f953f6821326..13f5be27a969 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -6,10 +6,8 @@ #include "rk3288-u-boot.dtsi"
/ { - leds { - power { - default-state = "on"; - }; + chosen { + stdout-path = "serial2:115200n8"; }; };
@@ -73,6 +71,10 @@ bootph-some-ram; };
+&power_led { + default-state = "on"; +}; + &sdmmc { bootph-pre-ram; bootph-some-ram; diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts deleted file mode 100644 index 72982efdf6df..000000000000 --- a/arch/arm/dts/rk3288-firefly.dts +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * Copyright (c) 2014, 2015 FUKAUMI Naoki naobsd@gmail.com - */ - -/dts-v1/; -#include "rk3288-firefly.dtsi" - -/ { - model = "Firefly-RK3288"; - compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; - - chosen { - stdout-path = &uart2; - }; -}; - -&ir { - gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -}; - -&pinctrl { - act8846 { - pmic_vsel: pmic-vsel { - rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>; - }; - }; - - ir { - ir_int: ir-int { - rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - usb_host { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm1 { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi deleted file mode 100644 index 0824b19ee642..000000000000 --- a/arch/arm/dts/rk3288-firefly.dtsi +++ /dev/null @@ -1,491 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * Copyright (c) 2014, 2015 FUKAUMI Naoki naobsd@gmail.com - */ - -#include "rk3288.dtsi" - -/ { - memory { - reg = <0x0 0x0 0x0 0x80000000>; - }; - - ext_gmac: external-gmac-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - clock-output-names = "ext_gmac"; - }; - - ir: ir-receiver { - compatible = "gpio-ir-receiver"; - pinctrl-names = "default"; - pinctrl-0 = <&ir_int>; - }; - - keys: gpio-keys { - compatible = "gpio-keys"; - - button@0 { - gpio-key,wakeup = <1>; - gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; - linux,code = <116>; - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - }; - }; - - leds { - compatible = "gpio-leds"; - - work { - gpios = <&gpio8 1 GPIO_ACTIVE_LOW>; - label = "firefly:blue:user"; - linux,default-trigger = "rc-feedback"; - pinctrl-names = "default"; - pinctrl-0 = <&work_led>; - }; - - power { - gpios = <&gpio8 2 GPIO_ACTIVE_LOW>; - label = "firefly:green:power"; - linux,default-trigger = "default-on"; - pinctrl-names = "default"; - pinctrl-0 = <&power_led>; - }; - }; - - vcc_sys: vsys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_pwr>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc_flash: flash-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_flash"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_io>; - }; - - vcc_5v: usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vcc_host_5v: usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; - regulator-name = "vcc_host_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&vcc_5v>; - }; - - vcc_otg_5v: usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; - regulator-name = "vcc_otg_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&vcc_5v>; - }; -}; - -&cpu0 { - cpu0-supply = <&vdd_cpu>; -}; - -&emmc { - broken-cd; - bus-width = <8>; - cap-mmc-highspeed; - disable-wp; - non-removable; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc_flash>; - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_MAC>; - assigned-clock-parents = <&ext_gmac>; - clock_in_out = "input"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; - tx_delay = <0x30>; - rx_delay = <0x10>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c5>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - status = "okay"; - - vdd_cpu: syr827@40 { - compatible = "silergy,syr827"; - fcs,suspend-voltage-selector = <1>; - reg = <0x40>; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vdd_gpu: syr828@41 { - compatible = "silergy,syr828"; - fcs,suspend-voltage-selector = <1>; - reg = <0x41>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - hym8563: hym8563@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - interrupt-parent = <&gpio7>; - interrupts = <4 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&rtc_int>; - }; - - act8846: act8846@5a { - compatible = "active-semi,act8846"; - reg = <0x5a>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_vsel>, <&pwr_hold>; - system-power-controller; - - regulators { - vcc_ddr: REG1 { - regulator-name = "vcc_ddr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - vcc_io: REG2 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_log: REG3 { - regulator-name = "vdd_log"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - }; - - vcc_20: REG4 { - regulator-name = "vcc_20"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-always-on; - }; - - vccio_sd: REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd10_lcd: REG6 { - regulator-name = "vdd10_lcd"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vcca_18: REG7 { - regulator-name = "vcca_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vcca_33: REG8 { - regulator-name = "vcca_33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vcc_lan: REG9 { - regulator-name = "vcc_lan"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vdd_10: REG10 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vcc_18: REG11 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vcc18_lcd: REG12 { - regulator-name = "vcc18_lcd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - }; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; -}; - -&i2c5 { - status = "okay"; -}; - -&pinctrl { - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma { - bias-pull-up; - drive-strength = <12>; - }; - - act8846 { - pwr_hold: pwr-hold { - rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - gmac { - phy_int: phy-int { - rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_pmeb: phy-pmeb { - rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_rst: phy-rst { - rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - hym8563 { - rtc_int: rtc-int { - rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - keys { - pwr_key: pwr-key { - rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - power_led: power-led { - rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - work_led: work-led { - rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - /* - * Default drive strength isn't enough to achieve even - * high-speed mode on firefly board so bump up to 12ma. - */ - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>, - <6 RK_PC1 1 &pcfg_pull_up_drv_12ma>, - <6 RK_PC2 1 &pcfg_pull_up_drv_12ma>, - <6 RK_PC3 1 &pcfg_pull_up_drv_12ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>; - }; - - sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb_host { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - usbhub_rst: usbhub-rst { - rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - usb_otg { - otg_vbus_drv: otg-vbus-drv { - rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&vcc_18>; - status = "okay"; -}; - -&sdio0 { - broken-cd; - bus-width = <4>; - disable-wp; - non-removable; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>; - vmmc-supply = <&vcc_18>; - status = "disabled"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <200>; - disable-wp; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>; - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usb_host1 { - pinctrl-names = "default"; - pinctrl-0 = <&usbhub_rst>; - status = "okay"; -}; - -&usb_otg { - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/board/firefly/firefly-rk3288/MAINTAINERS b/board/firefly/firefly-rk3288/MAINTAINERS index 42db0bd5e1f4..174027e770bf 100644 --- a/board/firefly/firefly-rk3288/MAINTAINERS +++ b/board/firefly/firefly-rk3288/MAINTAINERS @@ -1,6 +1,7 @@ FIREFLY M: Simon Glass sjg@chromium.org S: Maintained +F: arch/arm/dts/rk3288-firefly-u-boot.dtsi F: board/firefly/firefly-rk3288 F: include/configs/firefly-rk3288.h F: configs/firefly-rk3288_defconfig diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 661ac065ce39..a79e217c7adf 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -7,7 +7,7 @@ CONFIG_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-firefly" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y @@ -18,7 +18,7 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-firefly.dtb" CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPIO=y @@ -36,6 +36,8 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
On 2024/12/13 06:09, Jonas Karlman wrote:
The device tree for Firefly-RK3288 in dts/upstream can be used as-is by U-Boot, migrate board to use OF_UPSTREAM.
Add chosen stdout-path prop to board u-boot.dtsi as it is missing in DT from dts/upstream. Also change to use the upstream power_led symbol.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/Makefile | 1 - arch/arm/dts/rk3288-firefly-u-boot.dtsi | 10 +- arch/arm/dts/rk3288-firefly.dts | 43 -- arch/arm/dts/rk3288-firefly.dtsi | 491 ----------------------- board/firefly/firefly-rk3288/MAINTAINERS | 1 + configs/firefly-rk3288_defconfig | 6 +- 6 files changed, 11 insertions(+), 541 deletions(-) delete mode 100644 arch/arm/dts/rk3288-firefly.dts delete mode 100644 arch/arm/dts/rk3288-firefly.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7f945d90d753..aea9e6acbf33 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -69,7 +69,6 @@ dtb-$(CONFIG_ROCKCHIP_RK322X) += \
dtb-$(CONFIG_ROCKCHIP_RK3288) += \ rk3288-evb.dtb \
- rk3288-firefly.dtb \ rk3288-popmetal.dtb \ rk3288-rock2-square.dtb \ rk3288-rock-pi-n8.dtb \
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index f953f6821326..13f5be27a969 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -6,10 +6,8 @@ #include "rk3288-u-boot.dtsi"
/ {
- leds {
power {default-state = "on";};
- chosen {
stdout-path = "serial2:115200n8";@@ -73,6 +71,10 @@ bootph-some-ram; };
+&power_led {
- default-state = "on";
+};
- &sdmmc { bootph-pre-ram; bootph-some-ram;
diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts deleted file mode 100644 index 72982efdf6df..000000000000 --- a/arch/arm/dts/rk3288-firefly.dts +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/*
- Copyright (c) 2014, 2015 FUKAUMI Naoki naobsd@gmail.com
- */
-/dts-v1/; -#include "rk3288-firefly.dtsi"
-/ {
- model = "Firefly-RK3288";
- compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
- chosen {
stdout-path = &uart2;- };
-};
-&ir {
- gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
-};
-&pinctrl {
- act8846 {
pmic_vsel: pmic-vsel {rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;};- };
- ir {
ir_int: ir-int {rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;};- };
- usb_host {
host_vbus_drv: host-vbus-drv {rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;};- };
-};
-&pwm1 {
- status = "okay";
-}; diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi deleted file mode 100644 index 0824b19ee642..000000000000 --- a/arch/arm/dts/rk3288-firefly.dtsi +++ /dev/null @@ -1,491 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/*
- Copyright (c) 2014, 2015 FUKAUMI Naoki naobsd@gmail.com
- */
-#include "rk3288.dtsi"
-/ {
- memory {
reg = <0x0 0x0 0x0 0x80000000>;- };
- ext_gmac: external-gmac-clock {
compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <125000000>;clock-output-names = "ext_gmac";- };
- ir: ir-receiver {
compatible = "gpio-ir-receiver";pinctrl-names = "default";pinctrl-0 = <&ir_int>;- };
- keys: gpio-keys {
compatible = "gpio-keys";button@0 {gpio-key,wakeup = <1>;gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;label = "GPIO Power";linux,code = <116>;pinctrl-names = "default";pinctrl-0 = <&pwr_key>;};- };
- leds {
compatible = "gpio-leds";work {gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;label = "firefly:blue:user";linux,default-trigger = "rc-feedback";pinctrl-names = "default";pinctrl-0 = <&work_led>;};power {gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;label = "firefly:green:power";linux,default-trigger = "default-on";pinctrl-names = "default";pinctrl-0 = <&power_led>;};- };
- vcc_sys: vsys-regulator {
compatible = "regulator-fixed";regulator-name = "vcc_sys";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;regulator-always-on;regulator-boot-on;- };
- vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;pinctrl-names = "default";pinctrl-0 = <&sdmmc_pwr>;regulator-name = "vcc_sd";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;startup-delay-us = <100000>;vin-supply = <&vcc_io>;- };
- vcc_flash: flash-regulator {
compatible = "regulator-fixed";regulator-name = "vcc_flash";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;vin-supply = <&vcc_io>;- };
- vcc_5v: usb-regulator {
compatible = "regulator-fixed";regulator-name = "vcc_5v";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;regulator-always-on;regulator-boot-on;vin-supply = <&vcc_sys>;- };
- vcc_host_5v: usb-host-regulator {
compatible = "regulator-fixed";enable-active-high;gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;pinctrl-names = "default";pinctrl-0 = <&host_vbus_drv>;regulator-name = "vcc_host_5v";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;regulator-always-on;vin-supply = <&vcc_5v>;- };
- vcc_otg_5v: usb-otg-regulator {
compatible = "regulator-fixed";enable-active-high;gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;pinctrl-names = "default";pinctrl-0 = <&otg_vbus_drv>;regulator-name = "vcc_otg_5v";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;regulator-always-on;vin-supply = <&vcc_5v>;- };
-};
-&cpu0 {
- cpu0-supply = <&vdd_cpu>;
-};
-&emmc {
- broken-cd;
- bus-width = <8>;
- cap-mmc-highspeed;
- disable-wp;
- non-removable;
- num-slots = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
- vmmc-supply = <&vcc_io>;
- vqmmc-supply = <&vcc_flash>;
- status = "okay";
-};
-&gmac {
- assigned-clocks = <&cru SCLK_MAC>;
- assigned-clock-parents = <&ext_gmac>;
- clock_in_out = "input";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
- phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 1000000>;
- snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
- tx_delay = <0x30>;
- rx_delay = <0x10>;
- status = "okay";
-};
-&hdmi {
- ddc-i2c-bus = <&i2c5>;
- status = "okay";
-};
-&i2c0 {
- clock-frequency = <400000>;
- status = "okay";
- vdd_cpu: syr827@40 {
compatible = "silergy,syr827";fcs,suspend-voltage-selector = <1>;reg = <0x40>;regulator-name = "vdd_cpu";regulator-min-microvolt = <850000>;regulator-max-microvolt = <1350000>;regulator-always-on;regulator-boot-on;vin-supply = <&vcc_sys>;- };
- vdd_gpu: syr828@41 {
compatible = "silergy,syr828";fcs,suspend-voltage-selector = <1>;reg = <0x41>;regulator-name = "vdd_gpu";regulator-min-microvolt = <850000>;regulator-max-microvolt = <1350000>;regulator-always-on;vin-supply = <&vcc_sys>;- };
- hym8563: hym8563@51 {
compatible = "haoyu,hym8563";reg = <0x51>;#clock-cells = <0>;clock-frequency = <32768>;clock-output-names = "xin32k";interrupt-parent = <&gpio7>;interrupts = <4 IRQ_TYPE_EDGE_FALLING>;pinctrl-names = "default";pinctrl-0 = <&rtc_int>;- };
- act8846: act8846@5a {
compatible = "active-semi,act8846";reg = <0x5a>;pinctrl-names = "default";pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;system-power-controller;regulators {vcc_ddr: REG1 {regulator-name = "vcc_ddr";regulator-min-microvolt = <1200000>;regulator-max-microvolt = <1200000>;regulator-always-on;};vcc_io: REG2 {regulator-name = "vcc_io";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;regulator-always-on;};vdd_log: REG3 {regulator-name = "vdd_log";regulator-min-microvolt = <1100000>;regulator-max-microvolt = <1100000>;regulator-always-on;};vcc_20: REG4 {regulator-name = "vcc_20";regulator-min-microvolt = <2000000>;regulator-max-microvolt = <2000000>;regulator-always-on;};vccio_sd: REG5 {regulator-name = "vccio_sd";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;regulator-always-on;};vdd10_lcd: REG6 {regulator-name = "vdd10_lcd";regulator-min-microvolt = <1000000>;regulator-max-microvolt = <1000000>;regulator-always-on;};vcca_18: REG7 {regulator-name = "vcca_18";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;};vcca_33: REG8 {regulator-name = "vcca_33";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;};vcc_lan: REG9 {regulator-name = "vcc_lan";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;};vdd_10: REG10 {regulator-name = "vdd_10";regulator-min-microvolt = <1000000>;regulator-max-microvolt = <1000000>;regulator-always-on;};vcc_18: REG11 {regulator-name = "vcc_18";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;regulator-always-on;};vcc18_lcd: REG12 {regulator-name = "vcc18_lcd";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;regulator-always-on;};};- };
-};
-&i2c1 {
- status = "okay";
-};
-&i2c2 {
- status = "okay";
-};
-&i2c4 {
- status = "okay";
-};
-&i2c5 {
- status = "okay";
-};
-&pinctrl {
- pcfg_output_high: pcfg-output-high {
output-high;- };
- pcfg_output_low: pcfg-output-low {
output-low;- };
- pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
bias-pull-up;drive-strength = <12>;- };
- act8846 {
pwr_hold: pwr-hold {rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;};- };
- gmac {
phy_int: phy-int {rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;};phy_pmeb: phy-pmeb {rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;};phy_rst: phy-rst {rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;};- };
- hym8563 {
rtc_int: rtc-int {rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;};- };
- keys {
pwr_key: pwr-key {rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;};- };
- leds {
power_led: power-led {rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;};work_led: work-led {rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;};- };
- sdmmc {
/** Default drive strength isn't enough to achieve even* high-speed mode on firefly board so bump up to 12ma.*/sdmmc_bus4: sdmmc-bus4 {rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;};sdmmc_clk: sdmmc-clk {rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;};sdmmc_cmd: sdmmc-cmd {rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;};sdmmc_pwr: sdmmc-pwr {rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;};- };
- usb_host {
host_vbus_drv: host-vbus-drv {rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;};usbhub_rst: usbhub-rst {rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;};- };
- usb_otg {
otg_vbus_drv: otg-vbus-drv {rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;};- };
-};
-&saradc {
- vref-supply = <&vcc_18>;
- status = "okay";
-};
-&sdio0 {
- broken-cd;
- bus-width = <4>;
- disable-wp;
- non-removable;
- num-slots = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
- vmmc-supply = <&vcc_18>;
- status = "disabled";
-};
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- card-detect-delay = <200>;
- disable-wp;
- num-slots = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
- vmmc-supply = <&vcc_sd>;
- status = "okay";
-};
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
- status = "okay";
-};
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
- status = "okay";
-};
-&uart1 {
- status = "okay";
-};
-&uart2 {
- status = "okay";
-};
-&uart3 {
- status = "okay";
-};
-&usb_host1 {
- pinctrl-names = "default";
- pinctrl-0 = <&usbhub_rst>;
- status = "okay";
-};
-&usb_otg {
- status = "okay";
-};
-&vopb {
- status = "okay";
-};
-&vopb_mmu {
- status = "okay";
-};
-&vopl {
- status = "okay";
-};
-&vopl_mmu {
- status = "okay";
-};
-&wdt {
- status = "okay";
-}; diff --git a/board/firefly/firefly-rk3288/MAINTAINERS b/board/firefly/firefly-rk3288/MAINTAINERS index 42db0bd5e1f4..174027e770bf 100644 --- a/board/firefly/firefly-rk3288/MAINTAINERS +++ b/board/firefly/firefly-rk3288/MAINTAINERS @@ -1,6 +1,7 @@ FIREFLY M: Simon Glass sjg@chromium.org S: Maintained +F: arch/arm/dts/rk3288-firefly-u-boot.dtsi F: board/firefly/firefly-rk3288 F: include/configs/firefly-rk3288.h F: configs/firefly-rk3288_defconfig diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 661ac065ce39..a79e217c7adf 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -7,7 +7,7 @@ CONFIG_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-firefly" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y @@ -18,7 +18,7 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-firefly.dtb" CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPIO=y @@ -36,6 +36,8 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
For some reason the Ethernet PHY reset delay is set to 1 second, this cause an unneccecery long boot delay.
Firefly-RK3288 use RTL8211 Ethernet PHY, datasheet list an initial 10ms delay and then a 30-76ms delay before accessing registers.
Change to use 80ms delay instead of a full second to speed up Ethernet initializion in U-Boot.
Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY support in U-Boot.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- arch/arm/dts/rk3288-firefly-u-boot.dtsi | 4 ++++ configs/firefly-rk3288_defconfig | 3 +++ 2 files changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 13f5be27a969..b7d13bcb860d 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -48,6 +48,10 @@ bootph-some-ram; };
+&gmac { + snps,reset-delays-us = <0 10000 80000>; +}; + &gpio7 { /delete-property/ bootph-all; bootph-pre-ram; diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index a79e217c7adf..95fb20b8b24c 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -58,6 +58,9 @@ CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y
On 2024/12/13 06:09, Jonas Karlman wrote:
For some reason the Ethernet PHY reset delay is set to 1 second, this cause an unneccecery long boot delay.
Firefly-RK3288 use RTL8211 Ethernet PHY, datasheet list an initial 10ms delay and then a 30-76ms delay before accessing registers.
Change to use 80ms delay instead of a full second to speed up Ethernet initializion in U-Boot.
Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY support in U-Boot.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/rk3288-firefly-u-boot.dtsi | 4 ++++ configs/firefly-rk3288_defconfig | 3 +++ 2 files changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 13f5be27a969..b7d13bcb860d 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -48,6 +48,10 @@ bootph-some-ram; };
+&gmac {
- snps,reset-delays-us = <0 10000 80000>;
+};
- &gpio7 { /delete-property/ bootph-all; bootph-pre-ram;
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index a79e217c7adf..95fb20b8b24c 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -58,6 +58,9 @@ CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y
Change to use FIT and FIT_SIGNATURE when loading U-Boot proper in SPL to allow checksum validation and fallback loading of FIT from a different mmc device.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- configs/firefly-rk3288_defconfig | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 95fb20b8b24c..d8a671b7a8a4 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -18,9 +18,15 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-firefly.dtb" CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -92,4 +98,5 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_CMD_DHRYSTONE=y +CONFIG_SPL_CRC32=y CONFIG_ERRNO_STR=y
On 2024/12/13 06:09, Jonas Karlman wrote:
Change to use FIT and FIT_SIGNATURE when loading U-Boot proper in SPL to allow checksum validation and fallback loading of FIT from a different mmc device.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/firefly-rk3288_defconfig | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 95fb20b8b24c..d8a671b7a8a4 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -18,9 +18,15 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-firefly.dtb" CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -92,4 +98,5 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_CMD_DHRYSTONE=y +CONFIG_SPL_CRC32=y CONFIG_ERRNO_STR=y
participants (2)
-
Jonas Karlman -
Kever Yang