On 10/12/23 10:22, Michal Simek wrote:

fclk will never go upstream that's why removing this node from DT. All PL (programmable logic) based IPs should handle clocks self without using this workaround.

Signed-off-by: Michal Simek michal.simek@amd.com

arch/arm/dts/zynqmp-clk-ccf.dtsi | 6 ------ 1 file changed, 6 deletions(-)

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 5f1b0b23c124..dd4569e7bd95 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -10,12 +10,6 @@

#include <dt-bindings/clock/xlnx-zynqmp-clk.h> / {

• fclk0: fclk0 {

• status = "okay";
  

• compatible = "xlnx,fclk";
  

• clocks = <&zynqmp_clk PL0_REF>;
  

• };
• pss_ref_clk: pss_ref_clk { bootph-all; compatible = "fixed-clock";

Applied. M