[PATCH] ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2
Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@st.com Cc: Patrice Chotard patrice.chotard@st.com --- V2: Configure FMC2 nCS4 for SRAM as well --- arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++ board/dhelectronics/dh_stm32mp1/board.c | 27 +++++++++ configs/stm32mp15_dhcom_basic_defconfig | 1 + 3 files changed, 96 insertions(+)
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 6c952a57ee..eba3588540 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -37,6 +37,12 @@ default-state = "on"; }; }; + + /* This is actually on FMC2, but we do not have bus driver for that */ + ksz8851: ks8851mll@64000000 { + compatible = "micrel,ks8851-mll"; + reg = <0x64000000 0x20000>; + }; };
&i2c4 { @@ -50,6 +56,68 @@ }; };
+&pinctrl { + /* These should bound to FMC2 bus driver, but we do not have one */ + pinctrl-0 = <&fmc_pins_b>; + pinctrl-1 = <&fmc_sleep_pins_b>; + pinctrl-names = "default", "sleep"; + + fmc_pins_b: fmc-0 { + pins1 { + pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ + <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ + <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */ + <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ + <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ + <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ + <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ + <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ + <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ + <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ + <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ + <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */ + <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */ + <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */ + <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */ + <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */ + <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */ + <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */ + <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */ + <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */ + <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + }; + + fmc_sleep_pins_b: fmc-sleep-0 { + pins { + pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */ + <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */ + <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */ + <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */ + <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */ + <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */ + <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */ + <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */ + <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */ + <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */ + <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */ + <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */ + <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */ + <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */ + <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */ + <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */ + <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */ + <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */ + <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */ + <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */ + <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */ + }; + }; +}; + &pmic { u-boot,dm-pre-reloc; }; diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..26cdc15ded 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,31 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{ + /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */ +#define FMC2_BASE 0x58002000 +#define FMC2_BCR1 0x0 +#define FMC2_BTR1 0x4 +#define FMC2_BWTR1 0x104 +#define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1) +#define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1) +#define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1) + + + writel(BIT(12), 0x50000218); /* AHB6RSTCLRR */ + writel(BIT(12), 0x5000019c); /* AHB6ENSETR */ + + /* KS8851-16MLL */ + writel(0x000010db, FMC2_BASE + FMC2_BCR(1)); + writel(0xc0022222, FMC2_BASE + FMC2_BTR(1)); + /* AS7C34098 SRAM on X11 */ + writel(0x000010db, FMC2_BASE + FMC2_BCR(3)); + writel(0xc0022222, FMC2_BASE + FMC2_BTR(3)); + + setbits_le32(FMC2_BASE + FMC2_BCR1, BIT(31)); +} + /* board dependent setup after realloc */ int board_init(void) { @@ -399,6 +424,8 @@ int board_init(void)
sysconf_init();
+ board_init_fmc2(); + if (CONFIG_IS_ENABLED(CONFIG_LED)) led_default_state();
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 921dea242a..683f15e7d5 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y
Hi Marek
+Christophe
As you may know, the FMC2 driver has been submitted on kernel side.
Internally, Christophe is working on the backport of this FMC2 driver on U-boot side, but a lot of
things are conditioned by kernel reviews (more precisely DT bindings).
Thanks
Patrice
On 3/26/20 12:04 AM, Marek Vasut wrote:
Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@st.com Cc: Patrice Chotard patrice.chotard@st.com
V2: Configure FMC2 nCS4 for SRAM as well
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++ board/dhelectronics/dh_stm32mp1/board.c | 27 +++++++++ configs/stm32mp15_dhcom_basic_defconfig | 1 + 3 files changed, 96 insertions(+)
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 6c952a57ee..eba3588540 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -37,6 +37,12 @@ default-state = "on"; }; };
- /* This is actually on FMC2, but we do not have bus driver for that */
- ksz8851: ks8851mll@64000000 {
compatible = "micrel,ks8851-mll";reg = <0x64000000 0x20000>;- };
};
&i2c4 { @@ -50,6 +56,68 @@ }; };
+&pinctrl {
- /* These should bound to FMC2 bus driver, but we do not have one */
- pinctrl-0 = <&fmc_pins_b>;
- pinctrl-1 = <&fmc_sleep_pins_b>;
- pinctrl-names = "default", "sleep";
- fmc_pins_b: fmc-0 {
pins1 {pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */<STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */<STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */<STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */<STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */<STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */<STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */<STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */<STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */<STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */<STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */<STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */bias-disable;drive-push-pull;slew-rate = <3>;};- };
- fmc_sleep_pins_b: fmc-sleep-0 {
pins {pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */<STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */<STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */<STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */<STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */<STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */<STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */<STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */<STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */<STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */<STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */};- };
+};
&pmic { u-boot,dm-pre-reloc; }; diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..26cdc15ded 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,31 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{
- /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
+#define FMC2_BASE 0x58002000 +#define FMC2_BCR1 0x0 +#define FMC2_BTR1 0x4 +#define FMC2_BWTR1 0x104 +#define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1) +#define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1) +#define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1)
- writel(BIT(12), 0x50000218); /* AHB6RSTCLRR */
- writel(BIT(12), 0x5000019c); /* AHB6ENSETR */
- /* KS8851-16MLL */
- writel(0x000010db, FMC2_BASE + FMC2_BCR(1));
- writel(0xc0022222, FMC2_BASE + FMC2_BTR(1));
- /* AS7C34098 SRAM on X11 */
- writel(0x000010db, FMC2_BASE + FMC2_BCR(3));
- writel(0xc0022222, FMC2_BASE + FMC2_BTR(3));
- setbits_le32(FMC2_BASE + FMC2_BCR1, BIT(31));
+}
/* board dependent setup after realloc */ int board_init(void) { @@ -399,6 +424,8 @@ int board_init(void)
sysconf_init();
- board_init_fmc2();
- if (CONFIG_IS_ENABLED(CONFIG_LED)) led_default_state();
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 921dea242a..683f15e7d5 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y
On 3/26/20 10:24 AM, Patrice CHOTARD wrote:
Hi Marek
Hi,
please stop top-posting.
+Christophe
As you may know, the FMC2 driver has been submitted on kernel side.
Internally, Christophe is working on the backport of this FMC2 driver on U-boot side, but a lot of
things are conditioned by kernel reviews (more precisely DT bindings).
Right, this could be converted over once that driver is in.
Thanks
Patrice
On 3/26/20 12:04 AM, Marek Vasut wrote:
Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@st.com Cc: Patrice Chotard patrice.chotard@st.com
V2: Configure FMC2 nCS4 for SRAM as well
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++ board/dhelectronics/dh_stm32mp1/board.c | 27 +++++++++ configs/stm32mp15_dhcom_basic_defconfig | 1 + 3 files changed, 96 insertions(+)
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 6c952a57ee..eba3588540 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -37,6 +37,12 @@ default-state = "on"; }; };
- /* This is actually on FMC2, but we do not have bus driver for that */
- ksz8851: ks8851mll@64000000 {
compatible = "micrel,ks8851-mll";reg = <0x64000000 0x20000>;- };
};
&i2c4 { @@ -50,6 +56,68 @@ }; };
+&pinctrl {
- /* These should bound to FMC2 bus driver, but we do not have one */
- pinctrl-0 = <&fmc_pins_b>;
- pinctrl-1 = <&fmc_sleep_pins_b>;
- pinctrl-names = "default", "sleep";
- fmc_pins_b: fmc-0 {
pins1 {pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */<STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */<STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */<STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */<STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */<STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */<STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */<STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */<STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */<STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */<STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */<STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */bias-disable;drive-push-pull;slew-rate = <3>;};- };
- fmc_sleep_pins_b: fmc-sleep-0 {
pins {pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */<STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */<STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */<STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */<STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */<STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */<STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */<STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */<STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */<STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */<STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */};- };
+};
&pmic { u-boot,dm-pre-reloc; }; diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index b663696983..26cdc15ded 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -376,6 +376,31 @@ static void sysconf_init(void) #endif }
+static void board_init_fmc2(void) +{
- /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
+#define FMC2_BASE 0x58002000 +#define FMC2_BCR1 0x0 +#define FMC2_BTR1 0x4 +#define FMC2_BWTR1 0x104 +#define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1) +#define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1) +#define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1)
- writel(BIT(12), 0x50000218); /* AHB6RSTCLRR */
- writel(BIT(12), 0x5000019c); /* AHB6ENSETR */
- /* KS8851-16MLL */
- writel(0x000010db, FMC2_BASE + FMC2_BCR(1));
- writel(0xc0022222, FMC2_BASE + FMC2_BTR(1));
- /* AS7C34098 SRAM on X11 */
- writel(0x000010db, FMC2_BASE + FMC2_BCR(3));
- writel(0xc0022222, FMC2_BASE + FMC2_BTR(3));
- setbits_le32(FMC2_BASE + FMC2_BCR1, BIT(31));
+}
/* board dependent setup after realloc */ int board_init(void) { @@ -399,6 +424,8 @@ int board_init(void)
sysconf_init();
- board_init_fmc2();
- if (CONFIG_IS_ENABLED(CONFIG_LED)) led_default_state();
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 921dea242a..683f15e7d5 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y
participants (2)
-
Marek Vasut -
Patrice CHOTARD