[U-Boot] [PATCH] Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects
Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver.
Signed-off-by: Nick Thompson nick.thompson@gefanuc.com --- This config item is already used on many other platforms so is not a new config item as such.
This change should not result in any functional changes to current davinci boards. They all seem to use CS2 as this was the only chip select supported by the driver. da830evm however uses CS3, so a configurable driver is required.
Applies to: u-boot-ti
drivers/mtd/nand/davinci_nand.c | 16 ++++++++++------ include/asm-arm/arch-davinci/emif_defs.h | 9 +++++++++ include/configs/davinci_dm355evm.h | 1 + include/configs/davinci_dm355leopard.h | 1 + include/configs/davinci_dm365evm.h | 1 + include/configs/davinci_dm6467evm.h | 1 + include/configs/davinci_dvevm.h | 1 + include/configs/davinci_schmoogie.h | 1 + include/configs/davinci_sffsdr.h | 1 + include/configs/davinci_sonata.h | 1 + 10 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index eabaf3e..1900a1a 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -82,12 +82,13 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) { - int dummy; + u_int32_t val;
- dummy = emif_regs->NANDF1ECC; + val = readl(&emif_regs->NANDF1ECC);
- /* FIXME: only chipselect 0 is supported for now */ - emif_regs->NANDFCR |= 1 << 8; + val = readl(&emif_regs->NANDFCR); + val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS); + writel(val, &emif_regs->NANDFCR); }
static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region) @@ -214,8 +215,11 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode) * Start a new ECC calculation for reading or writing 512 bytes * of data. */ - val = (emif_regs->NANDFCR & ~(3 << 4)) | (1 << 12); - emif_regs->NANDFCR = val; + val = readl(&emif_regs->NANDFCR); + val &= ~DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK; + val |= DAVINCI_NANDFCR_4BIT_ECC_SEL(CONFIG_SYS_NAND_CS); + val |= DAVINCI_NANDFCR_4BIT_ECC_START; + writel(val, &emif_regs->NANDFCR); break; case NAND_ECC_READSYN: val = emif_regs->NAND4BITECC1; diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h index c91e30c..5a36ece 100644 --- a/include/asm-arm/arch-davinci/emif_defs.h +++ b/include/asm-arm/arch-davinci/emif_defs.h @@ -68,4 +68,13 @@ typedef struct { } emif_registers;
typedef emif_registers *emifregs; + +#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4) +#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4) + +#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2))) + +#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12) +#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13) + #endif diff --git a/include/configs/davinci_dm355evm.h b/include/configs/davinci_dm355evm.h index ea40df0..07914a3 100644 --- a/include/configs/davinci_dm355evm.h +++ b/include/configs/davinci_dm355evm.h @@ -66,6 +66,7 @@
/* NAND: socketed, two chipselects, normally 2 GBytes */ #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K diff --git a/include/configs/davinci_dm355leopard.h b/include/configs/davinci_dm355leopard.h index 5db720e..54b153d 100644 --- a/include/configs/davinci_dm355leopard.h +++ b/include/configs/davinci_dm355leopard.h @@ -65,6 +65,7 @@
/* NAND */ #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_HW_ECC
diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index 53a105b..5a510e6 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -74,6 +74,7 @@
/* NAND: socketed, two chipselects, normally 2 GBytes */ #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index 6617941..dce0411 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -75,6 +75,7 @@ #define CONFIG_SYS_NO_FLASH #ifdef CONFIG_SYS_USE_NAND #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_IS_IN_NAND #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index b045e80..ff2c845 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -114,6 +114,7 @@ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 9384cdd..299ec25 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -83,6 +83,7 @@ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 71d48fb..6c1d303 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -78,6 +78,7 @@ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 9138b2b..203bd18 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -114,6 +114,7 @@ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
Hi Nick,
-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Nick Thompson Sent: Monday, November 16, 2009 12:50 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH] Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects
Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver.
Signed-off-by: Nick Thompson nick.thompson@gefanuc.com
This config item is already used on many other platforms so is not a new config item as such.
This change should not result in any functional changes to current davinci boards. They all seem to use CS2 as this was the only chip select supported by the driver. da830evm however uses CS3, so a configurable driver is required.
My testing branch has all the NAND updates. I'll add this and test it out. I don't expect to see any issues though.
Applies to: u-boot-ti
drivers/mtd/nand/davinci_nand.c | 16 ++++++++++------ include/asm-arm/arch-davinci/emif_defs.h | 9 +++++++++ include/configs/davinci_dm355evm.h | 1 + include/configs/davinci_dm355leopard.h | 1 + include/configs/davinci_dm365evm.h | 1 + include/configs/davinci_dm6467evm.h | 1 + include/configs/davinci_dvevm.h | 1 + include/configs/davinci_schmoogie.h | 1 + include/configs/davinci_sffsdr.h | 1 + include/configs/davinci_sonata.h | 1 + 10 files changed, 27 insertions(+), 6 deletions(-)
OK but I don't see a change to the DA830 config which was the reason for the patch in the first place.
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index eabaf3e..1900a1a 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -82,12 +82,13 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) {
- int dummy;
- u_int32_t val;
- dummy = emif_regs->NANDF1ECC;
- val = readl(&emif_regs->NANDF1ECC);
- /* FIXME: only chipselect 0 is supported for now */
- emif_regs->NANDFCR |= 1 << 8;
- val = readl(&emif_regs->NANDFCR);
- val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
- writel(val, &emif_regs->NANDFCR);
}
static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region) @@ -214,8 +215,11 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode) * Start a new ECC calculation for reading or writing 512 bytes * of data. */
val = (emif_regs->NANDFCR & ~(3 << 4)) | (1 << 12);emif_regs->NANDFCR = val;
val = readl(&emif_regs->NANDFCR);val &= ~DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK;val |= DAVINCI_NANDFCR_4BIT_ECC_SEL(CONFIG_SYS_NAND_CS);val |= DAVINCI_NANDFCR_4BIT_ECC_START;writel(val, &emif_regs->NANDFCR);diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm- arm/arch-davinci/emif_defs.h index c91e30c..5a36ece 100644 --- a/include/asm-arm/arch-davinci/emif_defs.h +++ b/include/asm-arm/arch-davinci/emif_defs.h @@ -68,4 +68,13 @@ typedef struct { } emif_registers;
typedef emif_registers *emifregs;
+#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4) +#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
+#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2)))
+#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12) +#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
#endif diff --git a/include/configs/davinci_dm355evm.h b/include/configs/davinci_dm355evm.h index ea40df0..07914a3 100644 --- a/include/configs/davinci_dm355evm.h +++ b/include/configs/davinci_dm355evm.h @@ -66,6 +66,7 @@
/* NAND: socketed, two chipselects, normally 2 GBytes */ #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K diff --git a/include/configs/davinci_dm355leopard.h b/include/configs/davinci_dm355leopard.h index 5db720e..54b153d 100644 --- a/include/configs/davinci_dm355leopard.h +++ b/include/configs/davinci_dm355leopard.h @@ -65,6 +65,7 @@
/* NAND */ #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_HW_ECC
diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index 53a105b..5a510e6 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -74,6 +74,7 @@
/* NAND: socketed, two chipselects, normally 2 GBytes */ #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index 6617941..dce0411 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -75,6 +75,7 @@ #define CONFIG_SYS_NO_FLASH #ifdef CONFIG_SYS_USE_NAND #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_IS_IN_NAND #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index b045e80..ff2c845 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -114,6 +114,7 @@ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 9384cdd..299ec25 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -83,6 +83,7 @@ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 71d48fb..6c1d303 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -78,6 +78,7 @@ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 9138b2b..203bd18 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -114,6 +114,7 @@ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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On 16/11/09 18:02, Paulraj, Sandeep wrote:
Hi Nick,
-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Nick Thompson Sent: Monday, November 16, 2009 12:50 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH] Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects
Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver.
Signed-off-by: Nick Thompson nick.thompson@gefanuc.com
This config item is already used on many other platforms so is not a new config item as such.
This change should not result in any functional changes to current davinci boards. They all seem to use CS2 as this was the only chip select supported by the driver. da830evm however uses CS3, so a configurable driver is required.
My testing branch has all the NAND updates. I'll add this and test it out. I don't expect to see any issues though.
That's great, thank you.
Applies to: u-boot-ti
drivers/mtd/nand/davinci_nand.c | 16 ++++++++++------ include/asm-arm/arch-davinci/emif_defs.h | 9 +++++++++ include/configs/davinci_dm355evm.h | 1 + include/configs/davinci_dm355leopard.h | 1 + include/configs/davinci_dm365evm.h | 1 + include/configs/davinci_dm6467evm.h | 1 + include/configs/davinci_dvevm.h | 1 + include/configs/davinci_schmoogie.h | 1 + include/configs/davinci_sffsdr.h | 1 + include/configs/davinci_sonata.h | 1 + 10 files changed, 27 insertions(+), 6 deletions(-)
OK but I don't see a change to the DA830 config which was the reason for the patch in the first place.
This config entry is already in da830evm. It was inherited from the 1.3.3 port of U-Boot to da830.
There will in any case, be a separate patch for NAND on da830, since there are several defines that need to be added for the current code base.
Thanks, Nick.
On Mon, Nov 16, 2009 at 05:49:55PM +0000, Nick Thompson wrote:
static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) {
- int dummy;
- u_int32_t val;
- dummy = emif_regs->NANDF1ECC;
- val = readl(&emif_regs->NANDF1ECC);
"val =" can be omitted, which would keep it clear that it is a dummy read.
- /* FIXME: only chipselect 0 is supported for now */
- emif_regs->NANDFCR |= 1 << 8;
- val = readl(&emif_regs->NANDFCR);
- val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
- writel(val, &emif_regs->NANDFCR);
Do you need to clear the bit corresponding to the previous chipselect?
Otherwise, ACK.
-Scott
On Mon, Nov 16, 2009 at 05:49:55PM +0000, Nick Thompson wrote:
static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) {
- int dummy;
- u_int32_t val;
- dummy = emif_regs->NANDF1ECC;
- val = readl(&emif_regs->NANDF1ECC);
"val =" can be omitted, which would keep it clear that it is a dummy read.
- /* FIXME: only chipselect 0 is supported for now */
- emif_regs->NANDFCR |= 1 << 8;
- val = readl(&emif_regs->NANDFCR);
- val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
- writel(val, &emif_regs->NANDFCR);
Do you need to clear the bit corresponding to the previous chipselect?
Otherwise, ACK.
-Scott
Scott,
Can you give me some time to test it out on my DaVinci SOC's. I want to test it with all the other updates that I have just pulled in from Wolfgang's next
Thanks, Sandeep
Dear Scott Wood,
In message 20091118202216.GA15517@loki.buserror.net you wrote:
On Mon, Nov 16, 2009 at 05:49:55PM +0000, Nick Thompson wrote:
static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) {
- int dummy;
- u_int32_t val;
- dummy = emif_regs->NANDF1ECC;
- val = readl(&emif_regs->NANDF1ECC);
"val =" can be omitted, which would keep it clear that it is a dummy read.
For a little more emphasis one can even write
(void)readl(&emif_regs->NANDF1ECC);
which really makes it clear that the return value is ignored intentionally.
Best regards,
Wolfgang Denk
On 18/11/09 20:22, Scott Wood wrote:
On Mon, Nov 16, 2009 at 05:49:55PM +0000, Nick Thompson wrote:
static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) {
- int dummy;
- u_int32_t val;
- dummy = emif_regs->NANDF1ECC;
- val = readl(&emif_regs->NANDF1ECC);
"val =" can be omitted, which would keep it clear that it is a dummy read.
Sounds good - I'll follow Wolfgang's idea and add a (void) as well.
- /* FIXME: only chipselect 0 is supported for now */
- emif_regs->NANDFCR |= 1 << 8;
- val = readl(&emif_regs->NANDFCR);
- val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
- writel(val, &emif_regs->NANDFCR);
Do you need to clear the bit corresponding to the previous chipselect?
No, the bits clear themselves when the ECC result is read. The device is actually capable of running multiple ECC1's at the same time. It can't do multiple ECC4's, but the select for that is coded to make this clear.
Otherwise, ACK.
I'm going to resubmit as your first comment revealed a latent bug. That dummy read is what ensures the ECC start bit is clear, but It only clear the CS2 ECC, rather than the config selected ECC.
Thanks, Nick.
participants (4)
-
Nick Thompson -
Paulraj, Sandeep -
Scott Wood -
Wolfgang Denk