[U-Boot] [PATCH 0/4] ARM: OMAP4+: Miscellaneous fixes

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R Sricharan

17 May 2012 17 May '12

12:12 p.m.

This series has been tested on OMAP4430 sdp OMAP4 panda OMAP5 evm

MAKEALL has been tested for all armv7 boards to ensure no build breakage.

R Sricharan (4): ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections. ARM: OMAP5: dmm: Create a tiler trap section. ARM: OMAP5: Align memory used for testing to the power of 2 ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.

arch/arm/cpu/armv7/omap-common/emif-common.c | 3 +++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 20 ++++++++++++++++++-- arch/arm/cpu/armv7/omap5/sdram.c | 6 +++--- arch/arm/include/asm/arch-omap5/omap.h | 2 +- 4 files changed, 25 insertions(+), 6 deletions(-)

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R Sricharan

17 May 17 May

12:12 p.m.

New subject: [U-Boot] [PATCH 1/4] ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections.

The DMM sections can be overlapping with each other, with sections 3 to 0 having the highest to lowest priority in that order. There could also be a section that is used trap the unmapped Tiler entries and this trap section could be overlapping with the actual sdram area.

So take care of the above scenarios while calculating the size of the actual ram.

Signed-off-by: R Sricharan r.sricharan@ti.com --- arch/arm/cpu/armv7/omap-common/hwinit-common.c | 20 ++++++++++++++++++-- 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index cf71ab4..6600323 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -162,11 +162,16 @@ void watchdog_init(void) */ u32 omap_sdram_size(void) { - u32 section, i, total_size = 0, size, addr; + u32 section, i, valid; + u64 sdram_start = 0, sdram_end = 0, addr, + size, total_size = 0, trap_size = 0;

for (i = 0; i < 4; i++) { section = __raw_readl(DMM_BASE + i*4); + valid = (section & EMIF_SDRC_ADDRSPC_MASK) >> + (EMIF_SDRC_ADDRSPC_SHIFT); addr = section & EMIF_SYS_ADDR_MASK; + /* See if the address is valid */ if ((addr >= DRAM_ADDR_SPACE_START) && (addr < DRAM_ADDR_SPACE_END)) { @@ -174,9 +179,20 @@ u32 omap_sdram_size(void) EMIF_SYS_SIZE_SHIFT); size = 1 << size; size *= SZ_16M; - total_size += size; + + if (valid != DMM_SDRC_ADDR_SPC_INVALID) { + if (!sdram_start || (addr < sdram_start)) + sdram_start = addr; + if (!sdram_end || ((addr + size) > sdram_end)) + sdram_end = addr + size; + } else { + trap_size = size; + } + } + } + total_size = (sdram_end - sdram_start) - (trap_size);

return total_size; }

-- 1.7.1

R Sricharan

12:12 p.m.

New subject: [U-Boot] [PATCH 2/4] ARM: OMAP5: dmm: Create a tiler trap section.

The unmapped entries in tiler space are set with values 0xFF. So creating a DMM section of size 16MB at 0xFF000000 with ADDRSPACE set to 0x2.

This way all the unmapped entry accesses to tiler will be trapped by the EMIF and a error response is sent to the L3 interconnect. L3 errors are inturn reported to MPU.

Note that here the tiler trap section is overlapping with the actual ddr physical space and we lose 16MB out of the total 2GB.

Signed-off-by: R Sricharan r.sricharan@ti.com --- arch/arm/cpu/armv7/omap5/sdram.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index b2b5753..368b78b 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -88,9 +88,9 @@ const struct emif_regs emif_regs_266_mhz_2cs = {

const struct dmm_lisa_map_regs lisa_map_4G_x_2_x_2 = { .dmm_lisa_map_0 = 0x0, - .dmm_lisa_map_1 = 0, - .dmm_lisa_map_2 = 0, - .dmm_lisa_map_3 = 0x80740300 + .dmm_lisa_map_1 = 0x0, + .dmm_lisa_map_2 = 0x80740300, + .dmm_lisa_map_3 = 0xFF020100 };

const u32 ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG] = {

-- 1.7.1

R Sricharan

12:12 p.m.

New subject: [U-Boot] [PATCH 3/4] ARM: OMAP5: Align memory used for testing to the power of 2

get_ram_size checks the given memory range for valid ram, but expects the size of memory to be aligned to the power of 2. In case of OMAP5 evm board the memory available is 2GB - 16MB(used for TRAP section) = 2032MB.

So always ensure that the size of memory used for testing is aligned to the power of 2.

Signed-off-by: R Sricharan r.sricharan@ti.com --- arch/arm/cpu/armv7/omap-common/emif-common.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index db509c9..389feda 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -1161,6 +1161,9 @@ void sdram_init(void) /* Do some testing after the init */ if (!in_sdram) { size_prog = omap_sdram_size(); + size_prog = log_2_n_round_down(size_prog); + size_prog = (1 << size_prog); + size_detect = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, size_prog); /* Compare with the size programmed */

-- 1.7.1

R Sricharan

12:12 p.m.

New subject: [U-Boot] [PATCH 4/4] ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.

OMAP5 evm board has 2GB of memory. So correct the macro to take in to account of the full dram size.

Signed-off-by: R Sricharan r.sricharan@ti.com --- arch/arm/include/asm/arch-omap5/omap.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index e3f55d2..2961c6b 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -40,7 +40,7 @@ #define OMAP54XX_L4_PER_BASE 0x48000000

#define OMAP54XX_DRAM_ADDR_SPACE_START 0x80000000 -#define OMAP54XX_DRAM_ADDR_SPACE_END 0xD0000000 +#define OMAP54XX_DRAM_ADDR_SPACE_END 0xFFFFFFFF #define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START #define DRAM_ADDR_SPACE_END OMAP54XX_DRAM_ADDR_SPACE_END

-- 1.7.1

Tom Rini

25 May 25 May

5:03 p.m.

On Thu, May 17, 2012 at 03:42:05PM +0530, R Sricharan wrote:

...

This series has been tested on OMAP4430 sdp OMAP4 panda OMAP5 evm

MAKEALL has been tested for all armv7 boards to ensure no build breakage.

R Sricharan (4): ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections. ARM: OMAP5: dmm: Create a tiler trap section. ARM: OMAP5: Align memory used for testing to the power of 2 ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.

arch/arm/cpu/armv7/omap-common/emif-common.c | 3 +++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 20 ++++++++++++++++++-- arch/arm/cpu/armv7/omap5/sdram.c | 6 +++--- arch/arm/include/asm/arch-omap5/omap.h | 2 +- 4 files changed, 25 insertions(+), 6 deletions(-)

Applied to u-boot-ti/master, thanks.

-- Tom

R, Sricharan

27 May 27 May

8:53 a.m.

...

...
R Sricharan (4): ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections. ARM: OMAP5: dmm: Create a tiler trap section. ARM: OMAP5: Align memory used for testing to the power of 2 ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.

arch/arm/cpu/armv7/omap-common/emif-common.c | 3 +++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 20 ++++++++++++++++++-- arch/arm/cpu/armv7/omap5/sdram.c | 6 +++--- arch/arm/include/asm/arch-omap5/omap.h | 2 +- 4 files changed, 25 insertions(+), 6 deletions(-)

Applied to u-boot-ti/master, thanks.

Thanks Tom !

Thanks, Sricharan

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