RE: [U-Boot-Users] [patch] Fix DDR6 errata on TQM834x boards
wd@denx.de wrote on Friday, March 10, 2006 9:42 AM:
Um, in my opinion the patch does a runtime check of the cpu revision, only the written value is dependent on the configured CAS latency.
Configured where?
+#if defined(DDR_CASLAT_20)
I can't find any definition or use of DDR_CASLAT_20 anywhere in U-Boot...
Hm, DDR_CASLAT_20 was already used in the very same file (board\tqm834x\tqm834x.c), which was introduced by DENX for the TQM834x porting.
In include/configs/tqm834x.h I found the line:
#define DDR_CASLAT_25 /* CASLAT set to 2.5 */
which is never used anywhere in the code. Perhaps a typo and DDR_CASLAT_20 was meant?
Regards, Martin
In message 47F3F98010FF784EBEE6526EAAB078D1C060A9@tq-mailsrv.tq-net.de you wrote:
I can't find any definition or use of DDR_CASLAT_20 anywhere in U-Boot...
Hm, DDR_CASLAT_20 was already used in the very same file
Strange. My first "grep" failed to find it. Sorry.
which is never used anywhere in the code. Perhaps a typo and DDR_CASLAT_20 was meant?
No. There is an #if ... #else ... #endif.
But I have to admit that the whole code is ugly.
Best regards,
Wolfgang Denk
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Martin Krause -
Wolfgang Denk