[U-Boot] u-boot on beagleboard finds incorrect memory size.
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
U-Boot SPL 2011.12-dirty (Jan 25 2012 - 19:07:19) Texas Instruments Revision detection unimplemented OMAP SD/MMC: 0 reading u-boot.img reading u-boot.bin mkimage signature not found - ih_magic = ea000014 Assuming u-boot.bin .. reading u-boot.bin
U-Boot 2011.12-dirty (Jan 25 2012 - 19:07:19)
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 1 GiB WARNING: Caches not enabled NAND: 256 MiB MMC: OMAP SD/MMC: 0 *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Beagle Rev C4 timed out in wait_for_pin: I2C_STAT=0 I2C read: I/O error Unrecognized expansion board: 0 Die ID #5468002400000000040365fa12014003 Net: No ethernet found. Hit any key to stop autoboot: 0 The user button is currently NOT pressed.
As you can see DRAM is showing as 1 Gib when the beagleboard doesn't have this much memory.
and the kernel boot shows it also has the wrong memory constraints.
[ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Linux version 3.2.0-10-omap (buildd@kitalpha) (gcc version 4.6.2 (Ubuntu/Linaro 4.6.2-10ubuntu1) ) #17-Ubuntu Thu Jan 19 18:58:16 UTC 2012 (Ub) [ 0.000000] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache [ 0.000000] Machine: OMAP3 Beagle Board [ 0.000000] Truncating RAM at a0000000-bfffffff to -afffffff (vmalloc region overlap). [ 0.000000] Reserving 12582912 bytes SDRAM for VRAM [ 0.000000] Memory policy: ECC disabled, Data cache writeback [ 0.000000] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) [ 0.000000] Clocking rate (Crystal/Core/MPU): 26.0/332/500 MHz [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 192000 [ 0.000000] Kernel command line: console=ttyO2,115200n8 console=tty0 vram=12M omapfb.mode=dvi:1280x720MR-16@60 mpurate=auto root=/dev/mmcblk0p2 rootwait ro [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] allocated 3145728 bytes of page_cgroup [ 0.000000] please try 'cgroup_disable=memory' option if you don't want memory cgroups [ 0.000000] Memory: 756MB = 756MB total [ 0.000000] Memory: 749380k/749380k available, 37052k reserved, 0K highmem [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xf8000000 ( 120 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB) [ 0.000000] .text : 0xc0008000 - 0xc06b12a0 (6821 kB) [ 0.000000] .init : 0xc06b2000 - 0xc06f2000 ( 256 kB) [ 0.000000] .data : 0xc06f2000 - 0xc0753bd0 ( 391 kB) [ 0.000000] .bss : 0xc0753bf4 - 0xc080c694 ( 739 kB)
This is from the linaro-stable and if I worked out git correctly the last commit is and i'm in master?
(sorry I don't know git very well bar git clone)
commit a7aebf03597d9661ad0e5241c12e448e980800b4 Author: Dirk Behme dirk.behme@de.bosch.com Date: Thu Jan 12 10:11:52 2012 +0100
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote:
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote:
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote:
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
As far as I'm aware yes, standard C4 from digikey.
I've done a little more searching, and found that adding #define DEBUG to /arc/arm/lib/board.c brings up more detailed info.
U-Boot SPL 2011.12-dirty (Jan 26 2012 - 18:21:33) Texas Instruments Revision detection unimplemented OMAP SD/MMC: 0 reading u-boot.img reading u-boot.bin mkimage signature not found - ih_magic = ea000014 Assuming u-boot.bin .. reading u-boot.bin
U-Boot 2011.12-dirty (Jan 26 2012 - 18:45:06)
U-Boot code: 80100000 -> 8014BC20 BSS: -> 8018F824 OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready monitor len: 0008F824 ramsize: 40000000 TLB table at: bfff0000 Top of RAM usable for U-Boot at: bfff0000 Reserving 574k for U-Boot at: bff60000 Reserving 384k for malloc() at: bff00000 Reserving 32 Bytes for Board Info at: bfefffe0 Reserving 120 Bytes for Global Data at: bfefff68 New Stack Pointer is: bfefff58 RAM Configuration: Bank #0: 80000000 512 MiB Bank #1: a0000000 512 MiB relocation Offset is: 3fe60000 WARNING: Caches not enabled monitor flash len: 000532D8 Now running in RAM - U-Boot at: bff60000 NAND: 256 MiB MMC: OMAP SD/MMC: 0 *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Beagle Rev C4 timed out in wait_for_pin: I2C_STAT=0 I2C read: I/O error Unrecognized expansion board: 0 Die ID #5468002400000000040365fa12014003 Net: No ethernet found. Hit any key to stop autoboot: 0 OMAP3 beagleboard.org #
At that point my total lack of c knowledge kicked in and I gave up!
I'm currently downloading the denx u-boot from git, so will give that a try and see if it reports anything different.
The reason for going for a source option is I have an odd problem with my pandaboard not reading the mmc with various versions of u-boot so decided to go back to the beagleboard to see if the problem was the same, and if not then at least have an idea where to start from with the pandaboard... but I digress!
On Thu, Jan 26, 2012 at 12:14 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote:
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote:
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
As far as I'm aware yes, standard C4 from digikey.
I've done a little more searching, and found that adding #define DEBUG to /arc/arm/lib/board.c brings up more detailed info.
I will re-confirm with mine then. Previous versions of U-Boot/MLO report how much memory, 512MB?
On Thu, 2012-01-26 at 12:28 -0700, Tom Rini wrote:
On Thu, Jan 26, 2012 at 12:14 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote:
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote:
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
As far as I'm aware yes, standard C4 from digikey.
I've done a little more searching, and found that adding #define DEBUG to /arc/arm/lib/board.c brings up more detailed info.
I will re-confirm with mine then. Previous versions of U-Boot/MLO report how much memory, 512MB?
I don't have an older version to hand, but according to the specs it should be 256MB using a 2Gb MDDR SDRAM and I seem to recall it did display that.
On Thu, Jan 26, 2012 at 12:35 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 12:28 -0700, Tom Rini wrote:
On Thu, Jan 26, 2012 at 12:14 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote:
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote:
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
As far as I'm aware yes, standard C4 from digikey.
I've done a little more searching, and found that adding #define DEBUG to /arc/arm/lib/board.c brings up more detailed info.
I will re-confirm with mine then. Previous versions of U-Boot/MLO report how much memory, 512MB?
I don't have an older version to hand, but according to the specs it should be 256MB using a 2Gb MDDR SDRAM and I seem to recall it did display that.
OK, thanks. Does the following fix it for you?
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 5c04b34..1efdbb0 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -161,7 +161,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { /* 512MB DDR */ - *mcfg = NUMONYX_V_MCFG_165(512 << 20); + *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
On Thu, Jan 26, 2012 at 5:21 PM, Tom Rini tom.rini@gmail.com wrote:
On Thu, Jan 26, 2012 at 12:35 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 12:28 -0700, Tom Rini wrote:
On Thu, Jan 26, 2012 at 12:14 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote:
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote:
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
As far as I'm aware yes, standard C4 from digikey.
I've done a little more searching, and found that adding #define DEBUG to /arc/arm/lib/board.c brings up more detailed info.
I will re-confirm with mine then. Previous versions of U-Boot/MLO report how much memory, 512MB?
I don't have an older version to hand, but according to the specs it should be 256MB using a 2Gb MDDR SDRAM and I seem to recall it did display that.
OK, thanks. Does the following fix it for you?
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 5c04b34..1efdbb0 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -161,7 +161,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { /* 512MB DDR */
- *mcfg = NUMONYX_V_MCFG_165(512 << 20);
- *mcfg = NUMONYX_V_MCFG_165(256 << 20);
*ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
Hi Tom,
No change on my c4:
(For reference, i've noticed my older B5,C2 are not affected by this bug..)
U-Boot 2011.12-00004-g79b8c19 (Jan 27 2012 - 08:45:02)
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 1 GiB NAND: 256 MiB MMC: OMAP SD/MMC: 0
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 6a457cb..9aa05d4 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -159,8 +159,8 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, switch (get_board_revision()) { case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { - /* 512MB DDR */ - *mcfg = NUMONYX_V_MCFG_165(512 << 20); + /* Beagleboard Rev C4, 256MB DDR */ + *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
Regards,
On Fri, Jan 27, 2012 at 8:05 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Thu, Jan 26, 2012 at 5:21 PM, Tom Rini tom.rini@gmail.com wrote:
On Thu, Jan 26, 2012 at 12:35 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 12:28 -0700, Tom Rini wrote:
On Thu, Jan 26, 2012 at 12:14 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote:
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote: > The u-boot loader is showing an incorrect size in the memory, and > passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
As far as I'm aware yes, standard C4 from digikey.
I've done a little more searching, and found that adding #define DEBUG to /arc/arm/lib/board.c brings up more detailed info.
I will re-confirm with mine then. Previous versions of U-Boot/MLO report how much memory, 512MB?
I don't have an older version to hand, but according to the specs it should be 256MB using a 2Gb MDDR SDRAM and I seem to recall it did display that.
OK, thanks. Does the following fix it for you?
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 5c04b34..1efdbb0 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -161,7 +161,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { /* 512MB DDR */
- *mcfg = NUMONYX_V_MCFG_165(512 << 20);
- *mcfg = NUMONYX_V_MCFG_165(256 << 20);
*ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
Hi Tom,
No change on my c4:
OK, can you throw in some printfs to see which of the cases in that function your C4 is hitting? Thanks!
On Fri, 2012-01-27 at 08:09 -0700, Tom Rini wrote:
On Fri, Jan 27, 2012 at 8:05 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Thu, Jan 26, 2012 at 5:21 PM, Tom Rini tom.rini@gmail.com wrote:
On Thu, Jan 26, 2012 at 12:35 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 12:28 -0700, Tom Rini wrote:
On Thu, Jan 26, 2012 at 12:14 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote: > On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan > piercing_male@hotmail.com wrote: > > The u-boot loader is showing an incorrect size in the memory, and > > passing the invalid information to the kernel. > > What revision of the board do you have? Is this a 'classic' rev C4? Thanks. > As far as I'm aware yes, standard C4 from digikey.
I've done a little more searching, and found that adding #define DEBUG to /arc/arm/lib/board.c brings up more detailed info.
I will re-confirm with mine then. Previous versions of U-Boot/MLO report how much memory, 512MB?
I don't have an older version to hand, but according to the specs it should be 256MB using a 2Gb MDDR SDRAM and I seem to recall it did display that.
OK, thanks. Does the following fix it for you?
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 5c04b34..1efdbb0 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -161,7 +161,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { /* 512MB DDR */
*mcfg = NUMONYX_V_MCFG_165(512 << 20);
*mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;Hi Tom,
No change on my c4:
OK, can you throw in some printfs to see which of the cases in that function your C4 is hitting? Thanks!
Hi. The text is wrong as well according to the Circuitco site.
I'm afraid I don't know diff but the code should say.
case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { /* Beagleboard rev C5 ST-micro POP 512MB NAND */ *mcfg = NUMONYX_V_MCFG_165(512 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { /* Beagleboard rev C4 micron POP, 256MB NAND */ *mcfg = MICRON_V_MCFG_200(256 << 20); *ctrla = MICRON_V_ACTIMA_200; *ctrlb = MICRON_V_ACTIMB_200; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break;
I think the area of code that needs investigating is in arch/arm/cpu/armv7/omap3/sdrc.c
line 82 onwards :-
u32 get_sdr_cs_size(u32 cs) { u32 size;
/* get ram size field */ size = readl(&sdrc_base->cs[cs].mcfg) >> 8; size &= 0x3FF; /* remove unwanted bits */ size <<= 21; /* multiply by 2 MiB to find size in MB */ return size; }
Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't understand how the -> stuff works.
I think its line 262 which is wrong but I'm not sure what it should say.
#define RAMSIZE_128 (0x40 << 8) /* RAM size in 2MB chunks */
On Fri, Jan 27, 2012 at 8:50 AM, wilsonjonathan piercing_male@hotmail.com wrote:
I think the area of code that needs investigating is in arch/arm/cpu/armv7/omap3/sdrc.c
line 82 onwards :-
u32 get_sdr_cs_size(u32 cs) { u32 size;
/* get ram size field */ size = readl(&sdrc_base->cs[cs].mcfg) >> 8; size &= 0x3FF; /* remove unwanted bits */ size <<= 21; /* multiply by 2 MiB to find size in MB */ return size; }
Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't understand how the -> stuff works.
This is all correct. However, what's going wrong is we're programming the size of memory found incorrectly and we don't yet have a safe method to probe how much memory is really there (aside: get_ram_size(...) goes off into the weeds on omap3 and it's on my TODO list, and rising fast, to get my flyswatter out, hooked up and see what's really happening). So what I really need to know is which of the cases in beagle.c this board is falling into (I suspect it's the top half of that else, but it's 2x128MB not 1x256). Thanks again!
On Fri, Jan 27, 2012 at 9:58 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 8:50 AM, wilsonjonathan piercing_male@hotmail.com wrote:
I think the area of code that needs investigating is in arch/arm/cpu/armv7/omap3/sdrc.c
line 82 onwards :-
u32 get_sdr_cs_size(u32 cs) { u32 size;
/* get ram size field */ size = readl(&sdrc_base->cs[cs].mcfg) >> 8; size &= 0x3FF; /* remove unwanted bits */ size <<= 21; /* multiply by 2 MiB to find size in MB */ return size; }
Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't understand how the -> stuff works.
This is all correct. However, what's going wrong is we're programming the size of memory found incorrectly and we don't yet have a safe method to probe how much memory is really there (aside: get_ram_size(...) goes off into the weeds on omap3 and it's on my TODO list, and rising fast, to get my flyswatter out, hooked up and see what's really happening). So what I really need to know is which of the cases in beagle.c this board is falling into (I suspect it's the top half of that else, but it's 2x128MB not 1x256). Thanks again!
Okay, little bit more information is shown with printf's..
U-Boot SPL 2011.12-00001-g35bbe6c-dirty (Jan 27 2012 - 10:15:33) Texas Instruments Revision detection unimplemented case REVISION_C4: actual pop_id: 0xBA actual pop_mfr: 0x2C case REVISION_C4: Neither option was selected. OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img
using:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9aa05d4..4c7bf94 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -158,7 +158,11 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *mr = MICRON_V_MR_165; switch (get_board_revision()) { case REVISION_C4: + printf("case REVISION_C4:\n"); + printf("actual pop_id: 0x%02X \n", pop_id); + printf("actual pop_mfr: 0x%02X \n", pop_mfr); if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { + printf("pop_id == 0xba (C4)\n"); /* Beagleboard Rev C4, 256MB DDR */ *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; @@ -166,6 +170,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { + printf("pop_id == 0xbc (c5)\n"); /* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); *ctrla = MICRON_V_ACTIMA_200; @@ -173,6 +178,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; } + printf("case REVISION_C4: Neither option was selected.\n"); case REVISION_XM_A: case REVISION_XM_B: case REVISION_XM_C:
On my c4, it looks like neither option is selected for it..
./include/linux/mtd/nand.h:#define NAND_MFR_STMICRO 0x20 ./include/linux/mtd/nand.h:#define NAND_MFR_MICRON 0x2c
looks like the RAM/NAND options might have been reversed for C4 and C5 in the IF statement.. but i dont' have a C5 to test..
Regards,
On Fri, Jan 27, 2012 at 9:23 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:58 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 8:50 AM, wilsonjonathan piercing_male@hotmail.com wrote:
I think the area of code that needs investigating is in arch/arm/cpu/armv7/omap3/sdrc.c
line 82 onwards :-
u32 get_sdr_cs_size(u32 cs) { u32 size;
/* get ram size field */ size = readl(&sdrc_base->cs[cs].mcfg) >> 8; size &= 0x3FF; /* remove unwanted bits */ size <<= 21; /* multiply by 2 MiB to find size in MB */ return size; }
Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't understand how the -> stuff works.
This is all correct. However, what's going wrong is we're programming the size of memory found incorrectly and we don't yet have a safe method to probe how much memory is really there (aside: get_ram_size(...) goes off into the weeds on omap3 and it's on my TODO list, and rising fast, to get my flyswatter out, hooked up and see what's really happening). So what I really need to know is which of the cases in beagle.c this board is falling into (I suspect it's the top half of that else, but it's 2x128MB not 1x256). Thanks again!
Okay, little bit more information is shown with printf's..
U-Boot SPL 2011.12-00001-g35bbe6c-dirty (Jan 27 2012 - 10:15:33) Texas Instruments Revision detection unimplemented case REVISION_C4: actual pop_id: 0xBA actual pop_mfr: 0x2C case REVISION_C4: Neither option was selected. OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img
using:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9aa05d4..4c7bf94 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -158,7 +158,11 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *mr = MICRON_V_MR_165; switch (get_board_revision()) { case REVISION_C4:
- printf("case REVISION_C4:\n");
- printf("actual pop_id: 0x%02X \n", pop_id);
- printf("actual pop_mfr: 0x%02X \n", pop_mfr);
if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- printf("pop_id == 0xba (C4)\n");
/* Beagleboard Rev C4, 256MB DDR */ *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; @@ -166,6 +170,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
- printf("pop_id == 0xbc (c5)\n");
/* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); *ctrla = MICRON_V_ACTIMA_200; @@ -173,6 +178,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; }
- printf("case REVISION_C4: Neither option was selected.\n");
case REVISION_XM_A: case REVISION_XM_B: case REVISION_XM_C:
On my c4, it looks like neither option is selected for it..
./include/linux/mtd/nand.h:#define NAND_MFR_STMICRO 0x20 ./include/linux/mtd/nand.h:#define NAND_MFR_MICRON 0x2c
looks like the RAM/NAND options might have been reversed for C4 and C5 in the IF statement.. but i dont' have a C5 to test..
I've got a C5 which has been OK. I've got to step out for a few but I'll have a patch later today for this I hope, if you don't beat me to it :)
On Fri, Jan 27, 2012 at 10:25 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:23 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:58 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 8:50 AM, wilsonjonathan piercing_male@hotmail.com wrote:
I think the area of code that needs investigating is in arch/arm/cpu/armv7/omap3/sdrc.c
line 82 onwards :-
u32 get_sdr_cs_size(u32 cs) { u32 size;
/* get ram size field */ size = readl(&sdrc_base->cs[cs].mcfg) >> 8; size &= 0x3FF; /* remove unwanted bits */ size <<= 21; /* multiply by 2 MiB to find size in MB */ return size; }
Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't understand how the -> stuff works.
This is all correct. However, what's going wrong is we're programming the size of memory found incorrectly and we don't yet have a safe method to probe how much memory is really there (aside: get_ram_size(...) goes off into the weeds on omap3 and it's on my TODO list, and rising fast, to get my flyswatter out, hooked up and see what's really happening). So what I really need to know is which of the cases in beagle.c this board is falling into (I suspect it's the top half of that else, but it's 2x128MB not 1x256). Thanks again!
Okay, little bit more information is shown with printf's..
U-Boot SPL 2011.12-00001-g35bbe6c-dirty (Jan 27 2012 - 10:15:33) Texas Instruments Revision detection unimplemented case REVISION_C4: actual pop_id: 0xBA actual pop_mfr: 0x2C case REVISION_C4: Neither option was selected. OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img
using:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9aa05d4..4c7bf94 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -158,7 +158,11 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *mr = MICRON_V_MR_165; switch (get_board_revision()) { case REVISION_C4:
- printf("case REVISION_C4:\n");
- printf("actual pop_id: 0x%02X \n", pop_id);
- printf("actual pop_mfr: 0x%02X \n", pop_mfr);
if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- printf("pop_id == 0xba (C4)\n");
/* Beagleboard Rev C4, 256MB DDR */ *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; @@ -166,6 +170,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
- printf("pop_id == 0xbc (c5)\n");
/* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); *ctrla = MICRON_V_ACTIMA_200; @@ -173,6 +178,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; }
- printf("case REVISION_C4: Neither option was selected.\n");
case REVISION_XM_A: case REVISION_XM_B: case REVISION_XM_C:
On my c4, it looks like neither option is selected for it..
./include/linux/mtd/nand.h:#define NAND_MFR_STMICRO 0x20 ./include/linux/mtd/nand.h:#define NAND_MFR_MICRON 0x2c
looks like the RAM/NAND options might have been reversed for C4 and C5 in the IF statement.. but i dont' have a C5 to test..
I've got a C5 which has been OK. I've got to step out for a few but I'll have a patch later today for this I hope, if you don't beat me to it :)
Ah, now i see the problem.. There actually isn't support in u-boot for the regular C4.. ;)
When the memory options where transfered from x-loader. The special 'white label' 512Mb DDR C4 from Special Computing became the "regular C4"..
see: http://gitorious.org/x-loader/x-loader/blobs/master/board/omap3530beagle/oma...
and
http://gitorious.org/x-loader/x-loader/commit/1dac1a7c188e79edabe211ccaadf58...
So first we need to document the "512MB DDR" something like...
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 6a457cb..cf55c79 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -159,7 +159,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, switch (get_board_revision()) { case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { - /* 512MB DDR */ + /* Beagle Rev C4 from Special Computing, 512MB DDR */ *mcfg = NUMONYX_V_MCFG_165(512 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165;
and then readd c4 memory timings..
Regards,
On Fri, Jan 27, 2012 at 10:51 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 10:25 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:23 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:58 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 8:50 AM, wilsonjonathan piercing_male@hotmail.com wrote:
I think the area of code that needs investigating is in arch/arm/cpu/armv7/omap3/sdrc.c
line 82 onwards :-
u32 get_sdr_cs_size(u32 cs) { u32 size;
/* get ram size field */ size = readl(&sdrc_base->cs[cs].mcfg) >> 8; size &= 0x3FF; /* remove unwanted bits */ size <<= 21; /* multiply by 2 MiB to find size in MB */ return size; }
Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't understand how the -> stuff works.
This is all correct. However, what's going wrong is we're programming the size of memory found incorrectly and we don't yet have a safe method to probe how much memory is really there (aside: get_ram_size(...) goes off into the weeds on omap3 and it's on my TODO list, and rising fast, to get my flyswatter out, hooked up and see what's really happening). So what I really need to know is which of the cases in beagle.c this board is falling into (I suspect it's the top half of that else, but it's 2x128MB not 1x256). Thanks again!
Okay, little bit more information is shown with printf's..
U-Boot SPL 2011.12-00001-g35bbe6c-dirty (Jan 27 2012 - 10:15:33) Texas Instruments Revision detection unimplemented case REVISION_C4: actual pop_id: 0xBA actual pop_mfr: 0x2C case REVISION_C4: Neither option was selected. OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img
using:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9aa05d4..4c7bf94 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -158,7 +158,11 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *mr = MICRON_V_MR_165; switch (get_board_revision()) { case REVISION_C4:
- printf("case REVISION_C4:\n");
- printf("actual pop_id: 0x%02X \n", pop_id);
- printf("actual pop_mfr: 0x%02X \n", pop_mfr);
if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- printf("pop_id == 0xba (C4)\n");
/* Beagleboard Rev C4, 256MB DDR */ *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; @@ -166,6 +170,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
- printf("pop_id == 0xbc (c5)\n");
/* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); *ctrla = MICRON_V_ACTIMA_200; @@ -173,6 +178,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; }
- printf("case REVISION_C4: Neither option was selected.\n");
case REVISION_XM_A: case REVISION_XM_B: case REVISION_XM_C:
On my c4, it looks like neither option is selected for it..
./include/linux/mtd/nand.h:#define NAND_MFR_STMICRO 0x20 ./include/linux/mtd/nand.h:#define NAND_MFR_MICRON 0x2c
looks like the RAM/NAND options might have been reversed for C4 and C5 in the IF statement.. but i dont' have a C5 to test..
I've got a C5 which has been OK. I've got to step out for a few but I'll have a patch later today for this I hope, if you don't beat me to it :)
Ah, now i see the problem.. There actually isn't support in u-boot for the regular C4.. ;)
When the memory options where transfered from x-loader. The special 'white label' 512Mb DDR C4 from Special Computing became the "regular C4"..
see: http://gitorious.org/x-loader/x-loader/blobs/master/board/omap3530beagle/oma...
and
http://gitorious.org/x-loader/x-loader/commit/1dac1a7c188e79edabe211ccaadf58...
So first we need to document the "512MB DDR" something like...
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 6a457cb..cf55c79 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -159,7 +159,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, switch (get_board_revision()) { case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- /* 512MB DDR */
- /* Beagle Rev C4 from Special Computing, 512MB DDR */
*mcfg = NUMONYX_V_MCFG_165(512 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165;
and then readd c4 memory timings..
Okay with:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index cf55c79..226d7dc 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -165,6 +165,13 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; + } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { + /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ + *mcfg = MICRON_V_MCFG_165(128 << 20); + *ctrla = MICRON_V_ACTIMA_165; + *ctrlb = MICRON_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { /* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20);
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0
The DRAM is now correct... but now to fix the NAND, it should be 512MiB.. ;)
Regards,
On Fri, Jan 27, 2012 at 10:09 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 10:51 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 10:25 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:23 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:58 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 8:50 AM, wilsonjonathan piercing_male@hotmail.com wrote:
I think the area of code that needs investigating is in arch/arm/cpu/armv7/omap3/sdrc.c
line 82 onwards :-
> u32 get_sdr_cs_size(u32 cs) > { > u32 size; > > /* get ram size field */ > size = readl(&sdrc_base->cs[cs].mcfg) >> 8; > size &= 0x3FF; /* remove unwanted bits */ > size <<= 21; /* multiply by 2 MiB to find size in MB */ > return size; > } >
Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't understand how the -> stuff works.
This is all correct. However, what's going wrong is we're programming the size of memory found incorrectly and we don't yet have a safe method to probe how much memory is really there (aside: get_ram_size(...) goes off into the weeds on omap3 and it's on my TODO list, and rising fast, to get my flyswatter out, hooked up and see what's really happening). So what I really need to know is which of the cases in beagle.c this board is falling into (I suspect it's the top half of that else, but it's 2x128MB not 1x256). Thanks again!
Okay, little bit more information is shown with printf's..
U-Boot SPL 2011.12-00001-g35bbe6c-dirty (Jan 27 2012 - 10:15:33) Texas Instruments Revision detection unimplemented case REVISION_C4: actual pop_id: 0xBA actual pop_mfr: 0x2C case REVISION_C4: Neither option was selected. OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img
using:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9aa05d4..4c7bf94 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -158,7 +158,11 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *mr = MICRON_V_MR_165; switch (get_board_revision()) { case REVISION_C4:
- printf("case REVISION_C4:\n");
- printf("actual pop_id: 0x%02X \n", pop_id);
- printf("actual pop_mfr: 0x%02X \n", pop_mfr);
if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- printf("pop_id == 0xba (C4)\n");
/* Beagleboard Rev C4, 256MB DDR */ *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; @@ -166,6 +170,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
- printf("pop_id == 0xbc (c5)\n");
/* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); *ctrla = MICRON_V_ACTIMA_200; @@ -173,6 +178,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; }
- printf("case REVISION_C4: Neither option was selected.\n");
case REVISION_XM_A: case REVISION_XM_B: case REVISION_XM_C:
On my c4, it looks like neither option is selected for it..
./include/linux/mtd/nand.h:#define NAND_MFR_STMICRO 0x20 ./include/linux/mtd/nand.h:#define NAND_MFR_MICRON 0x2c
looks like the RAM/NAND options might have been reversed for C4 and C5 in the IF statement.. but i dont' have a C5 to test..
I've got a C5 which has been OK. I've got to step out for a few but I'll have a patch later today for this I hope, if you don't beat me to it :)
Ah, now i see the problem.. There actually isn't support in u-boot for the regular C4.. ;)
When the memory options where transfered from x-loader. The special 'white label' 512Mb DDR C4 from Special Computing became the "regular C4"..
see: http://gitorious.org/x-loader/x-loader/blobs/master/board/omap3530beagle/oma...
and
http://gitorious.org/x-loader/x-loader/commit/1dac1a7c188e79edabe211ccaadf58...
So first we need to document the "512MB DDR" something like...
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 6a457cb..cf55c79 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -159,7 +159,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, switch (get_board_revision()) { case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- /* 512MB DDR */
- /* Beagle Rev C4 from Special Computing, 512MB DDR */
*mcfg = NUMONYX_V_MCFG_165(512 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165;
and then readd c4 memory timings..
Okay with:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index cf55c79..226d7dc 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -165,6 +165,13 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break;
- } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
- /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
- *mcfg = MICRON_V_MCFG_165(128 << 20);
- *ctrla = MICRON_V_ACTIMA_165;
- *ctrlb = MICRON_V_ACTIMB_165;
- *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
- break;
} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { /* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20);
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0
The DRAM is now correct... but now to fix the NAND, it should be 512MiB.. ;)
Good catch! Can you reply with a Signed-off-by line and I'll incorporate this into u-boot-ti/master? Thanks!
On Fri, Jan 27, 2012 at 11:58 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 10:09 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 10:51 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 10:25 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:23 AM, Robert Nelson robertcnelson@gmail.com wrote:
On Fri, Jan 27, 2012 at 9:58 AM, Tom Rini tom.rini@gmail.com wrote:
On Fri, Jan 27, 2012 at 8:50 AM, wilsonjonathan piercing_male@hotmail.com wrote: > I think the area of code that needs investigating is in > arch/arm/cpu/armv7/omap3/sdrc.c > > line 82 onwards :- > > >> u32 get_sdr_cs_size(u32 cs) >> { >> u32 size; >> >> /* get ram size field */ >> size = readl(&sdrc_base->cs[cs].mcfg) >> 8; >> size &= 0x3FF; /* remove unwanted bits */ >> size <<= 21; /* multiply by 2 MiB to find size in MB */ >> return size; >> } >> > > Which I think is set in arc/arm/include/asm/arch-omap3/cpu.h but I don't > understand how the -> stuff works.
This is all correct. However, what's going wrong is we're programming the size of memory found incorrectly and we don't yet have a safe method to probe how much memory is really there (aside: get_ram_size(...) goes off into the weeds on omap3 and it's on my TODO list, and rising fast, to get my flyswatter out, hooked up and see what's really happening). So what I really need to know is which of the cases in beagle.c this board is falling into (I suspect it's the top half of that else, but it's 2x128MB not 1x256). Thanks again!
Okay, little bit more information is shown with printf's..
U-Boot SPL 2011.12-00001-g35bbe6c-dirty (Jan 27 2012 - 10:15:33) Texas Instruments Revision detection unimplemented case REVISION_C4: actual pop_id: 0xBA actual pop_mfr: 0x2C case REVISION_C4: Neither option was selected. OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img
using:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9aa05d4..4c7bf94 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -158,7 +158,11 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *mr = MICRON_V_MR_165; switch (get_board_revision()) { case REVISION_C4:
- printf("case REVISION_C4:\n");
- printf("actual pop_id: 0x%02X \n", pop_id);
- printf("actual pop_mfr: 0x%02X \n", pop_mfr);
if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- printf("pop_id == 0xba (C4)\n");
/* Beagleboard Rev C4, 256MB DDR */ *mcfg = NUMONYX_V_MCFG_165(256 << 20); *ctrla = NUMONYX_V_ACTIMA_165; @@ -166,6 +170,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
- printf("pop_id == 0xbc (c5)\n");
/* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); *ctrla = MICRON_V_ACTIMA_200; @@ -173,6 +178,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; }
- printf("case REVISION_C4: Neither option was selected.\n");
case REVISION_XM_A: case REVISION_XM_B: case REVISION_XM_C:
On my c4, it looks like neither option is selected for it..
./include/linux/mtd/nand.h:#define NAND_MFR_STMICRO 0x20 ./include/linux/mtd/nand.h:#define NAND_MFR_MICRON 0x2c
looks like the RAM/NAND options might have been reversed for C4 and C5 in the IF statement.. but i dont' have a C5 to test..
I've got a C5 which has been OK. I've got to step out for a few but I'll have a patch later today for this I hope, if you don't beat me to it :)
Ah, now i see the problem.. There actually isn't support in u-boot for the regular C4.. ;)
When the memory options where transfered from x-loader. The special 'white label' 512Mb DDR C4 from Special Computing became the "regular C4"..
see: http://gitorious.org/x-loader/x-loader/blobs/master/board/omap3530beagle/oma...
and
http://gitorious.org/x-loader/x-loader/commit/1dac1a7c188e79edabe211ccaadf58...
So first we need to document the "512MB DDR" something like...
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 6a457cb..cf55c79 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -159,7 +159,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, switch (get_board_revision()) { case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
- /* 512MB DDR */
- /* Beagle Rev C4 from Special Computing, 512MB DDR */
*mcfg = NUMONYX_V_MCFG_165(512 << 20); *ctrla = NUMONYX_V_ACTIMA_165; *ctrlb = NUMONYX_V_ACTIMB_165;
and then readd c4 memory timings..
Okay with:
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index cf55c79..226d7dc 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -165,6 +165,13 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break;
- } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
- /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
- *mcfg = MICRON_V_MCFG_165(128 << 20);
- *ctrla = MICRON_V_ACTIMA_165;
- *ctrlb = MICRON_V_ACTIMB_165;
- *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
- break;
} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { /* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20);
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0
The DRAM is now correct... but now to fix the NAND, it should be 512MiB.. ;)
Good catch! Can you reply with a Signed-off-by line and I'll incorporate this into u-boot-ti/master? Thanks!
Signed-off-by: Robert Nelson robertcnelson@gmail.com
Thanks for pulling it into master so quickly.. ;)
Regards,
On Fri, 2012-01-27 at 12:00 -0600, Robert Nelson wrote:
On Fri, Jan 27, 2012 at 11:58 AM, Tom Rini tom.rini@gmail.com wrote:
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0
The DRAM is now correct... but now to fix the NAND, it should be 512MiB.. ;)
Good catch! Can you reply with a Signed-off-by line and I'll incorporate this into u-boot-ti/master? Thanks!
Signed-off-by: Robert Nelson robertcnelson@gmail.com
Thanks for pulling it into master so quickly.. ;)
Regards,
Wow that was interesting :-) Not being a c programmer I think I learnt something. I've made the change manually and it seems to work.
My question now is I think this version is significantly different to older versions in that it no longer loads boot.scr and executes it. So my obvious question is how do I get it to do that, or using the new system what do I need to put into, I think, uEnv.txt to get it to load the latest version of ubuntu-precise-pangoline.
Mind you, I think that it will then baulk at the initrd script files which manipulate boot.scr, oh joy!
On Fri, Jan 27, 2012 at 11:42 AM, wilsonjonathan piercing_male@hotmail.com wrote:
On Fri, 2012-01-27 at 12:00 -0600, Robert Nelson wrote:
On Fri, Jan 27, 2012 at 11:58 AM, Tom Rini tom.rini@gmail.com wrote:
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0
The DRAM is now correct... but now to fix the NAND, it should be 512MiB.. ;)
Good catch! Can you reply with a Signed-off-by line and I'll incorporate this into u-boot-ti/master? Thanks!
Signed-off-by: Robert Nelson robertcnelson@gmail.com
Thanks for pulling it into master so quickly.. ;)
Regards,
Wow that was interesting :-) Not being a c programmer I think I learnt something. I've made the change manually and it seems to work.
My question now is I think this version is significantly different to older versions in that it no longer loads boot.scr and executes it. So my obvious question is how do I get it to do that, or using the new system what do I need to put into, I think, uEnv.txt to get it to load the latest version of ubuntu-precise-pangoline.
The format of uEnv.txt is pretty simple, and similar to boot.scr. That said, adding back in the logic to try boot.scr and use it, if it exists, is something that should be done.
On Fri, Jan 27, 2012 at 12:42 PM, wilsonjonathan piercing_male@hotmail.com wrote:
On Fri, 2012-01-27 at 12:00 -0600, Robert Nelson wrote:
On Fri, Jan 27, 2012 at 11:58 AM, Tom Rini tom.rini@gmail.com wrote:
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0
The DRAM is now correct... but now to fix the NAND, it should be 512MiB.. ;)
Good catch! Can you reply with a Signed-off-by line and I'll incorporate this into u-boot-ti/master? Thanks!
Signed-off-by: Robert Nelson robertcnelson@gmail.com
Thanks for pulling it into master so quickly.. ;)
Regards,
Wow that was interesting :-) Not being a c programmer I think I learnt something. I've made the change manually and it seems to work.
My question now is I think this version is significantly different to older versions in that it no longer loads boot.scr and executes it. So my obvious question is how do I get it to do that, or using the new system what do I need to put into, I think, uEnv.txt to get it to load the latest version of ubuntu-precise-pangoline.
Mind you, I think that it will then baulk at the initrd script files which manipulate boot.scr, oh joy!
till you get use to uEnv.txt's I've got a compatibility script listed here..
http://elinux.org/BeagleBoardUbuntu#boot.scr_-.3E_uEnv.txt
I've used it for a year, hopefully it still works as is with u-boot git..
Regards,
On Thu, 2012-01-26 at 10:08 -0700, Tom Rini wrote:
On Wed, Jan 25, 2012 at 1:06 PM, wilsonjonathan piercing_male@hotmail.com wrote:
The u-boot loader is showing an incorrect size in the memory, and passing the invalid information to the kernel.
What revision of the board do you have? Is this a 'classic' rev C4? Thanks.
Using the denx u-boot, if it doesn't find u-boot.img it halts instead of then testing for u-boot.bin... so I put u-boot.img onto the mmc and the following came up.
U-Boot SPL 2011.12-00201-g137703b (Jan 26 2012 - 19:15:07) Texas Instruments Revision detection unimplemented OMAP SD/MMC: 0 reading u-boot.img reading u-boot.img
U-Boot 2011.12-00201-g137703b (Jan 26 2012 - 19:15:07)
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz OMAP3 Beagle board + LPDDR/NAND I2C: ready DRAM: 1 GiB NAND: 256 MiB MMC: OMAP SD/MMC: 0 *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Beagle Rev C4 timed out in wait_for_pin: I2C_STAT=0 I2C read: I/O error Unrecognized expansion board: 0 Die ID #5468002400000000040365fa12014003 Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 OMAP3 beagleboard.org #
participants (3)
-
Robert Nelson -
Tom Rini -
wilsonjonathan