Tested-by: Pau Pajuelo ppajuel@gmail.com

2017-04-01 17:14 GMT+02:00 Ladislav Michl ladis@linux-mips.org:

Signed-off-by: Ladislav Michl ladis@linux-mips.org

arch/arm/include/asm/arch-am33xx/spl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index f744ab0782..9df7b4ac45 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -28,7 +28,7 @@ #define BOOT_DEVICE_XIP 0x01 #define BOOT_DEVICE_XIPWAIT 0x02 #define BOOT_DEVICE_NAND 0x03 -#define BOOT_DEVICE_ONENAD 0x04 +#define BOOT_DEVICE_ONENAND 0x04 #define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */ #define BOOT_DEVICE_MMC1 0x06

#define BOOT_DEVICE_UART 0x43

2.11.0

Tested-by: Pau Pajuelo ppajuel@gmail.com

2017-04-01 17:16 GMT+02:00 Ladislav Michl ladis@linux-mips.org:

nand_spl_load_image implementation was copied over into three different drivers and now with nand_spl_read_block used for ubispl situation gets even worse. For now use least intrusive solution and #include the same implementation to nand drivers.

Signed-off-by: Ladislav Michl ladis@linux-mips.org

drivers/mtd/nand/am335x_spl_bch.c | 49 +---------------- drivers/mtd/nand/atmel_nand.c | 30 +--------- drivers/mtd/nand/nand_spl_loaders.c | 106 ++++++++++++++++++++++++++++++++++++ drivers/mtd/nand/nand_spl_simple.c | 98 +-------------------------------- 4 files changed, 112 insertions(+), 171 deletions(-)

diff --git a/drivers/mtd/nand/am335x_spl_bch.c b/drivers/mtd/nand/am335x_spl_bch.c index a8a7a66a18..c433caa365 100644 --- a/drivers/mtd/nand/am335x_spl_bch.c +++ b/drivers/mtd/nand/am335x_spl_bch.c @@ -170,53 +170,6 @@ static int nand_read_page(int block, int page, void *dst) return 0; }

-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) -{

•   unsigned int block, lastblock;
  

•   unsigned int page, page_offset;
  

•   /*
  

•    * offs has to be aligned to a page address!
  

•    */
  

•   block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
  

•   page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE;
  

•   while (block <= lastblock) {
  

•           if (!nand_is_bad_block(block)) {
  

•                   /*
  

•                    * Skip bad blocks
  

•                    */
  

•                   while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
  

•                           nand_read_page(block, page, dst);
  

•                           /*
  

•                            * When offs is not aligned to page address the
  

•                            * extra offset is copied to dst as well. Copy
  

•                            * the image such that its first byte will be
  

•                            * at the dst.
  

•                            */
  

•                           if (unlikely(page_offset)) {
  

•                                   memmove(dst, dst + page_offset,
  

•                                           CONFIG_SYS_NAND_PAGE_SIZE);
  

•                                   dst = (void *)((int)dst - page_offset);
  

•                                   page_offset = 0;
  

•                           }
  

•                           dst += CONFIG_SYS_NAND_PAGE_SIZE;
  

•                           page++;
  

•                   }
  

•                   page = 0;
  

•           } else {
  

•                   lastblock++;
  

•           }
  

•           block++;
  

•   }
  

•   return 0;
  

-}

/* nand_init() - initialize data to make nand usable by SPL */ void nand_init(void) { @@ -241,3 +194,5 @@ void nand_deselect(void) if (nand_chip.select_chip) nand_chip.select_chip(mtd, -1); }

+#include "nand_spl_loaders.c" diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 8669432deb..00c8bc5f12 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -1379,34 +1379,6 @@ static int nand_read_page(int block, int page, void *dst) } #endif /* CONFIG_SPL_NAND_ECC */

-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) -{

•   unsigned int block, lastblock;
  

•   unsigned int page;
  

•   block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
  

•   while (block <= lastblock) {
  

•           if (!nand_is_bad_block(block)) {
  

•                   while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
  

•                           nand_read_page(block, page, dst);
  

•                           dst += CONFIG_SYS_NAND_PAGE_SIZE;
  

•                           page++;
  

•                   }
  

•                   page = 0;
  

•           } else {
  

•                   lastblock++;
  

•           }
  

•           block++;
  

•   }
  

•   return 0;
  

-}

int at91_nand_wait_ready(struct mtd_info *mtd) { struct nand_chip *this = mtd_to_nand(mtd); @@ -1473,6 +1445,8 @@ void nand_deselect(void) nand_chip.select_chip(mtd, -1); }

+#include "nand_spl_loaders.c"

#else

#ifndef CONFIG_SYS_NAND_BASE_LIST diff --git a/drivers/mtd/nand/nand_spl_loaders.c b/drivers/mtd/nand/nand_spl_loaders.c new file mode 100644 index 0000000000..2a4b104954 --- /dev/null +++ b/drivers/mtd/nand/nand_spl_loaders.c @@ -0,0 +1,106 @@ +#ifdef CONFIG_SPL_NAND_LOAD +int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) +{

•   unsigned int block, lastblock;
  

•   unsigned int page, page_offset;
  

•   /* offs has to be aligned to a page address! */
  

•   block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
  

•   page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE;
  

•   while (block <= lastblock) {
  

•           if (!nand_is_bad_block(block)) {
  

•                   /* Skip bad blocks */
  

•                   while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
  

•                           nand_read_page(block, page, dst);
  

•                           /*
  

•                            * When offs is not aligned to page address the
  

•                            * extra offset is copied to dst as well. Copy
  

•                            * the image such that its first byte will be
  

•                            * at the dst.
  

•                            */
  

•                           if (unlikely(page_offset)) {
  

•                                   memmove(dst, dst + page_offset,
  

•                                           CONFIG_SYS_NAND_PAGE_SIZE);
  

•                                   dst = (void *)((int)dst - page_offset);
  

•                                   page_offset = 0;
  

•                           }
  

•                           dst += CONFIG_SYS_NAND_PAGE_SIZE;
  

•                           page++;
  

•                   }
  

•                   page = 0;
  

•           } else {
  

•                   lastblock++;
  

•           }
  

•           block++;
  

•   }
  

•   return 0;
  

+} +#endif

+#ifdef CONFIG_SPL_UBI +/*

• • Temporary storage for non NAND page aligned and non NAND page sized
• • reads. Note: This does not support runtime detected FLASH yet, but
• • that should be reasonably easy to fix by making the buffer large
• • enough :)
• */

+static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];

+/**

• • nand_spl_read_block - Read data from physical eraseblock into a buffer
• • @block: Number of the physical eraseblock
• • @offset: Data offset from the start of @peb
• • @len: Data size to read
• • @dst: Address of the destination buffer
• • This could be further optimized if we'd have a subpage read
• • function in the simple code. On NAND which allows subpage reads
• • this would spare quite some time to readout e.g. the VID header of
• • UBI.
• • Notes:

• • @offset + @len are not allowed to be larger than a physical
    

• • erase block. No sanity check done for simplicity reasons.
    

• • To support runtime detected flash this needs to be extended by
• • information about the actual flash geometry, but thats beyond the
• • scope of this effort and for most applications where fast boot is
• • required it is not an issue anyway.
• */

+int nand_spl_read_block(int block, int offset, int len, void *dst) +{

•   int page, read;
  

•   /* Calculate the page number */
  

•   page = offset / CONFIG_SYS_NAND_PAGE_SIZE;
  

•   /* Offset to the start of a flash page */
  

•   offset = offset % CONFIG_SYS_NAND_PAGE_SIZE;
  

•   while (len) {
  

•           /*
  

•            * Non page aligned reads go to the scratch buffer.
  

•            * Page aligned reads go directly to the destination.
  

•            */
  

•           if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) {
  

•                   nand_read_page(block, page, scratch_buf);
  

•                   read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset);
  

•                   memcpy(dst, scratch_buf + offset, read);
  

•                   offset = 0;
  

•           } else {
  

•                   nand_read_page(block, page, dst);
  

•                   read = CONFIG_SYS_NAND_PAGE_SIZE;
  

•           }
  

•           page++;
  

•           len -= read;
  

•           dst += read;
  

•   }
  

•   return 0;
  

+} +#endif diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c index 55f48d3a14..56e86d1760 100644 --- a/drivers/mtd/nand/nand_spl_simple.c +++ b/drivers/mtd/nand/nand_spl_simple.c @@ -209,102 +209,6 @@ static int nand_read_page(int block, int page, void *dst) } #endif

-#ifdef CONFIG_SPL_UBI -/*

• • Temporary storage for non NAND page aligned and non NAND page sized
• • reads. Note: This does not support runtime detected FLASH yet, but
• • that should be reasonably easy to fix by making the buffer large
• • enough :)
• */

-static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];

-/**

• • nand_spl_read_block - Read data from physical eraseblock into a buffer
• • @block: Number of the physical eraseblock
• • @offset: Data offset from the start of @peb
• • @len: Data size to read
• • @dst: Address of the destination buffer
• • This could be further optimized if we'd have a subpage read
• • function in the simple code. On NAND which allows subpage reads
• • this would spare quite some time to readout e.g. the VID header of
• • UBI.
• • Notes:

• • @offset + @len are not allowed to be larger than a physical
    

• • erase block. No sanity check done for simplicity reasons.
    

• • To support runtime detected flash this needs to be extended by
• • information about the actual flash geometry, but thats beyond the
• • scope of this effort and for most applications where fast boot is
• • required it is not an issue anyway.
• */

-int nand_spl_read_block(int block, int offset, int len, void *dst) -{

•   int page, read;
  

•   /* Calculate the page number */
  

•   page = offset / CONFIG_SYS_NAND_PAGE_SIZE;
  

•   /* Offset to the start of a flash page */
  

•   offset = offset % CONFIG_SYS_NAND_PAGE_SIZE;
  

•   while (len) {
  

•           /*
  

•            * Non page aligned reads go to the scratch buffer.
  

•            * Page aligned reads go directly to the destination.
  

•            */
  

•           if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) {
  

•                   nand_read_page(block, page, scratch_buf);
  

•                   read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset);
  

•                   memcpy(dst, scratch_buf + offset, read);
  

•                   offset = 0;
  

•           } else {
  

•                   nand_read_page(block, page, dst);
  

•                   read = CONFIG_SYS_NAND_PAGE_SIZE;
  

•           }
  

•           page++;
  

•           len -= read;
  

•           dst += read;
  

•   }
  

•   return 0;
  

-} -#endif

-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) -{

•   unsigned int block, lastblock;
  

•   unsigned int page;
  

•   /*
  

•    * offs has to be aligned to a page address!
  

•    */
  

•   block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
  

•   page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
  

•   while (block <= lastblock) {
  

•           if (!nand_is_bad_block(block)) {
  

•                   /*
  

•                    * Skip bad blocks
  

•                    */
  

•                   while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
  

•                           nand_read_page(block, page, dst);
  

•                           dst += CONFIG_SYS_NAND_PAGE_SIZE;
  

•                           page++;
  

•                   }
  

•                   page = 0;
  

•           } else {
  

•                   lastblock++;
  

•           }
  

•           block++;
  

•   }
  

•   return 0;
  

-}

/* nand_init() - initialize data to make nand usable by SPL */ void nand_init(void) { @@ -333,3 +237,5 @@ void nand_deselect(void) if (nand_chip.select_chip) nand_chip.select_chip(mtd, -1); }

+#include "nand_spl_loaders.c"

2.11.0

nand_spl_load_image implementation was copied over into three different drivers and now with nand_spl_read_block used for ubispl situation gets even worse. For now use least intrusive solution and #include the same implementation to nand drivers.

Signed-off-by: Ladislav Michl ladis@linux-mips.org Tested-by: Pau Pajuelo ppajuel@gmail.com --- Changes: v2: drop CONFIG_SPL_NAND_LOAD ifdef around nand_spl_load_image as it breaks some boards build (this should be fixed separately anyway)

drivers/mtd/nand/am335x_spl_bch.c | 49 +---------------- drivers/mtd/nand/atmel_nand.c | 30 +---------- drivers/mtd/nand/nand_spl_loaders.c | 104 ++++++++++++++++++++++++++++++++++++ drivers/mtd/nand/nand_spl_simple.c | 98 +-------------------------------- 4 files changed, 110 insertions(+), 171 deletions(-)

diff --git a/drivers/mtd/nand/am335x_spl_bch.c b/drivers/mtd/nand/am335x_spl_bch.c index 5b189a1d8a..e68b4a5b19 100644 --- a/drivers/mtd/nand/am335x_spl_bch.c +++ b/drivers/mtd/nand/am335x_spl_bch.c @@ -198,53 +198,6 @@ static int nand_read_page(int block, int page, void *dst) return 0; }

-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) -{ - unsigned int block, lastblock; - unsigned int page, page_offset; - - /* - * offs has to be aligned to a page address! - */ - block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; - lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; - page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; - page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE; - - while (block <= lastblock) { - if (!nand_is_bad_block(block)) { - /* - * Skip bad blocks - */ - while (page < CONFIG_SYS_NAND_PAGE_COUNT) { - nand_read_page(block, page, dst); - /* - * When offs is not aligned to page address the - * extra offset is copied to dst as well. Copy - * the image such that its first byte will be - * at the dst. - */ - if (unlikely(page_offset)) { - memmove(dst, dst + page_offset, - CONFIG_SYS_NAND_PAGE_SIZE); - dst = (void *)((int)dst - page_offset); - page_offset = 0; - } - dst += CONFIG_SYS_NAND_PAGE_SIZE; - page++; - } - - page = 0; - } else { - lastblock++; - } - - block++; - } - - return 0; -} - /* nand_init() - initialize data to make nand usable by SPL */ void nand_init(void) { @@ -269,3 +222,5 @@ void nand_deselect(void) if (nand_chip.select_chip) nand_chip.select_chip(mtd, -1); } + +#include "nand_spl_loaders.c" diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 21d5d0e70d..7c10bfedc6 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -1380,34 +1380,6 @@ static int nand_read_page(int block, int page, void *dst) } #endif /* CONFIG_SPL_NAND_ECC */

-int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) -{ - unsigned int block, lastblock; - unsigned int page; - - block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; - lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; - page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; - - while (block <= lastblock) { - if (!nand_is_bad_block(block)) { - while (page < CONFIG_SYS_NAND_PAGE_COUNT) { - nand_read_page(block, page, dst); - dst += CONFIG_SYS_NAND_PAGE_SIZE; - page++; - } - - page = 0; - } else { - lastblock++; - } - - block++; - } - - return 0; -} - int at91_nand_wait_ready(struct mtd_info *mtd) { struct nand_chip *this = mtd_to_nand(mtd); @@ -1474,6 +1446,8 @@ void nand_deselect(void) nand_chip.select_chip(mtd, -1); }

+#include "nand_spl_loaders.c" + #else

#ifndef CONFIG_SYS_NAND_BASE_LIST diff --git a/drivers/mtd/nand/nand_spl_loaders.c b/drivers/mtd/nand/nand_spl_loaders.c new file mode 100644 index 0000000000..177c12b581 --- /dev/null +++ b/drivers/mtd/nand/nand_spl_loaders.c @@ -0,0 +1,104 @@ +int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) +{ + unsigned int block, lastblock; + unsigned int page, page_offset; + + /* offs has to be aligned to a page address! */ + block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; + lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; + page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; + page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE; + + while (block <= lastblock) { + if (!nand_is_bad_block(block)) { + /* Skip bad blocks */ + while (page < CONFIG_SYS_NAND_PAGE_COUNT) { + nand_read_page(block, page, dst); + /* + * When offs is not aligned to page address the + * extra offset is copied to dst as well. Copy + * the image such that its first byte will be + * at the dst. + */ + if (unlikely(page_offset)) { + memmove(dst, dst + page_offset, + CONFIG_SYS_NAND_PAGE_SIZE); + dst = (void *)((int)dst - page_offset); + page_offset = 0; + } + dst += CONFIG_SYS_NAND_PAGE_SIZE; + page++; + } + + page = 0; + } else { + lastblock++; + } + + block++; + } + + return 0; +} + +#ifdef CONFIG_SPL_UBI +/* + * Temporary storage for non NAND page aligned and non NAND page sized + * reads. Note: This does not support runtime detected FLASH yet, but + * that should be reasonably easy to fix by making the buffer large + * enough :) + */ +static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE]; + +/** + * nand_spl_read_block - Read data from physical eraseblock into a buffer + * @block: Number of the physical eraseblock + * @offset: Data offset from the start of @peb + * @len: Data size to read + * @dst: Address of the destination buffer + * + * This could be further optimized if we'd have a subpage read + * function in the simple code. On NAND which allows subpage reads + * this would spare quite some time to readout e.g. the VID header of + * UBI. + * + * Notes: + * @offset + @len are not allowed to be larger than a physical + * erase block. No sanity check done for simplicity reasons. + * + * To support runtime detected flash this needs to be extended by + * information about the actual flash geometry, but thats beyond the + * scope of this effort and for most applications where fast boot is + * required it is not an issue anyway. + */ +int nand_spl_read_block(int block, int offset, int len, void *dst) +{ + int page, read; + + /* Calculate the page number */ + page = offset / CONFIG_SYS_NAND_PAGE_SIZE; + + /* Offset to the start of a flash page */ + offset = offset % CONFIG_SYS_NAND_PAGE_SIZE; + + while (len) { + /* + * Non page aligned reads go to the scratch buffer. + * Page aligned reads go directly to the destination. + */ + if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) { + nand_read_page(block, page, scratch_buf); + read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset); + memcpy(dst, scratch_buf + offset, read); + offset = 0; + } else { + nand_read_page(block, page, dst); + read = CONFIG_SYS_NAND_PAGE_SIZE; + } + page++; + len -= read; + dst += read; + } + return 0; +} +#endif diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c index 55f48d3a14..56e86d1760 100644 --- a/drivers/mtd/nand/nand_spl_simple.c +++ b/drivers/mtd/nand/nand_spl_simple.c @@ -209,102 +209,6 @@ static int nand_read_page(int block, int page, void *dst) } #endif

-#ifdef CONFIG_SPL_UBI -/* - * Temporary storage for non NAND page aligned and non NAND page sized - * reads. Note: This does not support runtime detected FLASH yet, but - * that should be reasonably easy to fix by making the buffer large - * enough :) - */ -static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE]; - -/** - * nand_spl_read_block - Read data from physical eraseblock into a buffer - * @block: Number of the physical eraseblock - * @offset: Data offset from the start of @peb - * @len: Data size to read - * @dst: Address of the destination buffer - * - * This could be further optimized if we'd have a subpage read - * function in the simple code. On NAND which allows subpage reads - * this would spare quite some time to readout e.g. the VID header of - * UBI. - * - * Notes: - * @offset + @len are not allowed to be larger than a physical - * erase block. No sanity check done for simplicity reasons. - * - * To support runtime detected flash this needs to be extended by - * information about the actual flash geometry, but thats beyond the - * scope of this effort and for most applications where fast boot is - * required it is not an issue anyway. - */ -int nand_spl_read_block(int block, int offset, int len, void *dst) -{ - int page, read; - - /* Calculate the page number */ - page = offset / CONFIG_SYS_NAND_PAGE_SIZE; - - /* Offset to the start of a flash page */ - offset = offset % CONFIG_SYS_NAND_PAGE_SIZE; - - while (len) { - /* - * Non page aligned reads go to the scratch buffer. - * Page aligned reads go directly to the destination. - */ - if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) { - nand_read_page(block, page, scratch_buf); - read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset); - memcpy(dst, scratch_buf + offset, read); - offset = 0; - } else { - nand_read_page(block, page, dst); - read = CONFIG_SYS_NAND_PAGE_SIZE; - } - page++; - len -= read; - dst += read; - } - return 0; -} -#endif - -int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) -{ - unsigned int block, lastblock; - unsigned int page; - - /* - * offs has to be aligned to a page address! - */ - block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; - lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; - page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; - - while (block <= lastblock) { - if (!nand_is_bad_block(block)) { - /* - * Skip bad blocks - */ - while (page < CONFIG_SYS_NAND_PAGE_COUNT) { - nand_read_page(block, page, dst); - dst += CONFIG_SYS_NAND_PAGE_SIZE; - page++; - } - - page = 0; - } else { - lastblock++; - } - - block++; - } - - return 0; -} - /* nand_init() - initialize data to make nand usable by SPL */ void nand_init(void) { @@ -333,3 +237,5 @@ void nand_deselect(void) if (nand_chip.select_chip) nand_chip.select_chip(mtd, -1); } + +#include "nand_spl_loaders.c"

Hello Ladislav,

Am 01.04.2017 um 17:17 schrieb Ladislav Michl:

Convert IGEP board to use UBI volumes for U-Boot, its environment and kernel. With exception of first four sectors read by SoC BootROM whole NAND is UBI managed.

Signed-off-by: Ladislav Michl ladis@linux-mips.org

board/isee/igep003x/board.c | 17 +++++++++++++++ configs/am335x_igep0033_defconfig | 4 ++++ include/configs/am335x_igep003x.h | 45 +++++++++++++++++++++++---------------- 3 files changed, 48 insertions(+), 18 deletions(-)

Reviewed-by: Heiko Schocherhs@denx.de

Thanks! Nive to see, that UBI (with FASTMAP) is working with SPL!

bye, Heiko

diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c index 5fea7ffaef..9abb4824b5 100644 --- a/board/isee/igep003x/board.c +++ b/board/isee/igep003x/board.c @@ -23,6 +23,9 @@ #include <i2c.h> #include <miiphy.h> #include <cpsw.h> +#include <fdt_support.h> +#include <mtd_node.h> +#include <jffs2/load_kernel.h> #include "board.h"

DECLARE_GLOBAL_DATA_PTR; @@ -104,6 +107,20 @@ int board_init(void) return 0; }

+#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_FDT_FIXUP_PARTITIONS

• static struct node_info nodes[] = {

• { "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
  

• };
• fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));

+#endif

• return 0;

+} +#endif

• #if defined(CONFIG_DRIVER_TI_CPSW) static void cpsw_control(int enabled) {

diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig index 12f04c68f9..71e11da17a 100644 --- a/configs/am335x_igep0033_defconfig +++ b/configs/am335x_igep0033_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -41,9 +42,12 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_MMC_OMAP_HS=y +CONFIG_MTD_UBI_FASTMAP=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_GENERATE_SMBIOS_TABLE is not set diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 348b16f3e8..f7209930d3 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -21,7 +21,7 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK)

-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_SIZE (96 << 10) /* 96 KiB */

/* Make the verbose messages from UBI stop printing */ #define CONFIG_UBI_SILENCE_MSG @@ -67,11 +67,11 @@ "fi;\0" \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \

• "nandroot=ubi0:filesystem rw ubi.mtd=3,2048\0" \

• "nandroot=ubi0:rootfs rw ubi.mtd=1\0" \ "nandrootfstype=ubifs rootwait\0" \

• "nandload=ubi part filesystem 2048; ubifsmount ubi0; " \

• "ubifsload ${loadaddr} ${bootdir}/${bootfile}; " \
  

• "ubifsload ${fdtaddr} ${bootdir}/${dtbfile} \0" \
  

• "nandload=ubi part UBI; " \

• "ubi read ${loadaddr} kernel; " \
  

• "ubi read ${fdtaddr} dtb \0" \
  

  "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${nandroot} " \

@@ -97,12 +97,6 @@ /* NAND support */ #define CONFIG_NAND_OMAP_ELM #define CONFIG_SYS_NAND_ONFI_DETECTION 1 -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0x180000 /* environment starts here */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_OFFSET + CONFIG_SYS_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)

#define CONFIG_MTD_PARTITIONS #define CONFIG_MTD_DEVICE @@ -110,9 +104,7 @@ #define CONFIG_LZO

#define MTDIDS_DEFAULT "nand0=omap2-nand.0" -#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(spl),"\

• 			"1m(uboot),256k(environment),"\
  

• 			"-(filesystem)"
  

+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL),-(UBI)"

/* Unsupported features */ #undef CONFIG_USE_IRQ @@ -120,6 +112,27 @@ /* SPL */ #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds"

+/* UBI configuration */ +#define CONFIG_SPL_UBI 1 +#define CONFIG_SPL_UBI_MAX_VOL_LEBS 256 +#define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024) +#define CONFIG_SPL_UBI_MAX_PEBS 4096 +#define CONFIG_SPL_UBI_VOL_IDS 8 +#define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0 +#define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3 +#define CONFIG_SPL_UBI_LOAD_ARGS_ID 4 +#define CONFIG_SPL_UBI_PEB_OFFSET 4 +#define CONFIG_SPL_UBI_VID_OFFSET 512 +#define CONFIG_SPL_UBI_LEB_START 2048 +#define CONFIG_SPL_UBI_INFO_ADDR 0x88080000

+/* environment organization */ +#define CONFIG_ENV_IS_IN_UBI 1 +#define CONFIG_ENV_UBI_PART "UBI" +#define CONFIG_ENV_UBI_VOLUME "config" +#define CONFIG_ENV_UBI_VOLUME_REDUND "config_r"

+/* NAND config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) @@ -139,8 +152,4 @@ #define CONFIG_SYS_NAND_ECCBYTES 14 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW

-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE

-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000

• #endif /* ! __CONFIG_IGEP003X_H */

Tested-by: Pau Pajuelo ppajuel@gmail.com

2017-04-01 17:18 GMT+02:00 Ladislav Michl ladis@linux-mips.org:

From: Pau Pajuelo ppajuelo@iseebcn.com

The IGEP SMARC AM335x is an industrial processor module with following highlights:

o AM3352 TI processor (Up to AM3359) o Cortex-A8 ARM CPU o SMARC form factor module o Up to 512 MB DDR3 SDRAM / 512 MB FLASH o WiFi a/b/g/n and Bluetooth v4.0 on-board o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board o JTAG debug connector available o Designed for industrial range purposes

Signed-off-by: Pau Pajuelo ppajuelo@iseebcn.com Signed-off-by: Ladislav Michl ladis@linux-mips.org

---

arch/arm/mach-omap2/am33xx/Kconfig | 1 + board/isee/igep003x/board.c | 126 ++++++++++++++++++--- board/isee/igep003x/mux.c | 10 +- ...gep0033_defconfig => am335x_igep003x_defconfig} | 0 include/configs/am335x_igep003x.h | 15 ++- 5 files changed, 133 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 387d488c47..db3c70fe21 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -46,6 +46,7 @@ config TARGET_AM335X_BALTOS

config TARGET_AM335X_IGEP003X bool "Support am335x_igep003x"

•   select BOARD_LATE_INIT
    select DM
    select DM_SERIAL
    select DM_GPIO
  

diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c index 9abb4824b5..2d0ebbf5ef 100644 --- a/board/isee/igep003x/board.c +++ b/board/isee/igep003x/board.c @@ -1,7 +1,7 @@ /*

• • Board functions for IGEP COM AQUILA based boards

• • Board functions for IGEP COM AQUILA and SMARC AM335x based boards

• • Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/

• • Copyright (C) 2013-2017, ISEE 2007 SL - http://www.isee.biz/
  • SPDX-License-Identifier: GPL-2.0+
  */

@@ -26,21 +26,72 @@ #include <fdt_support.h> #include <mtd_node.h> #include <jffs2/load_kernel.h> +#include <environment.h> #include "board.h"

DECLARE_GLOBAL_DATA_PTR;

+/* GPIO0_27 and GPIO0_26 are used to read board revision from IGEP003x boards

• • and control IGEP0034 green and red LEDs.
• • U-boot configures these pins as input pullup to detect board revision:
• • IGEP0034-LITE = 0b00
• • IGEP0034 (FULL) = 0b01
• • IGEP0033 = 0b1X
• */

+#define GPIO_GREEN_REVISION 27 +#define GPIO_RED_REVISION 26

static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;

+/*

• • Routine: get_board_revision
• • Description: Returns the board revision
• */

+static int get_board_revision(void) +{

•   int revision;
  

•   gpio_request(GPIO_GREEN_REVISION, "green_revision");
  

•   gpio_direction_input(GPIO_GREEN_REVISION);
  

•   revision = 2 * gpio_get_value(GPIO_GREEN_REVISION);
  

•   gpio_free(GPIO_GREEN_REVISION);
  

•   gpio_request(GPIO_RED_REVISION, "red_revision");
  

•   gpio_direction_input(GPIO_RED_REVISION);
  

•   revision = revision + gpio_get_value(GPIO_RED_REVISION);
  

•   gpio_free(GPIO_RED_REVISION);
  

•   return revision;
  

+}

#ifdef CONFIG_SPL_BUILD -static const struct ddr_data ddr3_data = { +/* PN H5TQ4G63AFR is equivalent to MT41K256M16HA125*/ +static const struct ddr_data ddr3_igep0034_data = {

•   .datardsratio0 = MT41K256M16HA125E_RD_DQS,
  

•   .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
  

•   .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
  

•   .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
  

+};

+static const struct ddr_data ddr3_igep0034_lite_data = { .datardsratio0 = K4B2G1646EBIH9_RD_DQS, .datawdsratio0 = K4B2G1646EBIH9_WR_DQS, .datafwsratio0 = K4B2G1646EBIH9_PHY_FIFO_WE, .datawrsratio0 = K4B2G1646EBIH9_PHY_WR_DATA, };

-static const struct cmd_control ddr3_cmd_ctrl_data = { +static const struct cmd_control ddr3_igep0034_cmd_ctrl_data = {

•   .cmd0csratio = MT41K256M16HA125E_RATIO,
  

•   .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  

•   .cmd1csratio = MT41K256M16HA125E_RATIO,
  

•   .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  

•   .cmd2csratio = MT41K256M16HA125E_RATIO,
  

•   .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  

+};

+static const struct cmd_control ddr3_igep0034_lite_cmd_ctrl_data = { .cmd0csratio = K4B2G1646EBIH9_RATIO, .cmd0iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,

@@ -51,7 +102,17 @@ static const struct cmd_control ddr3_cmd_ctrl_data = { .cmd2iclkout = K4B2G1646EBIH9_INVERT_CLKOUT, };

-static struct emif_regs ddr3_emif_reg_data = { +static struct emif_regs ddr3_igep0034_emif_reg_data = {

•   .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
  

•   .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
  

•   .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
  

•   .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
  

•   .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
  

•   .zq_config = MT41K256M16HA125E_ZQ_CFG,
  

•   .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
  

+};

+static struct emif_regs ddr3_igep0034_lite_emif_reg_data = { .sdram_config = K4B2G1646EBIH9_EMIF_SDCFG, .ref_ctrl = K4B2G1646EBIH9_EMIF_SDREF, .sdram_tim1 = K4B2G1646EBIH9_EMIF_TIM1, @@ -61,6 +122,22 @@ static struct emif_regs ddr3_emif_reg_data = { .emif_ddr_phy_ctlr_1 = K4B2G1646EBIH9_EMIF_READ_LATENCY, };

+const struct ctrl_ioregs ioregs_igep0034 = {

•   .cm0ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
  

•   .cm1ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
  

•   .cm2ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
  

•   .dt0ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
  

•   .dt1ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
  

+};

+const struct ctrl_ioregs ioregs_igep0034_lite = {

•   .cm0ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .cm1ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .cm2ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .dt0ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .dt1ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

+};

#define OSC (V_OSCK/1000000) const struct dpll_params dpll_ddr = { 400, OSC-1, 1, -1, -1, -1, -1}; @@ -80,18 +157,14 @@ void set_mux_conf_regs(void) enable_board_pin_mux(); }

-const struct ctrl_ioregs ioregs = {

•   .cm0ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .cm1ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .cm2ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .dt0ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

•   .dt1ioctl               = K4B2G1646EBIH9_IOCTRL_VALUE,
  

-};

void sdram_init(void) {

•   config_ddr(400, &ioregs, &ddr3_data,
  

•              &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
  

•   if (get_board_revision() == 1)
  

•           config_ddr(400, &ioregs_igep0034, &ddr3_igep0034_data,
  

•                   &ddr3_igep0034_cmd_ctrl_data, &ddr3_igep0034_emif_reg_data, 0);
  

•   else
  

•           config_ddr(400, &ioregs_igep0034_lite, &ddr3_igep0034_lite_data,
  

•                   &ddr3_igep0034_lite_cmd_ctrl_data, &ddr3_igep0034_lite_emif_reg_data, 0);
  

} #endif

@@ -107,6 +180,26 @@ int board_init(void) return 0; }

+#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

•   switch (get_board_revision()) {
  

•           case 0:
  

•                   setenv("board_name", "igep0034-lite");
  

•                   break;
  

•           case 1:
  

•                   setenv("board_name", "igep0034");
  

•                   break;
  

•           default:
  

•                   setenv("board_name", "igep0033");
  

•                   break;
  

•   }
  

+#endif

•   return 0;
  

+} +#endif

#ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { @@ -180,6 +273,9 @@ int board_eth_init(bd_t *bis) writel((GMII1_SEL_RMII | RMII1_IO_CLK_EN), &cdev->miisel);

•   if (get_board_revision() == 1)
  

•           cpsw_slaves[0].phy_addr = 1;
  

•   rv = cpsw_register(&cpsw_data);
    if (rv < 0)
            printf("Error %d registering CPSW switch\n", rv);
  

diff --git a/board/isee/igep003x/mux.c b/board/isee/igep003x/mux.c index e86277663d..550e3b3197 100644 --- a/board/isee/igep003x/mux.c +++ b/board/isee/igep003x/mux.c @@ -32,7 +32,7 @@ static struct module_pin_mux mmc0_pin_mux[] = { {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */

•   {OFFSET(mcasp0_aclkx), (MODE(4) | RXACTIVE)},           /* MMC0_CD */
  

•   {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)},   /* MMC0_CD */
    {-1},
  

};

@@ -69,6 +69,12 @@ static struct module_pin_mux rmii1_pin_mux[] = { {-1}, };

+static struct module_pin_mux gpio_pin_mux[] = {

•   {OFFSET(gpmc_ad10), (MODE(7) | RXACTIVE | PULLUP_EN)},  /* GPIO0_26 */
  

•   {OFFSET(gpmc_ad11), (MODE(7) | RXACTIVE | PULLUP_EN)},  /* GPIO0_27 */
  

•   {-1},
  

+};

void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); @@ -85,4 +91,6 @@ void enable_board_pin_mux(void) configure_module_pin_mux(mmc0_pin_mux); /* Ethernet pinmux. */ configure_module_pin_mux(rmii1_pin_mux);

•   /* GPIO pinmux. */
  

•   configure_module_pin_mux(gpio_pin_mux);
  

} diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep003x_defconfig similarity index 100% rename from configs/am335x_igep0033_defconfig rename to configs/am335x_igep003x_defconfig diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index f7209930d3..2962f72582 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -34,7 +34,6 @@ DEFAULT_LINUX_BOOT_ENV \ "bootdir=/boot\0" \ "bootfile=zImage\0" \

•   "dtbfile=am335x-base0033.dtb\0" \
    "console=ttyO0,115200n8\0" \
    "mmcdev=0\0" \
    "mmcroot=/dev/mmcblk0p2 rw\0" \
  

@@ -48,7 +47,7 @@ "importbootenv=echo Importing environment from mmc ...; " \ "env import -t ${loadaddr} ${filesize}\0" \ "mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \

•           "load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${dtbfile}\0" \
  

•           "load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
    "mmcboot=mmc dev ${mmcdev}; " \
            "if mmc rescan; then " \
                    "echo SD/MMC found on device ${mmcdev};" \
  

@@ -79,10 +78,20 @@ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "run nandload; " \

•           "bootz ${loadaddr} - ${fdtaddr} \0"
  

•           "bootz ${loadaddr} - ${fdtaddr} \0" \
  

•   "findfdt="\
  

•           "if test ${board_name} = igep0033; then " \
  

•                   "setenv fdtfile am335x-igep-base0033.dtb; fi; " \
  

•           "if test ${board_name} = igep0034; then " \
  

•                   "setenv fdtfile am335x-igep-base0040.dtb; fi; " \
  

•           "if test ${board_name} = igep0034-lite; then " \
  

•                   "setenv fdtfile am335x-igep-base0040-lite.dtb; fi; " \
  

•           "if test ${fdtfile} = ''; then " \
  

•                   "echo WARNING: Could not determine device tree to use; fi; \0"
  

#endif

#define CONFIG_BOOTCOMMAND \

•   "run findfdt;" \
    "run mmcboot;" \
    "run nandboot;"
  
  

-- 2.11.0