[U-Boot] [RFC PATCH 0/8] Add nand_spl support for TI OMAP Beagle
This patch series adds the ability to boot a beagle board from nand without x-loader. A future addition will add mmc boot support.
John Rigby (8): NAND: nand_spl/nand_boot.c: add 16-bit and readid support armv7: add nand_spl support OMAP3: and nand_spl support OMAP3: add dram timing constants from x-loader NAND: omap_gpmc.c: add nand_spl support omap3_beagle: add nand_spl support mkimage: Add OMAP boot image support OMAP3: Add ift target to top level Makefile
Makefile | 9 + arch/arm/cpu/armv7/omap3/board.c | 4 + arch/arm/cpu/armv7/omap3/clock.c | 3 + arch/arm/cpu/armv7/omap3/gpio.c | 5 + arch/arm/cpu/armv7/omap3/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/omap3/mem.c | 2 + arch/arm/cpu/armv7/omap3/sys_info.c | 6 +- arch/arm/cpu/armv7/start.S | 45 ++++++- arch/arm/include/asm/arch-omap3/mem.h | 45 ++++++ board/ti/beagle/beagle_nand_spl.c | 250 ++++++++++++++++++++++++++++++ boards.cfg | 1 + common/image.c | 1 + drivers/mtd/nand/omap_gpmc.c | 36 +++++ include/configs/omap3_beagle.h | 39 +++++ include/image.h | 1 + include/nand.h | 3 + nand_spl/board/ti/beagle/Makefile | 138 ++++++++++++++++ nand_spl/board/ti/beagle/u-boot.lds | 74 +++++++++ nand_spl/nand_boot.c | 134 +++++++++++++--- tools/Makefile | 2 + tools/mkimage.c | 2 + tools/omapimage.c | 226 +++++++++++++++++++++++++++ tools/omapimage.h | 50 ++++++ 23 files changed, 1049 insertions(+), 29 deletions(-) create mode 100644 board/ti/beagle/beagle_nand_spl.c create mode 100644 nand_spl/board/ti/beagle/Makefile create mode 100644 nand_spl/board/ti/beagle/u-boot.lds create mode 100644 tools/omapimage.c create mode 100644 tools/omapimage.h
Some platforms read the nand type to make configuration choices. For example, some versions of OMAP3 Beagle use the NAND type as a hint of the DRAM type.
Turn readid support on with CONFIG_SYS_NAND_BOOT_READID
Add 16-bit nand support. Turn it on with CONFIG_SYS_NAND_BUSWIDTH_16
Signed-off-by: John Rigby john.rigby@linaro.org CC: Scott Wood scootwood@freescale.com --- include/nand.h | 3 + nand_spl/nand_boot.c | 134 ++++++++++++++++++++++++++++++++++++++++--------- 2 files changed, 112 insertions(+), 25 deletions(-)
diff --git a/include/nand.h b/include/nand.h index a452411..3c6237a 100644 --- a/include/nand.h +++ b/include/nand.h @@ -130,6 +130,9 @@ int nand_get_lock_status(nand_info_t *meminfo, loff_t offset); void board_nand_select_device(struct nand_chip *nand, int chip); #endif
+#ifdef CONFIG_SYS_NAND_BOOT_READID +int nand_boot_readid(int *manf_id, int *dev_id); +#endif __attribute__((noreturn)) void nand_boot(void);
#endif diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 76b8566..1ae2cd0 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -27,6 +27,15 @@
static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
+static uint8_t nand_read_byte(struct nand_chip *chip) +{ +#ifndef CONFIG_SYS_NAND_BUSWIDTH_16 + return readb(chip->IO_ADDR_R); +#else + return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); +#endif +} + #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512) /* * NAND command for small page NAND devices (512) @@ -46,6 +55,9 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); /* Set ALE and clear CLE to start address cycle */ /* Column address */ +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16 + offs >>= 1; +#endif this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, @@ -94,6 +106,9 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); /* Set ALE and clear CLE to start address cycle */ /* Column address */ +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16 + offs >>= 1; +#endif this->cmd_ctrl(mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ @@ -128,17 +143,27 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block) { struct nand_chip *this = mtd->priv;
+#ifndef CONFIG_SYS_NAND_BUSWIDTH_16 + bad = 0; nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB); - - /* - * Read one byte - */ if (readb(this->IO_ADDR_R) != 0xff) return 1; - +#else + u16 bad; + nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS & 0xFE, NAND_CMD_READOOB); + bad = cpu_to_le16(readw(this->IO_ADDR_R)); + if (CONFIG_SYS_NAND_BAD_BLOCK_POS & 0x1) + bad >> 8; + if ((bad & 0xff) != 0xff) + return 1; +#endif return 0; }
+#ifndef CONFIG_SYS_NAND_BOOT_ECC_SCRATCH +#define CONFIG_SYS_NAND_BOOT_ECC_SCRATCH 0x10000 +#endif + static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) { struct nand_chip *this = mtd->priv; @@ -222,47 +247,54 @@ static int nand_load(struct mtd_info *mtd, unsigned int offs, }
/* + * Get ready for booting from NAND. This is for platforms + * that need to read nand data or nand chip id's before initializing + * SDRAM. + */ +void nand_boot_init(struct nand_chip *nand_chip, nand_info_t (*nand_info)) +{ + /* + * Init board specific nand support + */ + nand_chip->select_chip = NULL; + nand_info->priv = nand_chip; + nand_chip->IO_ADDR_R = nand_chip->IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; + nand_chip->dev_ready = NULL; /* preset to NULL */ + board_nand_init(nand_chip); + + if (nand_chip->select_chip) + nand_chip->select_chip(nand_info, 0); + +} + +/* * The main entry for NAND booting. It's necessary that SDRAM is already * configured and available since this code loads the main U-Boot image * from NAND into SDRAM and starts it from there. */ -void nand_boot(void) +void nand_boot_tail(struct nand_chip *nand_chip, nand_info_t *nand_info) { - struct nand_chip nand_chip; - nand_info_t nand_info; int ret; __attribute__((noreturn)) void (*uboot)(void);
/* - * Init board specific nand support - */ - nand_chip.select_chip = NULL; - nand_info.priv = &nand_chip; - nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; - nand_chip.dev_ready = NULL; /* preset to NULL */ - board_nand_init(&nand_chip); - - if (nand_chip.select_chip) - nand_chip.select_chip(&nand_info, 0); - - /* * Load U-Boot image from NAND into RAM */ - ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, + ret = nand_load(nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
#ifdef CONFIG_NAND_ENV_DST - nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + nand_load(nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, (uchar *)CONFIG_NAND_ENV_DST);
#ifdef CONFIG_ENV_OFFSET_REDUND - nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, + nand_load(nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE); #endif #endif
- if (nand_chip.select_chip) - nand_chip.select_chip(&nand_info, -1); + if (nand_chip->select_chip) + nand_chip->select_chip(nand_info, -1);
/* * Jump to U-Boot image @@ -270,3 +302,55 @@ void nand_boot(void) uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; (*uboot)(); } + +#ifdef CONFIG_SYS_NAND_BOOT_READID +int nand_boot_readid(int *manf_id, int *dev_id) +{ + struct nand_chip nand_chip; + nand_info_t nand_info; + + nand_boot_init(&nand_chip, &nand_info); + + /* + * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) + * after power-up + */ + nand_chip.cmd_ctrl(&nand_info, NAND_CMD_RESET, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + + if (!nand_chip.dev_ready) { + CONFIG_SYS_NAND_READ_DELAY; + nand_chip.cmd_ctrl(&nand_info, NAND_CMD_STATUS, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + nand_chip.cmd_ctrl(&nand_info, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + while (!(nand_read_byte(&nand_chip) & NAND_STATUS_READY)) + CONFIG_SYS_NAND_READ_DELAY; + } + + /* Send the command for reading device ID */ + nand_chip.cmd_ctrl(&nand_info, NAND_CMD_READID, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + nand_chip.cmd_ctrl(&nand_info, 0x0, NAND_CTRL_ALE | NAND_CTRL_CHANGE); + nand_chip.cmd_ctrl(&nand_info, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + + + /* Read manufacturer and device IDs */ + *manf_id = nand_read_byte(&nand_chip); + *dev_id = nand_read_byte(&nand_chip); + + if (nand_chip.select_chip) + nand_chip.select_chip(&nand_info, -1); + + return 0; +} +#endif + + +/* + * Init the nand subsystem and boot. + */ +void nand_boot(void) +{ + struct nand_chip nand_chip; + nand_info_t nand_info; + + nand_boot_init(&nand_chip, &nand_info); + nand_boot_tail(&nand_chip, &nand_info); +}
On Mon, Dec 27, 2010 at 05:47:01PM -0700, John Rigby wrote:
Some platforms read the nand type to make configuration choices. For example, some versions of OMAP3 Beagle use the NAND type as a hint of the DRAM type.
That seems rather hacky... are you sure it makes sense to use a single U-Boot image across that set of boards?
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 76b8566..1ae2cd0 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -27,6 +27,15 @@
static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
+static uint8_t nand_read_byte(struct nand_chip *chip) +{ +#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
return readb(chip->IO_ADDR_R);+#else
return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));+#endif
Are the endian assumptions in the above appropriate for all hardware?
Converting something away from CPU endianness and then using it as native seems wrong in theory, even if in practice the right bytes end up in the right place.
Unfortunately there seem to be no arch-neutral non-raw native-endian or big-endian I/O accessors in U-Boot. For that matter, we don't know if the NAND controller is native endian or not (e.g. a PCI-based NAND controller in a big-endian system).
I suggest defining CONFIG_SYS_NAND_BUSWIDTH_16LE/CONFIG_SYS_NAND_BUSWIDTH_16BE, and implementing out_be16/in_be16/out_le16/in_le16 on each architecture that needs to use this.
+#ifndef CONFIG_SYS_NAND_BOOT_ECC_SCRATCH +#define CONFIG_SYS_NAND_BOOT_ECC_SCRATCH 0x10000 +#endif
Where is this documented or used?
/*
- Get ready for booting from NAND. This is for platforms
- that need to read nand data or nand chip id's before initializing
- SDRAM.
- */
+void nand_boot_init(struct nand_chip *nand_chip, nand_info_t (*nand_info)) +{
/** Init board specific nand support*/nand_chip->select_chip = NULL;nand_info->priv = nand_chip;nand_chip->IO_ADDR_R = nand_chip->IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
Line length.
nand_chip->dev_ready = NULL; /* preset to NULL */board_nand_init(nand_chip);if (nand_chip->select_chip)nand_chip->select_chip(nand_info, 0);+}
No newline at end of block.
-Scott
On Tue, Jan 04, 2011 at 04:08:29PM -0600, Scott Wood wrote:
On Mon, Dec 27, 2010 at 05:47:01PM -0700, John Rigby wrote:
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 76b8566..1ae2cd0 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -27,6 +27,15 @@
static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
+static uint8_t nand_read_byte(struct nand_chip *chip) +{ +#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
return readb(chip->IO_ADDR_R);+#else
return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));+#endif
I missed that this is a new function, not just adding 16-bit support. This should only be used as the default; if the driver provides its own read_byte that should be used instead.
Are the endian assumptions in the above appropriate for all hardware?
Hmm, it looks like the non-SPL NAND code already does it like this. I guess NAND endianness differing from native endianness just requires a custom read_byte function.
-Scott
Signed-off-by: John Rigby john.rigby@linaro.org --- arch/arm/cpu/armv7/start.S | 45 +++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 44 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 684f2d2..17b86e1 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -35,6 +35,27 @@
.globl _start _start: b reset +#ifdef CONFIG_PRELOADER +/* No exception handlers in preloader */ + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + +_hang: + .word do_hang +/* pad to 64 byte boundary */ + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 +#else ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -54,6 +75,7 @@ _pad: .word 0x12345678 /* now 16*4=64 */ .global _end_vect _end_vect:
+#endif .balignl 16,0xdeadbeef /************************************************************************* * @@ -127,7 +149,7 @@ next: stmia r1!, {r3 - r10} @ copy to target address [r1] cmp r0, r2 @ until source end address [r2] bne next @ loop until equal */ -#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT) +#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_ONENAND_U_BOOT) /* No need to copy/exec the clock code - DPLL adjust already done * in NAND/oneNAND Boot. */ @@ -240,6 +262,13 @@ clbss_l:str r2, [r0] /* clear loop... */ * We are done. Do not return, instead branch to second part of board * initialization, now running from RAM. */ +#ifdef CONFIG_NAND_SPL + ldr r0, _nand_boot_ofs + mov pc, r0 + +_nand_boot_ofs: + .word nand_boot +#else jump_2_ram: ldr r0, _board_init_r_ofs adr r1, _start @@ -253,6 +282,7 @@ jump_2_ram:
_board_init_r_ofs: .word board_init_r - _start +#endif
_rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -269,6 +299,7 @@ _dynsym_start_ofs: * setup memory timing * *************************************************************************/ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: /* * Invalidate L1 I/D @@ -297,6 +328,9 @@ cpu_init_crit: bl lowlevel_init @ go setup pll,mux,memory mov lr, ip @ restore link mov pc, lr @ back to my caller +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +#ifndef CONFIG_PRELOADER /* ************************************************************************* * @@ -419,10 +453,18 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm +#endif /* CONFIG_PRELOADER */
/* * exception handlers */ +#ifdef CONFIG_PRELOADER + .align 5 +do_hang: + ldr sp, _TEXT_BASE /* switch to abort stack */ +1: + bl 1b /* hang and never return */ +#else /* !CONFIG_PRELOADER */ .align 5 undefined_instruction: get_bad_stack @@ -485,3 +527,4 @@ fiq: bl do_fiq
#endif +#endif /* CONFIG_PRELOADER */
Signed-off-by: John Rigby john.rigby@linaro.org --- arch/arm/cpu/armv7/omap3/board.c | 4 ++++ arch/arm/cpu/armv7/omap3/clock.c | 3 +++ arch/arm/cpu/armv7/omap3/gpio.c | 5 +++++ arch/arm/cpu/armv7/omap3/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/omap3/mem.c | 2 ++ arch/arm/cpu/armv7/omap3/sys_info.c | 6 ++++-- 6 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 6c2a132..e0ac010 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -166,6 +166,7 @@ void s_init(void)
try_unlock_memory();
+#ifndef CONFIG_NAND_SPL /* * Right now flushing at low MPU speed. * Need to move after clock init @@ -187,6 +188,7 @@ void s_init(void) */ if (get_device_type() == GP_DEVICE) setup_auxcr(); +#endif /* !CONFIG_NAND_SPL */
set_muxconf_regs(); delay(100); @@ -243,6 +245,7 @@ void abort(void) { }
+#ifndef CONFIG_NAND_SPL #ifdef CONFIG_NAND_OMAP_GPMC /****************************************************************************** * OMAP3 specific command to switch between NAND HW and SW ecc @@ -292,3 +295,4 @@ int checkboard (void) return 0; } #endif /* CONFIG_DISPLAY_BOARDINFO */ +#endif /* CONFIG_NAND_SPL */ diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c index 2238c52..d44d327 100644 --- a/arch/arm/cpu/armv7/omap3/clock.c +++ b/arch/arm/cpu/armv7/omap3/clock.c @@ -34,6 +34,9 @@ #include <environment.h> #include <command.h>
+#ifdef CONFIG_NAND_SPL +#define is_running_in_flash() 0 +#endif /****************************************************************************** * get_sys_clk_speed() - determine reference oscillator speed * based on known 32kHz clock and gptimer. diff --git a/arch/arm/cpu/armv7/omap3/gpio.c b/arch/arm/cpu/armv7/omap3/gpio.c index aeb6066..f276e89 100644 --- a/arch/arm/cpu/armv7/omap3/gpio.c +++ b/arch/arm/cpu/armv7/omap3/gpio.c @@ -40,6 +40,11 @@ #include <asm/io.h> #include <asm/errno.h>
+#ifdef CONFIG_NAND_SPL +/* in the early stage of NAND flash booting, printf() is not available */ +#define printf(fmt, args...) +#endif + static struct gpio_bank gpio_bank_34xx[6] = { { (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX }, { (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX }, diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 109481e..b19e54a 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -35,7 +35,7 @@ _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
-#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_NAND_BOOT) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_NAND_U_BOOT) /************************************************************************** * cpy_clk_code: relocates clock code into SRAM where its safer to execute * R1 = SRAM destination address. diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c index bd914b0..71c138d 100644 --- a/arch/arm/cpu/armv7/omap3/mem.c +++ b/arch/arm/cpu/armv7/omap3/mem.c @@ -79,6 +79,7 @@ static const u32 gpmc_onenand[GPMC_MAX_REG] = {
#endif
+#ifndef CONFIG_NAND_SPL /******************************************************** * mem_ok() - test used to see if timings are correct * for a part. Helps in guessing which part @@ -102,6 +103,7 @@ u32 mem_ok(u32 cs) else return 1; } +#endif
void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, u32 size) diff --git a/arch/arm/cpu/armv7/omap3/sys_info.c b/arch/arm/cpu/armv7/omap3/sys_info.c index 549ac19..2f06a7c 100644 --- a/arch/arm/cpu/armv7/omap3/sys_info.c +++ b/arch/arm/cpu/armv7/omap3/sys_info.c @@ -33,6 +33,7 @@
extern omap3_sysinfo sysinfo; static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; +#ifndef CONFIG_NAND_SPL static char *rev_s[CPU_3XX_MAX_REV] = { "1.0", "2.0", @@ -42,7 +43,6 @@ static char *rev_s[CPU_3XX_MAX_REV] = { "UNKNOWN", "UNKNOWN", "3.1.2"}; - /***************************************************************** * dieid_num_r(void) - read and set die ID *****************************************************************/ @@ -68,6 +68,7 @@ void dieid_num_r(void)
printf("Die ID #%s\n", uid_s); } +#endif /* !CONFIG_NAND_SPL */
/****************************************** * get_cpu_type(void) - extract cpu info @@ -214,7 +215,6 @@ u32 is_running_in_flash(void) { if (get_base() < 4) return 1; /* in FLASH */ - return 0; /* running in SRAM or SDRAM */ }
@@ -259,6 +259,7 @@ u32 get_device_type(void) return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8); }
+#ifndef CONFIG_NAND_SPL #ifdef CONFIG_DISPLAY_CPUINFO /** * Print CPU information @@ -351,3 +352,4 @@ int print_cpuinfo (void) return 0; } #endif /* CONFIG_DISPLAY_CPUINFO */ +#endif /* !CONFIG_NAND_SPL */
Signed-off-by: John Rigby john.rigby@linaro.org --- arch/arm/include/asm/arch-omap3/mem.h | 45 +++++++++++++++++++++++++++++++++ 1 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index f165949..970e8b4 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -54,6 +54,29 @@ enum { #define SDP_SDRC_DLLAB_CTRL ((DLL_ENADLL << 3) | \ (DLL_LOCKDLL << 2) | (DLL_DLLPHASE_90 << 1))
+#define SDP_3430_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50=0x4e2 */ +#define SDP_3430_SDRC_RFR_CTRL_200MHz 0x0005e601 /* 7.8us/5ns - 50=0x5e6 */ + +/* set the 343x-SDRC incoming address convention */ +#if defined(SDRC_B_R_C) +#define B_ALL (0 << 6) /* bank-row-column */ +#elif defined(SDRC_B1_R_B0_C) +#define B_ALL (1 << 6) /* bank1-row-bank0-column */ +#elif defined(SDRC_R_B_C) +#define B_ALL (2 << 6) /* row-bank-column */ +#endif + + +#define SDP_SDRC_MDCFG_0_DDR (0x02584019|B_ALL) +#define SDP_SDRC_MDCFG_0_DDR_MICRON_XM (0x03588019|B_ALL) +#define SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM (0x04590019|B_ALL) + +#define SDP_SDRC_MR_0_DDR 0x00000032 +/* Diabling power down mode using CKE pin */ +#define SDP_SDRC_POWER_POP 0x00000081 + + + /* Infineon part of 3430SDP (165MHz optimized) 6.06ns * ACTIMA * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6 @@ -167,6 +190,28 @@ enum { (NUMONYX_XSR_165 << 0) | (NUMONYX_TXP_165 << 8) | \ (NUMONYX_TWTR_165 << 16))
+/* Micron part (200MHz optimized) 5 ns + */ +#define MICRON_TDAL_200 6 +#define MICRON_TDPL_200 3 +#define MICRON_TRRD_200 2 +#define MICRON_TRCD_200 3 +#define MICRON_TRP_200 3 +#define MICRON_TRAS_200 8 +#define MICRON_TRC_200 11 +#define MICRON_TRFC_200 15 +#define MICRON_V_ACTIMA_200 ((MICRON_TRFC_200 << 27) | (MICRON_TRC_200 << 22) | (MICRON_TRAS_200 << 18) \ + | (MICRON_TRP_200 << 15) | (MICRON_TRCD_200 << 12) |(MICRON_TRRD_200 << 9) | \ + (MICRON_TDPL_200 << 6) | (MICRON_TDAL_200)) + +#define MICRON_TWTR_200 2 +#define MICRON_TCKE_200 4 +#define MICRON_TXP_200 2 +#define MICRON_XSR_200 23 +#define MICRON_V_ACTIMB_200 ((MICRON_TCKE_200 << 12) | (MICRON_XSR_200 << 0)) | \ + (MICRON_TXP_200 << 8) | (MICRON_TWTR_200 << 16) + + #ifdef CONFIG_OMAP3_INFINEON_DDR #define V_ACTIMA_165 INFINEON_V_ACTIMA_165 #define V_ACTIMB_165 INFINEON_V_ACTIMB_165
Signed-off-by: John Rigby john.rigby@linaro.org CC: Scott Wood scootwood@freescale.com --- drivers/mtd/nand/omap_gpmc.c | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 99b9cef..4c76544 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -29,6 +29,28 @@ #include <linux/mtd/nand_ecc.h> #include <nand.h>
+#ifdef CONFIG_NAND_SPL +/* in the early stage of NAND flash booting, printf() is not available */ +#define printf(fmt, args...) + +static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + int i; + struct nand_chip *chip = mtd->priv; + +#ifndef CONFIG_SYS_NAND_BUSWIDTH_16 + for (i = 0; i < len; i++) + buf[i] = readb(chip->IO_ADDR_R); +#else + u16 *p = (u16 *) buf; + + len >>= 1; + for (i = 0; i < len; i++) + p[i] = readw(chip->IO_ADDR_R); +#endif +} +#endif + static uint8_t cs; static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT;
@@ -224,6 +246,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) } }
+#ifndef CONFIG_NAND_SPL /* * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc. * The default is to come up on s/w ecc @@ -280,6 +303,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS; } +#endif
/* * Board-specific NAND initialization. The following members of the @@ -337,8 +361,20 @@ int board_nand_init(struct nand_chip *nand) nand->options |= NAND_BUSWIDTH_16;
nand->chip_delay = 100; +#ifndef CONFIG_NAND_SPL /* Default ECC mode */ nand->ecc.mode = NAND_ECC_SOFT; +#else + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.layout = &hw_nand_oob; + nand->ecc.size = 512; + nand->ecc.bytes = 3; + nand->ecc.hwctl = omap_enable_hwecc; + nand->ecc.correct = omap_correct_data; + nand->ecc.calculate = omap_calculate_ecc; + nand->read_buf = nand_read_buf; + omap_hwecc_init(nand); +#endif
return 0; }
On Mon, Dec 27, 2010 at 05:47:05PM -0700, John Rigby wrote:
CC: Scott Wood scootwood@freescale.com
It's "scottwood", not "scootwood".
+static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{
- int i;
- struct nand_chip *chip = mtd->priv;
+#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
- for (i = 0; i < len; i++)
buf[i] = readb(chip->IO_ADDR_R);+#else
- u16 *p = (u16 *) buf;
- len >>= 1;
- for (i = 0; i < len; i++)
p[i] = readw(chip->IO_ADDR_R);+#endif +} +#endif
This looks like a duplication of the default read_buf implementations in nand_base.c -- they should go in nand_boot.c with an #ifdef to keep it from increasing the size of any implementation that overrides it.
+#ifndef CONFIG_NAND_SPL /* Default ECC mode */ nand->ecc.mode = NAND_ECC_SOFT; +#else
nand->ecc.mode = NAND_ECC_HW;nand->ecc.layout = &hw_nand_oob;nand->ecc.size = 512;nand->ecc.bytes = 3;nand->ecc.hwctl = omap_enable_hwecc;nand->ecc.correct = omap_correct_data;nand->ecc.calculate = omap_calculate_ecc;- nand->read_buf = nand_read_buf;
omap_hwecc_init(nand);+#endif
Indent with tabs.
-Scott
Signed-off-by: John Rigby john.rigby@linaro.org --- board/ti/beagle/beagle_nand_spl.c | 250 +++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/omap3_beagle.h | 39 ++++++ nand_spl/board/ti/beagle/Makefile | 138 +++++++++++++++++++ nand_spl/board/ti/beagle/u-boot.lds | 74 ++++++++++ 5 files changed, 502 insertions(+), 0 deletions(-) create mode 100644 board/ti/beagle/beagle_nand_spl.c create mode 100644 nand_spl/board/ti/beagle/Makefile create mode 100644 nand_spl/board/ti/beagle/u-boot.lds
diff --git a/board/ti/beagle/beagle_nand_spl.c b/board/ti/beagle/beagle_nand_spl.c new file mode 100644 index 0000000..4b4ebde --- /dev/null +++ b/board/ti/beagle/beagle_nand_spl.c @@ -0,0 +1,250 @@ +/* + * (C) Copyright 2010 + * Linaro <www.linaro.org> + * John Rigby john.rigby@linaro.org + * + * Adapted from x-loader omap3530beagle.c: + * (C) Copyright 2006 + * Texas Instruments, <www.ti.com> + * Jian Zhang jzhang@ti.com + * Richard Woodruff r-woodruff2@ti.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/arch/gpio.h> +#include <asm/arch/cpu.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/io.h> +#include <asm/mach-types.h> +#include "beagle.h" + +void board_init_f(unsigned long bootflag) +{ + nand_boot(); +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_BEAGLE(); +} + +/* + * beagle_identify + * Description: Detect if we are running on a Beagle revision Ax/Bx, + * C1/2/3, C4 or D. This can be done by reading + * the level of GPIO173, GPIO172 and GPIO171. This should + * result in + * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx + * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 + * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 + * GPIO173, GPIO172, GPIO171: 0 0 0 => XM + * + */ +int beagle_revision(void) +{ + int rev; + + omap_request_gpio(171); + omap_request_gpio(172); + omap_request_gpio(173); + omap_set_gpio_direction(171, 1); + omap_set_gpio_direction(172, 1); + omap_set_gpio_direction(173, 1); + + rev = omap_get_gpio_datain(173) << 2 | + omap_get_gpio_datain(172) << 1 | + omap_get_gpio_datain(171); + omap_free_gpio(171); + omap_free_gpio(172); + omap_free_gpio(173); + + return rev; +} + +static const u32 gpmc_m_nand[GPMC_MAX_REG] = { + M_NAND_GPMC_CONFIG1, + M_NAND_GPMC_CONFIG2, + M_NAND_GPMC_CONFIG3, + M_NAND_GPMC_CONFIG4, + M_NAND_GPMC_CONFIG5, + M_NAND_GPMC_CONFIG6, 0 +}; + +static void gpmc_nand_init(void) +{ + gpmc_cfg = (struct gpmc *)GPMC_BASE; + const u32 *gpmc_config = NULL; + u32 base = 0; + u32 size = 0; + u32 config = 0; + + /* global settings */ + writel(0, &gpmc_cfg->irqenable); /* isr's sources masked */ + writel(0, &gpmc_cfg->timeout_control);/* timeout disable */ + + config = readl(&gpmc_cfg->config); + config &= (~0xf00); + writel(config, &gpmc_cfg->config); + + /* + * Disable the GPMC0 config set by ROM code + * It conflicts with our MPDB (both at 0x08000000) + */ + writel(0, &gpmc_cfg->cs[0].config7); + sdelay(1000); + + gpmc_config = gpmc_m_nand; + + base = PISMO1_NAND_BASE; + size = PISMO1_NAND_SIZE; + enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size); +} + +#define MICRON_DDR 0 +#define NUMONYX_MCP 1 +int identify_xm_ddr(void) +{ + int mfr, id; + + gpmc_nand_init(); + + sdelay(2000); + + nand_boot_readid(&mfr, &id); + if (mfr == 0) + return MICRON_DDR; + if ((mfr == 0x20) && (id == 0xba)) + return NUMONYX_MCP; + return MICRON_DDR; +} + +void mem_init(void) +{ + struct sdrc *sdrc_base = (struct sdrc *)OMAP34XX_SDRC_BASE; + struct sdrc_actim *sdrc_actim_base0 = + (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE; + struct sdrc_actim *sdrc_actim_base1 = + (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE; + + /* reset sdrc controller */ + writel(SOFTRESET, &sdrc_base->sysconfig); + wait_on_value(RESETDONE, RESETDONE, &sdrc_base->status, + 12000000); + writel(0, &sdrc_base->sysconfig); + + /* setup sdrc to ball mux */ + writel(SDRC_SHARING, &sdrc_base->sharing); + + switch(beagle_revision()) { + case REVISION_C4: + if (identify_xm_ddr() == NUMONYX_MCP) { + writel(0x4, &sdrc_base->cs_cfg); /* 512MB/bank */ + writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, &sdrc_base->cs[0].mcfg); + writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, &sdrc_base->cs[1].mcfg); + writel(NUMONYX_V_ACTIMA_165, &sdrc_actim_base0->ctrla); + writel(NUMONYX_V_ACTIMB_165, &sdrc_actim_base0->ctrlb); + writel(NUMONYX_V_ACTIMA_165, &sdrc_actim_base1->ctrla); + writel(NUMONYX_V_ACTIMB_165, &sdrc_actim_base1->ctrlb); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[0].rfr_ctrl); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[1].rfr_ctrl); + } else { + writel(0x1, &sdrc_base->cs_cfg); /* 128MB/bank */ + writel(SDP_SDRC_MDCFG_0_DDR, &sdrc_base->cs[0].mcfg); + writel(SDP_SDRC_MDCFG_0_DDR, &sdrc_base->cs[1].mcfg); + writel(MICRON_V_ACTIMA_165, &sdrc_actim_base0->ctrla); + writel(MICRON_V_ACTIMB_165, &sdrc_actim_base0->ctrlb); + writel(MICRON_V_ACTIMA_165, &sdrc_actim_base1->ctrla); + writel(MICRON_V_ACTIMB_165, &sdrc_actim_base1->ctrlb); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[0].rfr_ctrl); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[1].rfr_ctrl); + } + break; + case REVISION_XM: + if (identify_xm_ddr() == MICRON_DDR) { + writel(0x2, &sdrc_base->cs_cfg); /* 256MB/bank */ + writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, &sdrc_base->cs[0].mcfg); + writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, &sdrc_base->cs[1].mcfg); + writel(MICRON_V_ACTIMA_200, &sdrc_actim_base0->ctrla); + writel(MICRON_V_ACTIMB_200, &sdrc_actim_base0->ctrlb); + writel(MICRON_V_ACTIMA_200, &sdrc_actim_base1->ctrla); + writel(MICRON_V_ACTIMB_200, &sdrc_actim_base1->ctrlb); + writel(SDP_3430_SDRC_RFR_CTRL_200MHz, &sdrc_base->cs[0].rfr_ctrl); + writel(SDP_3430_SDRC_RFR_CTRL_200MHz, &sdrc_base->cs[1].rfr_ctrl); + } else { + writel(0x4, &sdrc_base->cs_cfg); /* 512MB/bank */ + writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, &sdrc_base->cs[0].mcfg); + writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, &sdrc_base->cs[1].mcfg); + writel(NUMONYX_V_ACTIMA_165, &sdrc_actim_base0->ctrla); + writel(NUMONYX_V_ACTIMB_165, &sdrc_actim_base0->ctrlb); + writel(NUMONYX_V_ACTIMA_165, &sdrc_actim_base1->ctrla); + writel(NUMONYX_V_ACTIMB_165, &sdrc_actim_base1->ctrlb); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[0].rfr_ctrl); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[1].rfr_ctrl); + } + break; + default: + writel(0x1, &sdrc_base->cs_cfg); /* 128MB/bank */ + writel(SDP_SDRC_MDCFG_0_DDR, &sdrc_base->cs[0].mcfg); + writel(SDP_SDRC_MDCFG_0_DDR, &sdrc_base->cs[1].mcfg); + writel(MICRON_V_ACTIMA_165, &sdrc_actim_base0->ctrla); + writel(MICRON_V_ACTIMB_165, &sdrc_actim_base0->ctrlb); + writel(MICRON_V_ACTIMA_165, &sdrc_actim_base1->ctrla); + writel(MICRON_V_ACTIMB_165, &sdrc_actim_base1->ctrlb); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[0].rfr_ctrl); + writel(SDP_3430_SDRC_RFR_CTRL_165MHz, &sdrc_base->cs[1].rfr_ctrl); + } + + writel(SDP_SDRC_POWER_POP, &sdrc_base->power); + + /* init sequence for mDDR/mSDR using manual commands (DDR is different) */ + writel(CMD_NOP, &sdrc_base->cs[0].manual); + writel(CMD_NOP, &sdrc_base->cs[1].manual); + + sdelay(5000); + + writel(CMD_PRECHARGE, &sdrc_base->cs[0].manual); + writel(CMD_PRECHARGE, &sdrc_base->cs[1].manual); + + writel(CMD_AUTOREFRESH, &sdrc_base->cs[0].manual); + writel(CMD_AUTOREFRESH, &sdrc_base->cs[1].manual); + + writel(CMD_AUTOREFRESH, &sdrc_base->cs[0].manual); + writel(CMD_AUTOREFRESH, &sdrc_base->cs[1].manual); + + /* set mr0 */ + writel(SDP_SDRC_MR_0_DDR, &sdrc_base->cs[0].mr); + writel(SDP_SDRC_MR_0_DDR, &sdrc_base->cs[1].mr); + + /* set up dll */ + writel(SDP_SDRC_DLLAB_CTRL, &sdrc_base->dlla_ctrl); + sdelay(0x2000); /* give time to lock */ + + return; +} diff --git a/boards.cfg b/boards.cfg index 94b8745..5f2b613 100644 --- a/boards.cfg +++ b/boards.cfg @@ -115,6 +115,7 @@ am3517_evm arm armv7 am3517evm logicpd omap3_zoom1 arm armv7 zoom1 logicpd omap3 omap3_zoom2 arm armv7 zoom2 logicpd omap3 omap3_beagle arm armv7 beagle ti omap3 +omap3_beagle_nand arm armv7 beagle ti omap3 omap3_beagle:NAND_U_BOOT omap3_evm arm armv7 evm ti omap3 omap3_sdp3430 arm armv7 sdp3430 ti omap3 devkit8000 arm armv7 devkit8000 timll omap3 diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index f73d133..fd8389d 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -41,14 +41,23 @@
#define CONFIG_SDRC /* The chip has SDRC controller */
+/* The 343x-SDRC incoming address convention is row bank column */ +#define SDRC_R_B_C 1 + #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h>
+#define CONFIG_SYS_NAND_SPL_TEXT_BASE 0x40200800 +#define CONFIG_SYS_NAND_SPL_PAD_TO 0x40204800 +#define CONFIG_SYS_TEXT_BASE 0x80008000 + +#ifndef CONFIG_NAND_SPL /* * Display CPU and Board information */ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1 +#endif
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ @@ -79,6 +88,10 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) /* initial data */
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif + /* * Hardware drivers */ @@ -92,6 +105,9 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#ifdef CONFIG_NAND_SPL +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif
/* * select serial console configuration @@ -177,6 +193,29 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ +#ifdef CONFIG_NAND_SPL +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#define CONFIG_SYS_NAND_BUSWIDTH_16 1 +#define CONFIG_SYS_NAND_BOOT_READID 16 +#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) +#define CONFIG_SYS_NAND_5_ADDR_CYCLE 1 +#define CONFIG_SYS_NAND_ECCPOS {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12} +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x0080000 /* Leaving first 4 blocks for SPL */ +#define CONFIG_SYS_NAND_U_BOOT_SIZE (0x0160000-CONFIG_SYS_NAND_U_BOOT_OFFS) +/* offset from beginning of sdram of a safe scratch */ +#define CONFIG_SYS_NAND_BOOT_ECC_SCRATCH (1 << 20) +#endif #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" diff --git a/nand_spl/board/ti/beagle/Makefile b/nand_spl/board/ti/beagle/Makefile new file mode 100644 index 0000000..6bc0ac7 --- /dev/null +++ b/nand_spl/board/ti/beagle/Makefile @@ -0,0 +1,138 @@ +# +# (C) Copyright 2006-2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_NAND_SPL = y + +include $(TOPDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL + +SOBJS = start.o lowlevel_init.o +COBJS = board.o clock.o gpio.o mem.o omap_gpmc.o ns16550.o \ + beagle_nand_spl.o nand_boot.o syslib.o sys_info.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin \ + $(nandobj)u-boot-spl-16k.bin + +all: $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_NAND_SPL_PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +# from drivers/mtd/nand directory +$(obj)omap_gpmc.c: + @rm -f $@ + @ln -s $(TOPDIR)/drivers/mtd/nand/omap_gpmc.c $@ + +# from nand_spl directory +$(obj)nand_boot.c: + @rm -f $@ + @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@ + +# from drivers/serial directory +$(obj)ns16550.c: + @rm -f $@ + @ln -sf $(TOPDIR)/drivers/serial/ns16550.c $@ + +# from cpu directory +$(obj)start.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/start.S $@ + +$(obj)board.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/omap3/board.c $@ + +$(obj)clock.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/omap3/clock.c $@ + +$(obj)gpio.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/omap3/gpio.c $@ + +$(obj)lowlevel_init.S: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/omap3/lowlevel_init.S $@ + +$(obj)mem.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/omap3/mem.c $@ + +$(obj)syslib.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/syslib.c $@ + +$(obj)sys_info.c: + @rm -f $@ + ln -s $(TOPDIR)/arch/arm/cpu/armv7/omap3/sys_info.c $@ + +# from board directory +$(obj)beagle.h: + @rm -f $(obj)beagle.h + ln -s $(TOPDIR)/board/ti/beagle/beagle.h $@ + +$(obj)beagle_nand_spl.c: $(obj)beagle.h + @rm -f $@ + ln -s $(TOPDIR)/board/ti/beagle/beagle_nand_spl.c $@ + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/ti/beagle/u-boot.lds b/nand_spl/board/ti/beagle/u-boot.lds new file mode 100644 index 0000000..bff721b --- /dev/null +++ b/nand_spl/board/ti/beagle/u-boot.lds @@ -0,0 +1,74 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, garyj@denx.de + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0; + + . = ALIGN(4); + .text : + { + start.o (.text) + nand_boot.o (.text) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { + *(.data) + __datarel_start = .; + *(.data.rel) + __datarelrolocal_start = .; + *(.data.rel.ro.local) + __datarellocal_start = .; + *(.data.rel.local) + __datarelro_start = .; + *(.data.rel.ro) + } + + . = ALIGN(4); + __rel_dyn_start = .; + __rel_dyn_end = .; + __dynsym_start = .; + + __got_start = .; + . = ALIGN(4); + .got : { *(.got) } + + __got_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +}
Hello John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote: < snip >
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
How big is the spl now? For the OMAP4 spl, using '-ffunction-sections' and '--gc-sections' reduced the image size by 40% and helped it fit into the SRAM bugdet. I am sure your nand_spl is already fitting in the SRAM bugdet. But these flags may help reduce the size further. Do you want to try it?
Best regards, Aneesh
On 28.12.2010 07:50, Aneesh V wrote:
Hello John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote: < snip>
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
How big is the spl now? For the OMAP4 spl, using '-ffunction-sections' and '--gc-sections' reduced the image size by 40% and helped it fit into the SRAM bugdet. I am sure your nand_spl is already fitting in the SRAM bugdet. But these flags may help reduce the size further. Do you want to try it?
Applying this patch series and building with gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) I get
./MAKEALL omap3_beagle_nand
nand_boot.c: In function 'nand_boot':
nand_boot.c:356: warning: 'noreturn' function does return
mkimage.c: In function ‘main’:
mkimage.c:159: warning: implicit declaration of function ‘init_omap_image_type’
ll u-boot-spl.ift
12580 u-boot-spl.ift
Using gcc version 4.5.1 (Sourcery G++ Lite 2010.09-50) results in the same warnings and
ll u-boot-spl.ift
12360 u-boot-spl.ift
Thanks
Dirk
On Tue, Dec 28, 2010 at 12:49 AM, Dirk Behme dirk.behme@googlemail.com wrote:
On 28.12.2010 07:50, Aneesh V wrote:
Hello John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote: < snip>
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
How big is the spl now? For the OMAP4 spl, using '-ffunction-sections' and '--gc-sections' reduced the image size by 40% and helped it fit into the SRAM bugdet. I am sure your nand_spl is already fitting in the SRAM bugdet. But these flags may help reduce the size further. Do you want to try it?
Applying this patch series and building with gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) I get
> ./MAKEALL omap3_beagle_nand
nand_boot.c: In function 'nand_boot':
nand_boot.c:356: warning: 'noreturn' function does return
mkimage.c: In function ‘main’:
mkimage.c:159: warning: implicit declaration of function ‘init_omap_image_type’
> ll u-boot-spl.ift 12580 u-boot-spl.ift
Using gcc version 4.5.1 (Sourcery G++ Lite 2010.09-50) results in the same warnings and
Thanks, Dirk. I will fix these in the next version.
On Mon, Dec 27, 2010 at 11:50 PM, Aneesh V aneesh@ti.com wrote:
Hello John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote: < snip >
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
How big is the spl now? For the OMAP4 spl, using '-ffunction-sections' and '--gc-sections' reduced the image size by 40% and helped it fit into the SRAM bugdet. I am sure your nand_spl is already fitting in the SRAM bugdet. But these flags may help reduce the size further. Do you want to try it?
It is about 12K. I will try the additional flags and see what difference they make and include them in the next version.
On Wednesday 29 December 2010 05:56 AM, John Rigby wrote:
On Mon, Dec 27, 2010 at 11:50 PM, Aneesh Vaneesh@ti.com wrote:
Hello John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote: < snip>
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
How big is the spl now? For the OMAP4 spl, using '-ffunction-sections' and '--gc-sections' reduced the image size by 40% and helped it fit into the SRAM bugdet. I am sure your nand_spl is already fitting in the SRAM bugdet. But these flags may help reduce the size further. Do you want to try it?
It is about 12K. I will try the additional flags and see what
That's impressive. I think you won't need those flags then. the MMC spl for OMAP4 was much bigger(37 KB without --gc-sections and 22 KB with --gc-sections). I think the main difference is that for MMC spl I am using the u-boot MMC driver where as for nand spl you seem to be using a driver tailor made for the spl.
BTW, Is there a good way to know the contribution of each file/function to the final image size. I couldn't find any suitable option in 'ld'. With RVCT this was much easier.
On Wed, Dec 29, 2010 at 11:07:08AM +0530, Aneesh V wrote:
On Wednesday 29 December 2010 05:56 AM, John Rigby wrote:
On Mon, Dec 27, 2010 at 11:50 PM, Aneesh Vaneesh@ti.com wrote:
How big is the spl now? For the OMAP4 spl, using '-ffunction-sections' and '--gc-sections' reduced the image size by 40% and helped it fit into the SRAM bugdet. I am sure your nand_spl is already fitting in the SRAM bugdet. But these flags may help reduce the size further. Do you want to try it?
It is about 12K. I will try the additional flags and see what
That's impressive. I think you won't need those flags then.
A lot of the NAND SPLs have to fit in 4K. :-)
-Scott
Hi John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
Signed-off-by: John Rigbyjohn.rigby@linaro.org
+void board_init_f(unsigned long bootflag) +{
- nand_boot();
+}
I see that you have added a call to nand_boot() in start.S too. Which is the intended one? If we jump to nand_boot() here bss will not be cleared, right?
Also, I see potential issues in start.S that will prevent bss setup for PRELOADERs. I will correct these in my patch.
Best regards, Aneesh
On Fri, Jan 7, 2011 at 11:33 PM, Aneesh V aneesh@ti.com wrote:
Hi John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
Signed-off-by: John Rigbyjohn.rigby@linaro.org
+void board_init_f(unsigned long bootflag) +{
- nand_boot();
+}
I see that you have added a call to nand_boot() in start.S too. Which is the intended one? If we jump to nand_boot() here bss will not be cleared, right?
Also, I see potential issues in start.S that will prevent bss setup for PRELOADERs. I will correct these in my patch.
Best regards, Aneesh
The call to nand_boot in board_init_f makes sense for platforms where the spl code does not need to be relocated because it has been loaded into SRAM by a mask boot rom. The later nand_boot called from start.S is for the traditional nand_spl case where you are typically running in a 4K nand controller buffer so the code needs to be relocated to dram after dram init.
Of course my only testing has been on OMAP3 which fits the first case. I'm not sure if the second case even matters. The arm7 platforms I know about all have rom boot loaders and large enough SRAM to run the spl u-boot in (OMAP[34]) or have boot headers that can be used to init dram before loading a full u-boot into dram (i.mx5[13]).
Also, I was thinking that BSS would not be used in PRELOADERs but of the large SRAM case it certainly would be useful to have BSS.
This is all new territory since previously all platforms using nand_spl were of the small sram variety.
John
John, On Saturday 08 January 2011 12:16 PM, John Rigby wrote:
On Fri, Jan 7, 2011 at 11:33 PM, Aneesh Vaneesh@ti.com wrote:
Hi John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
Signed-off-by: John Rigbyjohn.rigby@linaro.org
+void board_init_f(unsigned long bootflag) +{
nand_boot();+}
I see that you have added a call to nand_boot() in start.S too. Which is the intended one? If we jump to nand_boot() here bss will not be cleared, right?
Also, I see potential issues in start.S that will prevent bss setup for PRELOADERs. I will correct these in my patch.
Best regards, Aneesh
The call to nand_boot in board_init_f makes sense for platforms where the spl code does not need to be relocated because it has been loaded into SRAM by a mask boot rom. The later nand_boot called from start.S is for the traditional nand_spl case where you are typically running in a 4K nand controller buffer so the code needs to be relocated to dram after dram init.
Of course my only testing has been on OMAP3 which fits the first case. I'm not sure if the second case even matters. The arm7 platforms I know about all have rom boot loaders and large enough SRAM to run the spl u-boot in (OMAP[34]) or have boot headers that can be used to init dram before loading a full u-boot into dram (i.mx5[13]).
Also, I was thinking that BSS would not be used in PRELOADERs but of the large SRAM case it certainly would be useful to have BSS.
Agree. So, how about this? 1. Call relocate_code() in board_init_f() with destination address same as TEXT_BASE 2. start.S skips the relocation, clears the bss(this needs to be fixed) and calls board_init_r 3. Call nand_boot() in board_init_r
This is what I am planning to do for OMAP4 preloader.
This is all new territory since previously all platforms using nand_spl were of the small sram variety.
John
Thanks, Aneesh
On Sat, Jan 8, 2011 at 1:33 AM, Aneesh V aneesh@ti.com wrote:
John, On Saturday 08 January 2011 12:16 PM, John Rigby wrote:
On Fri, Jan 7, 2011 at 11:33 PM, Aneesh Vaneesh@ti.com wrote:
Hi John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
Signed-off-by: John Rigbyjohn.rigby@linaro.org
+void board_init_f(unsigned long bootflag) +{
- nand_boot();
+}
I see that you have added a call to nand_boot() in start.S too. Which is the intended one? If we jump to nand_boot() here bss will not be cleared, right?
Also, I see potential issues in start.S that will prevent bss setup for PRELOADERs. I will correct these in my patch.
Best regards, Aneesh
The call to nand_boot in board_init_f makes sense for platforms where the spl code does not need to be relocated because it has been loaded into SRAM by a mask boot rom. The later nand_boot called from start.S is for the traditional nand_spl case where you are typically running in a 4K nand controller buffer so the code needs to be relocated to dram after dram init.
Of course my only testing has been on OMAP3 which fits the first case. I'm not sure if the second case even matters. The arm7 platforms I know about all have rom boot loaders and large enough SRAM to run the spl u-boot in (OMAP[34]) or have boot headers that can be used to init dram before loading a full u-boot into dram (i.mx5[13]).
Also, I was thinking that BSS would not be used in PRELOADERs but of the large SRAM case it certainly would be useful to have BSS.
Agree. So, how about this?
- Call relocate_code() in board_init_f() with destination address same
as TEXT_BASE 2. start.S skips the relocation, clears the bss(this needs to be fixed) and calls board_init_r 3. Call nand_boot() in board_init_r
This is what I am planning to do for OMAP4 preloader.
Sounds good to me.
Hopefully in the next couple of days I will have time to send a new series of my own. Then we need to combine the two. So there is one unified series for proposing for acceptance.
John
Signed-off-by: John Rigby john.rigby@linaro.org --- common/image.c | 1 + include/image.h | 1 + tools/Makefile | 2 + tools/mkimage.c | 2 + tools/omapimage.c | 226 +++++++++++++++++++++++++++++++++++++++++++++++++++++ tools/omapimage.h | 50 ++++++++++++ 6 files changed, 282 insertions(+), 0 deletions(-) create mode 100644 tools/omapimage.c create mode 100644 tools/omapimage.h
diff --git a/common/image.c b/common/image.c index f63a2ff..4198d76 100644 --- a/common/image.c +++ b/common/image.c @@ -141,6 +141,7 @@ static const table_entry_t uimage_type[] = { { IH_TYPE_FLATDT, "flat_dt", "Flat Device Tree", }, { IH_TYPE_KWBIMAGE, "kwbimage", "Kirkwood Boot Image",}, { IH_TYPE_IMXIMAGE, "imximage", "Freescale i.MX Boot Image",}, + { IH_TYPE_OMAPIMAGE, "omapimage", "TI OMAP CH/GP Boot Image",}, { -1, "", "", }, };
diff --git a/include/image.h b/include/image.h index 005e0d2..f74e2b9 100644 --- a/include/image.h +++ b/include/image.h @@ -157,6 +157,7 @@ #define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */ #define IH_TYPE_KWBIMAGE 9 /* Kirkwood Boot Image */ #define IH_TYPE_IMXIMAGE 10 /* Freescale IMXBoot Image */ +#define IH_TYPE_OMAPIMAGE 11 /* TI OMAP Config Header Image */
/* * Compression Types diff --git a/tools/Makefile b/tools/Makefile index 623f908..a1c4ed7 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -84,6 +84,7 @@ OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o OBJ_FILES-$(CONFIG_INCA_IP) += inca-swap-bytes.o NOPED_OBJ_FILES-y += kwbimage.o NOPED_OBJ_FILES-y += imximage.o +NOPED_OBJ_FILES-y += omapimage.o NOPED_OBJ_FILES-y += mkimage.o OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o NOPED_OBJ_FILES-y += os_support.o @@ -180,6 +181,7 @@ $(obj)mkimage$(SFX): $(obj)crc32.o \ $(obj)fit_image.o \ $(obj)image.o \ $(obj)imximage.o \ + $(obj)omapimage.o \ $(obj)kwbimage.o \ $(obj)md5.o \ $(obj)mkimage.o \ diff --git a/tools/mkimage.c b/tools/mkimage.c index f5859d7..e2490c4 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -155,6 +155,8 @@ main (int argc, char **argv) init_imx_image_type (); /* Init FIT image generation/list support */ init_fit_image_type (); + /* Init TI OMAP Boot image generation/list support */ + init_omap_image_type (); /* Init Default image generation/list support */ init_default_image_type ();
diff --git a/tools/omapimage.c b/tools/omapimage.c new file mode 100644 index 0000000..87be869 --- /dev/null +++ b/tools/omapimage.c @@ -0,0 +1,226 @@ +/* + * (C) Copyright 2010 + * Linaro LTD, www.linaro.org + * Author: John Rigby john.rigby@linaro.org + * Based on TI's signGP.c + * + * (C) Copyright 2009 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * (C) Copyright 2008 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* Required to obtain the getline prototype from stdio.h */ +#define _GNU_SOURCE + +#include "mkimage.h" +#include <image.h> +#include "omapimage.h" + +/* Header size is CH header rounded up to 512 bytes plus GP header */ +#define OMAP_CH_HDR_SIZE 512 +#define OMAP_GP_HDR_SIZE (sizeof(struct gp_header)) +#define OMAP_FILE_HDR_SIZE (OMAP_CH_HDR_SIZE+OMAP_GP_HDR_SIZE) + +static uint8_t omapimage_header[OMAP_FILE_HDR_SIZE]; + +static int omapimage_check_image_types(uint8_t type) +{ + if (type == IH_TYPE_OMAPIMAGE) + return EXIT_SUCCESS; + else + return EXIT_FAILURE; +} + +/* + * Only the simplest image type is currently supported: + * TOC pointing to CHSETTINGS + * TOC terminator + * CHSETTINGS + * + * padding to OMAP_CH_HDR_SIZE bytes + * + * gp header + * size + * load_addr + */ +static int valid_gph_size(uint32_t size) +{ + return size; +} + +static int valid_gph_load_addr(uint32_t load_addr) +{ + return load_addr; +} + +static int omapimage_verify_header(unsigned char *ptr, int image_size, + struct mkimage_params *params) +{ + struct ch_toc *toc = (struct ch_toc *)ptr; + struct gp_header *gph = (struct gp_header *)(ptr+OMAP_CH_HDR_SIZE); + uint32_t offset, size; + + while (toc->section_offset != 0xffffffff + && toc->section_size != 0xffffffff) { + offset = toc->section_offset; + size = toc->section_size; + if (!offset || !size) + return -1; + if (offset >= OMAP_CH_HDR_SIZE || offset+size >= OMAP_CH_HDR_SIZE) + return -1; + toc++; + } + if (!valid_gph_size(gph->size)) + return -1; + if (!valid_gph_load_addr(gph->load_addr)) + return -1; + + return 0; +} + +static void omapimage_print_section(struct ch_settings *chs) +{ + switch (chs->section_key) { + case KEY_CHSETTINGS: + printf("CHSETTINGS (%x) " + "valid:%x " + "version:%x " + "reserved:%x " + "flags:%x\n", + chs->section_key, + chs->valid, + chs->version, + chs->reserved, + chs->flags); + break; + default: + printf("UNKNOWNKEY (%x) " + "valid:%x " + "version:%x " + "reserved:%x " + "flags:%x\n", + chs->section_key, + chs->valid, + chs->version, + chs->reserved, + chs->flags); + break; + } +} + +static void omapimage_print_header(const void *ptr) +{ + struct ch_toc *toc = (struct ch_toc *)ptr; + struct gp_header *gph = (struct gp_header *)(ptr+OMAP_CH_HDR_SIZE); + uint32_t offset, size; + + while (toc->section_offset != 0xffffffff + && toc->section_size != 0xffffffff) { + offset = toc->section_offset; + size = toc->section_size; + + if (offset >= OMAP_CH_HDR_SIZE || offset+size >= OMAP_CH_HDR_SIZE) + exit(EXIT_FAILURE); + + printf("Section %s offset %x length %x\n", + toc->section_name, + toc->section_offset, + toc->section_size); + + omapimage_print_section((struct ch_settings *)(ptr+offset)); + toc++; + } + + if (!valid_gph_size(gph->size)) { + fprintf(stderr, + "Error: invalid image size %x\n", + gph->size); + exit(EXIT_FAILURE); + } + + if (!valid_gph_load_addr(gph->load_addr)) { + fprintf(stderr, + "Error: invalid image load address %x\n", + gph->size); + exit(EXIT_FAILURE); + } + + printf("GP Header: Size %x LoadAddr %x\n", + gph->size, gph->load_addr); +} + +static int toc_offset(void *hdr, void *member) +{ + return member - hdr; +} + +static void omapimage_set_header(void *ptr, struct stat *sbuf, int ifd, + struct mkimage_params *params) +{ + struct ch_toc *toc = (struct ch_toc *)ptr; + struct ch_settings *chs = (struct ch_settings *)(ptr + 2 * sizeof(*toc)); + struct gp_header *gph = (struct gp_header *)(ptr + OMAP_CH_HDR_SIZE); + + toc->section_offset = toc_offset(ptr, chs); + toc->section_size = sizeof(struct ch_settings); + strcpy((char *)toc->section_name, "CHSETTINGS"); + + chs->section_key = KEY_CHSETTINGS; + chs->valid = 0; + chs->version = 1; + chs->reserved = 0; + chs->flags = 0; + + toc++; + memset(toc, 0xff, sizeof(*toc)); + + gph->size = sbuf->st_size - OMAP_FILE_HDR_SIZE; + gph->load_addr = params->addr; +} + +int omapimage_check_params(struct mkimage_params *params) +{ + return ((params->dflag && (params->fflag || params->lflag)) || + (params->fflag && (params->dflag || params->lflag)) || + (params->lflag && (params->dflag || params->fflag))); +} + +/* + * omapimage parameters + */ +static struct image_type_params omapimage_params = { + .name = "TI OMAP CH/GP Boot Image support", + .header_size = OMAP_FILE_HDR_SIZE, + .hdr = (void *)&omapimage_header, + .check_image_type = omapimage_check_image_types, + .verify_header = omapimage_verify_header, + .print_header = omapimage_print_header, + .set_header = omapimage_set_header, + .check_params = omapimage_check_params, +}; + +void init_omap_image_type(void) +{ + mkimage_register(&omapimage_params); +} diff --git a/tools/omapimage.h b/tools/omapimage.h new file mode 100644 index 0000000..7ff5404 --- /dev/null +++ b/tools/omapimage.h @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2010 + * Linaro LTD, www.linaro.org + * Author John Rigby john.rigby@linaro.org + * Based on TI's signGP.c + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _OMAPIMAGE_H_ +#define _OMAPIMAGE_H_ + +struct ch_toc { + uint32_t section_offset; + uint32_t section_size; + uint8_t unused[12]; + uint8_t section_name[12]; +} __attribute__ ((__packed__)); + +struct ch_settings { + uint32_t section_key; + uint8_t valid; + uint8_t version; + uint16_t reserved; + uint32_t flags; +} __attribute__ ((__packed__)); + +struct gp_header { + uint32_t size; + uint32_t load_addr; +} __attribute__ ((__packed__)); + +#define KEY_CHSETTINGS 0xC0C0C0C1 +#endif /* _OMAPIMAGE_H_ */
Hi John,
On Tuesday, December 28, 2010 6:17 AM, John Rigby wrote:
Signed-off-by: John Rigby john.rigby@linaro.org
common/image.c | 1 + include/image.h | 1 + tools/Makefile | 2 + tools/mkimage.c | 2 + tools/omapimage.c | 226 +++++++++++++++++++++++++++++++++++++++++++++++++++++ tools/omapimage.h | 50 ++++++++++++ 6 files changed, 282 insertions(+), 0 deletions(-) create mode 100644 tools/omapimage.c create mode 100644 tools/omapimage.h
diff --git a/common/image.c b/common/image.c index f63a2ff..4198d76 100644 --- a/common/image.c +++ b/common/image.c @@ -141,6 +141,7 @@ static const table_entry_t uimage_type[] = { { IH_TYPE_FLATDT, "flat_dt", "Flat Device Tree", }, { IH_TYPE_KWBIMAGE, "kwbimage", "Kirkwood Boot Image",}, { IH_TYPE_IMXIMAGE, "imximage", "Freescale i.MX Boot Image",},
- { IH_TYPE_OMAPIMAGE, "omapimage", "TI OMAP CH/GP Boot Image",}, { -1, "", "", },
};
[...]
We are working on patch sets to add support for TI816X and TI814X processor series from Texas Instruments. This series includes DM8168/8148, C6A816x and AM389x devices.
We were also in the process of extending mkimage to attach a header to the u-boot binary for TI816X and TI814X. We could build upon the mkimage extension that you proposed, so please consider making it more generic.
diff --git a/include/image.h b/include/image.h index 005e0d2..f74e2b9 100644 --- a/include/image.h +++ b/include/image.h @@ -157,6 +157,7 @@ #define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */ #define IH_TYPE_KWBIMAGE 9 /* Kirkwood Boot Image */ #define IH_TYPE_IMXIMAGE 10 /* Freescale IMXBoot Image */ +#define IH_TYPE_OMAPIMAGE 11 /* TI OMAP Config Header Image */
[...]
TIIMAGE instead of OMAPIMAGE sounds more generic.
[...]
$(obj)image.o \ $(obj)imximage.o \
$(obj)omapimage.o \
Same here. This change could be done globally in the patch.
$(obj)kwbimage.o \ $(obj)md5.o \ $(obj)mkimage.o \
[...]
+/* Header size is CH header rounded up to 512 bytes plus GP header */ +#define OMAP_CH_HDR_SIZE 512 #define OMAP_GP_HDR_SIZE (sizeof(struct +gp_header)) #define OMAP_FILE_HDR_SIZE +(OMAP_CH_HDR_SIZE+OMAP_GP_HDR_SIZE)
+static uint8_t omapimage_header[OMAP_FILE_HDR_SIZE];
TI816X and TI814X only have GP_HDR. How about adding a config option like CONFIG_OMAP_TIIMAGE to decide upon the final size of the header over here? That config option can also help in conditional compilation of the code which deals with the configuration header.
[...]
+static int omapimage_verify_header(unsigned char *ptr, int image_size, + struct mkimage_params *params) +{
- struct ch_toc *toc = (struct ch_toc *)ptr;
- struct gp_header *gph = (struct gp_header
*)(ptr+OMAP_CH_HDR_SIZE); + uint32_t offset, size;
- while (toc->section_offset != 0xffffffff
&& toc->section_size != 0xffffffff) {offset = toc->section_offset;size = toc->section_size;if (!offset || !size)return -1;if (offset >= OMAP_CH_HDR_SIZE || offset+size >=OMAP_CH_HDR_SIZE) + return -1;
toc++;- }
- if (!valid_gph_size(gph->size))
return -1;- if (!valid_gph_load_addr(gph->load_addr))
return -1;- return 0;
+}
Please consider splitting the various functions/adding checks for CH_HDR and GP_HDR.
[...]
+/*
- omapimage parameters
- */
+static struct image_type_params omapimage_params = {
- .name = "TI OMAP CH/GP Boot Image support",
- .header_size = OMAP_FILE_HDR_SIZE,
- .hdr = (void *)&omapimage_header,
- .check_image_type = omapimage_check_image_types,
- .verify_header = omapimage_verify_header,
- .print_header = omapimage_print_header,
- .set_header = omapimage_set_header,
- .check_params = omapimage_check_params,
+};
The set_header and print_header implementations will vary for TI816X and TI814X so protecting them with a macro like CONFIG_OMAP_TIIMAGE will be needed. I think you'll need to add dummy functions also to avoid compilation errors.
Adding dummy function also has one more advantage in case 2 different binaries are built from the same tree.
Without dummy functions for the spl stage and the full-fledged u-boot binary there will be different commands. Eg: "make u-boot.ti" for the spl stage and just "make" in the second stage.
But with dummy functions in place the user can invoke "make u-boot.ti" and not get confused about which command is to be used.
[...]
+struct ch_toc {
- uint32_t section_offset;
- uint32_t section_size;
- uint8_t unused[12];
- uint8_t section_name[12];
+} __attribute__ ((__packed__));
+struct ch_settings {
- uint32_t section_key;
- uint8_t valid;
- uint8_t version;
- uint16_t reserved;
- uint32_t flags;
+} __attribute__ ((__packed__));
+struct gp_header {
- uint32_t size;
- uint32_t load_addr;
+} __attribute__ ((__packed__));
[...]
TI8168 and TI8148 will require only the gp_header struct. So please consider protecting ch_toc and ch_settings structures with a macro.
If it helps, I can share the current code we have for the mkimage extension for TI816X and TI814X.
Regards, Vaibhav
On Tue, Jan 4, 2011 at 6:43 AM, Bedia, Vaibhav vaibhav.bedia@ti.com wrote:
Hi John,
On Tuesday, December 28, 2010 6:17 AM, John Rigby wrote:
Signed-off-by: John Rigby john.rigby@linaro.org
common/image.c | 1 + include/image.h | 1 + tools/Makefile | 2 + tools/mkimage.c | 2 + tools/omapimage.c | 226 +++++++++++++++++++++++++++++++++++++++++++++++++++++ tools/omapimage.h | 50 ++++++++++++ 6 files changed, 282 insertions(+), 0 deletions(-) create mode 100644 tools/omapimage.c create mode 100644 tools/omapimage.h
diff --git a/common/image.c b/common/image.c index f63a2ff..4198d76 100644 --- a/common/image.c +++ b/common/image.c @@ -141,6 +141,7 @@ static const table_entry_t uimage_type[] = { { IH_TYPE_FLATDT, "flat_dt", "Flat Device Tree", }, { IH_TYPE_KWBIMAGE, "kwbimage", "Kirkwood Boot Image",}, { IH_TYPE_IMXIMAGE, "imximage", "Freescale i.MX Boot Image",},
- { IH_TYPE_OMAPIMAGE, "omapimage", "TI OMAP CH/GP Boot Image",},
{ -1, "", "", }, };
[...]
We are working on patch sets to add support for TI816X and TI814X processor series from Texas Instruments. This series includes DM8168/8148, C6A816x and AM389x devices.
We were also in the process of extending mkimage to attach a header to the u-boot binary for TI816X and TI814X. We could build upon the mkimage extension that you proposed, so please consider making it more generic.
diff --git a/include/image.h b/include/image.h index 005e0d2..f74e2b9 100644 --- a/include/image.h +++ b/include/image.h @@ -157,6 +157,7 @@ #define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */ #define IH_TYPE_KWBIMAGE 9 /* Kirkwood Boot Image */ #define IH_TYPE_IMXIMAGE 10 /* Freescale IMXBoot Image */ +#define IH_TYPE_OMAPIMAGE 11 /* TI OMAP Config Header Image */
[...]
TIIMAGE instead of OMAPIMAGE sounds more generic.
[...]
$(obj)image.o \ $(obj)imximage.o \
- $(obj)omapimage.o \
Same here. This change could be done globally in the patch.
$(obj)kwbimage.o \ $(obj)md5.o \ $(obj)mkimage.o \
[...]
+/* Header size is CH header rounded up to 512 bytes plus GP header */ +#define OMAP_CH_HDR_SIZE 512 #define OMAP_GP_HDR_SIZE (sizeof(struct +gp_header)) #define OMAP_FILE_HDR_SIZE +(OMAP_CH_HDR_SIZE+OMAP_GP_HDR_SIZE)
+static uint8_t omapimage_header[OMAP_FILE_HDR_SIZE];
TI816X and TI814X only have GP_HDR. How about adding a config option like CONFIG_OMAP_TIIMAGE to decide upon the final size of the header over here? That config option can also help in conditional compilation of the code which deals with the configuration header.
[...]
+static int omapimage_verify_header(unsigned char *ptr, int image_size, + struct mkimage_params *params) +{
- struct ch_toc *toc = (struct ch_toc *)ptr;
- struct gp_header *gph = (struct gp_header
*)(ptr+OMAP_CH_HDR_SIZE); + uint32_t offset, size;
- while (toc->section_offset != 0xffffffff
- && toc->section_size != 0xffffffff) {
- offset = toc->section_offset;
- size = toc->section_size;
- if (!offset || !size)
- return -1;
- if (offset >= OMAP_CH_HDR_SIZE || offset+size >=
OMAP_CH_HDR_SIZE) + return -1;
- toc++;
- }
- if (!valid_gph_size(gph->size))
- return -1;
- if (!valid_gph_load_addr(gph->load_addr))
- return -1;
- return 0;
+}
Please consider splitting the various functions/adding checks for CH_HDR and GP_HDR.
[...]
+/*
- omapimage parameters
- */
+static struct image_type_params omapimage_params = {
- .name = "TI OMAP CH/GP Boot Image support",
- .header_size = OMAP_FILE_HDR_SIZE,
- .hdr = (void *)&omapimage_header,
- .check_image_type = omapimage_check_image_types,
- .verify_header = omapimage_verify_header,
- .print_header = omapimage_print_header,
- .set_header = omapimage_set_header,
- .check_params = omapimage_check_params,
+};
The set_header and print_header implementations will vary for TI816X and TI814X so protecting them with a macro like CONFIG_OMAP_TIIMAGE will be needed. I think you'll need to add dummy functions also to avoid compilation errors.
Adding dummy function also has one more advantage in case 2 different binaries are built from the same tree.
Without dummy functions for the spl stage and the full-fledged u-boot binary there will be different commands. Eg: "make u-boot.ti" for the spl stage and just "make" in the second stage.
But with dummy functions in place the user can invoke "make u-boot.ti" and not get confused about which command is to be used.
[...]
+struct ch_toc {
- uint32_t section_offset;
- uint32_t section_size;
- uint8_t unused[12];
- uint8_t section_name[12];
+} __attribute__ ((__packed__));
+struct ch_settings {
- uint32_t section_key;
- uint8_t valid;
- uint8_t version;
- uint16_t reserved;
- uint32_t flags;
+} __attribute__ ((__packed__));
+struct gp_header {
- uint32_t size;
- uint32_t load_addr;
+} __attribute__ ((__packed__));
[...]
TI8168 and TI8148 will require only the gp_header struct. So please consider protecting ch_toc and ch_settings structures with a macro.
If it helps, I can share the current code we have for the mkimage extension for TI816X and TI814X.
Regards, Vaibhav
I agree with your suggestions however there is one problem with the suggested implementation. A mkimage binary must be able to produce any kind of image. See the recent conversation on extending mkimage for i.mx53 for example. So a mkimage that supports OMAP and other TI SOCs with only the GP header must make the selection at run time not compile time.
I'll will try to add GP header only support in the next revsion.
Thanks John
Signed-off-by: John Rigby john.rigby@linaro.org --- Makefile | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile index 9055028..baf11b3 100644 --- a/Makefile +++ b/Makefile @@ -289,8 +289,13 @@ LDPPFLAGS += \
ifeq ($(CONFIG_NAND_U_BOOT),y) NAND_SPL = nand_spl +ifeq ($(CONFIG_OMAP3430),y) +U_BOOT_SPL_IFT=u-boot-spl.ift +ALL+=$(U_BOOT_SPL_IFT) +else U_BOOT_NAND = $(obj)u-boot-nand.bin endif +endif
ifeq ($(CONFIG_ONENAND_U_BOOT),y) ONENAND_IPL = onenand_ipl @@ -407,6 +412,10 @@ $(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) depend $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
+$(U_BOOT_SPL_IFT): $(NAND_SPL) $(obj)u-boot.bin + $(obj)tools/mkimage -T omapimage \ + -a $(CONFIG_SYS_NAND_SPL_TEXT_BASE) -d $(obj)nand_spl/u-boot-spl.bin $@ + $(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
On 28.12.2010 01:47, John Rigby wrote:
Signed-off-by: John Rigbyjohn.rigby@linaro.org
Makefile | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile index 9055028..baf11b3 100644 --- a/Makefile +++ b/Makefile @@ -289,8 +289,13 @@ LDPPFLAGS += \
ifeq ($(CONFIG_NAND_U_BOOT),y) NAND_SPL = nand_spl +ifeq ($(CONFIG_OMAP3430),y) +U_BOOT_SPL_IFT=u-boot-spl.ift +ALL+=$(U_BOOT_SPL_IFT) +else U_BOOT_NAND = $(obj)u-boot-nand.bin endif +endif
ifeq ($(CONFIG_ONENAND_U_BOOT),y) ONENAND_IPL = onenand_ipl @@ -407,6 +412,10 @@ $(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) depend $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin> $(obj)u-boot-nand.bin
+$(U_BOOT_SPL_IFT): $(NAND_SPL) $(obj)u-boot.bin
$(obj)tools/mkimage -T omapimage \-a $(CONFIG_SYS_NAND_SPL_TEXT_BASE) -d $(obj)nand_spl/u-boot-spl.bin $@- $(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
While I just saw
http://lists.denx.de/pipermail/u-boot/2010-December/084347.html
what's about adding u-boot-spl.ift to .gitignore, too?
Thanks
Dirk
Hello John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
This patch series adds the ability to boot a beagle board from nand without x-loader. A future addition will add mmc boot support.
I had been working on something similar for OMAP4. Basically, I have an SPL ready for MMC on OMAP4. It's working on eMMC in raw mode, but needs some cleanup and also addition of FAT support.
I can clean it up and send it out next week(after my vacation) if you like.
Best regards, Aneesh
On Mon, Dec 27, 2010 at 11:17 PM, Aneesh V aneesh@ti.com wrote:
Hello John,
On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
This patch series adds the ability to boot a beagle board from nand without x-loader. A future addition will add mmc boot support.
I had been working on something similar for OMAP4. Basically, I have an SPL ready for MMC on OMAP4. It's working on eMMC in raw mode, but needs some cleanup and also addition of FAT support.
I can clean it up and send it out next week(after my vacation) if you like.
That would be great. Having both nand and mmc boot would make this much more useful.
thanks, John
This patch series adds the ability to boot a beagle board from nand without x-loader. A future addition will add mmc boot support.
John Rigby (8): NAND: nand_spl/nand_boot.c: add 16-bit and readid support armv7: add nand_spl support OMAP3: and nand_spl support OMAP3: add dram timing constants from x-loader NAND: omap_gpmc.c: add nand_spl support omap3_beagle: add nand_spl support mkimage: Add OMAP boot image support OMAP3: Add ift target to top level Makefile
I will be on vacation till the 20th of January. So there might be a little delay in merging this patch series after the review has taken place.
I suspect we will have to give some time (probably till 2nd week of January) for review in any case as most people are on vacation.
Regards, Sandeep
participants (7)
-
Aneesh V -
Bedia, Vaibhav -
Dirk Behme -
John Rigby -
John Rigby -
Paulraj, Sandeep -
Scott Wood