[PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
Add CPU and PRR IDs for R8A774A1(a.k.a RZ/G2M) SoC.
RZ/Gx SoC's are identical to R-Car SoC's apart from some automotive peripherals and they also share the same PRR CPU ID's.
For example the RZ/G2M SoC has the same PRR ID 0x52 as R-Car M3W SoC.
To differentiate RZ/G SoC's from R-Car SoC's add a member family_type in struct rmobile_cpuinfo and compare the compatible string from device tree for SoC identification of RZ/G SoC.
Also sorted the header alphabetically.
Signed-off-by: Biju Das biju.das.jz@bp.renesas.com Reviewed-by: Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com --- V1-->V2 Add comments in the code for SoC identification logic for RZ/G SoC's --- arch/arm/mach-rmobile/cpu_info.c | 83 +++++++++++++++----- arch/arm/mach-rmobile/include/mach/rmobile.h | 1 + 2 files changed, 65 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index fdbbd72e28..d45a474ba9 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -3,13 +3,23 @@ * (C) Copyright 2012 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com * (C) Copyright 2012 Renesas Solutions Corp. */ -#include <common.h> -#include <cpu_func.h> #include <asm/cache.h> -#include <init.h> #include <asm/io.h> +#include <common.h> +#include <cpu_func.h> +#include <dm/device.h> #include <env.h> +#include <init.h> #include <linux/ctype.h> +#include <linux/libfdt.h> + +enum soc_family_type { + SOC_SHMOBILE = 0, + SOC_RMOBILE, + SOC_RZG2, + SOC_RCAR_GEN2, + SOC_RCAR_GEN3, +};
#ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) @@ -31,6 +41,7 @@ void enable_caches(void)
#ifdef CONFIG_DISPLAY_CPUINFO #ifndef CONFIG_RZA1 +DECLARE_GLOBAL_DATA_PTR; static u32 __rmobile_get_cpu_type(void) { return 0x0; @@ -52,36 +63,70 @@ static u32 __rmobile_get_cpu_rev_fraction(void) u32 rmobile_get_cpu_rev_fraction(void) __attribute__((weak, alias("__rmobile_get_cpu_rev_fraction")));
+static const struct udevice_id soc_ids[] = { + { .compatible = "renesas,r8a774a1", .data = SOC_RZG2 }, + { }, +}; + /* CPU infomation table */ static const struct { u16 cpu_type; u8 cpu_name[10]; + enum soc_family_type family_type; } rmobile_cpuinfo[] = { - { RMOBILE_CPU_TYPE_SH73A0, "SH73A0" }, - { RMOBILE_CPU_TYPE_R8A7740, "R8A7740" }, - { RMOBILE_CPU_TYPE_R8A7790, "R8A7790" }, - { RMOBILE_CPU_TYPE_R8A7791, "R8A7791" }, - { RMOBILE_CPU_TYPE_R8A7792, "R8A7792" }, - { RMOBILE_CPU_TYPE_R8A7793, "R8A7793" }, - { RMOBILE_CPU_TYPE_R8A7794, "R8A7794" }, - { RMOBILE_CPU_TYPE_R8A7795, "R8A7795" }, - { RMOBILE_CPU_TYPE_R8A7796, "R8A7796" }, - { RMOBILE_CPU_TYPE_R8A77965, "R8A77965" }, - { RMOBILE_CPU_TYPE_R8A77970, "R8A77970" }, - { RMOBILE_CPU_TYPE_R8A77980, "R8A77980" }, - { RMOBILE_CPU_TYPE_R8A77990, "R8A77990" }, - { RMOBILE_CPU_TYPE_R8A77995, "R8A77995" }, + { RMOBILE_CPU_TYPE_SH73A0, "SH73A0", SOC_SHMOBILE }, + { RMOBILE_CPU_TYPE_R8A7740, "R8A7740", SOC_RMOBILE }, + { RMOBILE_CPU_TYPE_R8A774A1, "R8A774A1", SOC_RZG2 }, + { RMOBILE_CPU_TYPE_R8A7790, "R8A7790", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7791, "R8A7791", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7792, "R8A7792", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7793, "R8A7793", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7794, "R8A7794", SOC_RCAR_GEN2 }, + { RMOBILE_CPU_TYPE_R8A7795, "R8A7795", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A7796, "R8A7796", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77965, "R8A77965", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77970, "R8A77970", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77980, "R8A77980", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77990, "R8A77990", SOC_RCAR_GEN3 }, + { RMOBILE_CPU_TYPE_R8A77995, "R8A77995", SOC_RCAR_GEN3 }, { 0x0, "CPU" }, };
+static const struct udevice_id *of_soc_match_compatible(void) +{ + const struct udevice_id *of_match = soc_ids; + int i; + + for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { + if (!fdt_node_check_compatible(gd->fdt_blob, 0, + of_match->compatible)) + return of_match; + of_match++; + } + + return NULL; +} + static int rmobile_cpuinfo_idx(void) { int i = 0; u32 cpu_type = rmobile_get_cpu_type(); + const struct udevice_id *match = of_soc_match_compatible();
+ /* + * This loop identifies CPU based on PRR register, it differentiates + * RZ/G SoC's from R-Car SoC's by matching RZ/G SoC compatible string + * from DT against the family_type. + */ for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) - if (rmobile_cpuinfo[i].cpu_type == cpu_type) - break; + if (rmobile_cpuinfo[i].cpu_type == cpu_type) { + if (match && + rmobile_cpuinfo[i].family_type == match->data) + break; + else if (!match && + rmobile_cpuinfo[i].family_type != SOC_RZG2) + break; + }
return i; } diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h b/arch/arm/mach-rmobile/include/mach/rmobile.h index a50249dc96..8bb64f59dd 100644 --- a/arch/arm/mach-rmobile/include/mach/rmobile.h +++ b/arch/arm/mach-rmobile/include/mach/rmobile.h @@ -27,6 +27,7 @@ /* PRR CPU IDs */ #define RMOBILE_CPU_TYPE_SH73A0 0x37 #define RMOBILE_CPU_TYPE_R8A7740 0x40 +#define RMOBILE_CPU_TYPE_R8A774A1 0x52 #define RMOBILE_CPU_TYPE_R8A7790 0x45 #define RMOBILE_CPU_TYPE_R8A7791 0x47 #define RMOBILE_CPU_TYPE_R8A7792 0x4A
The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board.
DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and r8a774a1-u-boot.dtsi have been imported from Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4")
This patch adds the required board support to boot HopeRun HiHope RZ/G2M board.
Signed-off-by: Biju Das biju.das.jz@bp.renesas.com Reviewed-by: Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com --- V1-->V2 * Fixed indentation for R8A774A1 config * Used GPIO hog for setting WLAN/BT REG ON * Removed USB related initialization --- arch/arm/dts/Makefile | 1 + arch/arm/dts/hihope-common.dtsi | 377 ++++++++++++++++++ arch/arm/dts/hihope-rev4.dtsi | 124 ++++++ arch/arm/dts/hihope-rzg2-ex.dtsi | 93 +++++ arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts | 21 + arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts | 27 ++ arch/arm/dts/r8a774a1-hihope-rzg2m.dts | 37 ++ arch/arm/dts/r8a774a1-u-boot.dtsi | 55 +++ arch/arm/mach-rmobile/Kconfig.64 | 16 +- board/hoperun/hihope-rzg2/Kconfig | 15 + board/hoperun/hihope-rzg2/MAINTAINERS | 6 + board/hoperun/hihope-rzg2/Makefile | 9 + board/hoperun/hihope-rzg2/hihope-rzg2.c | 80 ++++ configs/hihope_rzg2_defconfig | 74 ++++ include/configs/hihope-rzg2.h | 20 + 15 files changed, 954 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/hihope-common.dtsi create mode 100644 arch/arm/dts/hihope-rev4.dtsi create mode 100644 arch/arm/dts/hihope-rzg2-ex.dtsi create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m.dts create mode 100644 arch/arm/dts/r8a774a1-u-boot.dtsi create mode 100644 board/hoperun/hihope-rzg2/Kconfig create mode 100644 board/hoperun/hihope-rzg2/MAINTAINERS create mode 100644 board/hoperun/hihope-rzg2/Makefile create mode 100644 board/hoperun/hihope-rzg2/hihope-rzg2.c create mode 100644 configs/hihope_rzg2_defconfig create mode 100644 include/configs/hihope-rzg2.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 72b6fe1a3e..0de6bce873 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -784,6 +784,7 @@ dtb-$(CONFIG_RCAR_GEN2) += \
dtb-$(CONFIG_RCAR_GEN3) += \ r8a774a1-beacon-rzg2m-kit.dtb \ + r8a774a1-hihope-rzg2m-u-boot.dtb \ r8a77950-ulcb-u-boot.dtb \ r8a77950-salvator-x-u-boot.dtb \ r8a77960-ulcb-u-boot.dtb \ diff --git a/arch/arm/dts/hihope-common.dtsi b/arch/arm/dts/hihope-common.dtsi new file mode 100644 index 0000000000..51eb74fbe9 --- /dev/null +++ b/arch/arm/dts/hihope-common.dtsi @@ -0,0 +1,377 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the HiHope RZ/G2H Rev.4.0 and + * HiHope RZ/G2[MN] Rev.[2.0/3.0/4.0] main board common parts + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + aliases { + serial0 = &scif2; + serial1 = &hscif0; + }; + + chosen { + bootargs = "ignore_loglevel"; + stdout-path = "serial0:115200n8"; + }; + + hdmi0-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi0_con: endpoint { + remote-endpoint = <&rcar_dw_hdmi0_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led1 { + gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + + led2 { + gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + }; + + led3 { + gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; + }; + + led4 { + gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sound_card: sound { + compatible = "audio-graph-card"; + + label = "rcar-sound"; + + dais = <&rsnd_port>; + }; + + vbus0_usb2: regulator-vbus0-usb2 { + compatible = "regulator-fixed"; + + regulator-name = "USB20_VBUS0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1>, <1800000 0>; + }; + + x302_clk: x302-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33000000>; + }; + + x304_clk: x304-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&audio_clk_a { + clock-frequency = <22579200>; +}; + +&du { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&gpio6 { + usb1-reset { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-low; + line-name = "usb1-reset"; + }; +}; + +&hdmi0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi0_out: endpoint { + remote-endpoint = <&hdmi0_con>; + }; + }; + port@2 { + reg = <2>; + dw_hdmi0_snd_in: endpoint { + remote-endpoint = <&rsnd_endpoint>; + }; + }; + }; +}; + +&hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; +}; + +&hsusb { + dr_mode = "otg"; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <400000>; + status = "okay"; + + versaclock5: clock-generator@6a { + compatible = "idt,5p49v5923"; + reg = <0x6a>; + #clock-cells = <1>; + clocks = <&x304_clk>; + clock-names = "xin"; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + scif2_pins: scif2 { + groups = "scif2_data_a"; + function = "scif2"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_a"; + function = "scif_clk"; + }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; + + sdhi3_pins: sd3 { + groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; + function = "sdhi3"; + power-source = <1800>; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb1_pins: usb1 { + mux { + groups = "usb1"; + function = "usb1"; + }; + + ovc { + pins = "GP_6_27"; + bias-pull-up; + }; + }; + + usb30_pins: usb30 { + groups = "usb30"; + function = "usb30"; + }; +}; + +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; +}; + +&sdhi2 { + status = "okay"; + pinctrl-0 = <&sdhi2_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + non-removable; + cap-power-off-card; + keep-power-in-suspend; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio2>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins>; + pinctrl-1 = <&sdhi3_pins>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + fixed-emmc-driver-type = <1>; + status = "okay"; +}; + +&usb_extal_clk { + clock-frequency = <50000000>; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + vbus-supply = <&vbus0_usb2>; + status = "okay"; +}; + +&usb2_phy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&usb3_peri0 { + phys = <&usb3_phy0>; + phy-names = "usb"; + + companion = <&xhci0>; + + status = "okay"; +}; + +&usb3_phy0 { + status = "okay"; +}; + +&usb3s0_clk { + clock-frequency = <100000000>; +}; + +&xhci0 { + pinctrl-0 = <&usb30_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; diff --git a/arch/arm/dts/hihope-rev4.dtsi b/arch/arm/dts/hihope-rev4.dtsi new file mode 100644 index 0000000000..3046c07a28 --- /dev/null +++ b/arch/arm/dts/hihope-rev4.dtsi @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the HiHope RZ/G2H Rev.4.0 and + * HiHope RZ/G2[MN] Rev.3.0/4.0 main board common parts + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +#include <dt-bindings/gpio/gpio.h> +#include "hihope-common.dtsi" + +/ { + audio_clkout: audio-clkout { + /* + * This is same as <&rcar_sound 0> + * but needed to avoid cs2000/rcar_sound probe dead-lock + */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12288000>; + }; + + wlan_en_reg: regulator-wlan_en { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us = <70000>; + + gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + x1801_clk: x1801-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; +}; + +&hscif0 { + bluetooth { + compatible = "ti,wl1837-st"; + enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + }; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + status = "okay"; + + cs2000: clk_multiplier@4f { + #clock-cells = <0>; + compatible = "cirrus,cs2000-cp"; + reg = <0x4f>; + clocks = <&audio_clkout>, <&x1801_clk>; + clock-names = "clk_in", "ref_clk"; + + assigned-clocks = <&cs2000>; + assigned-clock-rates = <24576000>; /* 1/1 divide */ + }; +}; + +&pfc { + i2c2_pins: i2c2 { + groups = "i2c2_a"; + function = "i2c2"; + }; + + sound_clk_pins: sound_clk { + groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clkout_a"; + function = "audio_clk"; + }; + + sound_pins: sound { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + status = "okay"; + + /* Single DAI */ + #sound-dai-cells = <0>; + + /* audio_clkout0/1/2/3 */ + #clock-cells = <1>; + clock-frequency = <12288000 11289600>; + + /* update <audio_clk_b> to <cs2000> */ + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&cs2000>, + <&audio_clk_c>, + <&cpg CPG_CORE CPG_AUDIO_CLK_I>; + + rsnd_port: port { + rsnd_endpoint: endpoint { + remote-endpoint = <&dw_hdmi0_snd_in>; + + dai-format = "i2s"; + bitclock-master = <&rsnd_endpoint>; + frame-master = <&rsnd_endpoint>; + + playback = <&ssi2>; + }; + }; +}; diff --git a/arch/arm/dts/hihope-rzg2-ex.dtsi b/arch/arm/dts/hihope-rzg2-ex.dtsi new file mode 100644 index 0000000000..6233069282 --- /dev/null +++ b/arch/arm/dts/hihope-rzg2-ex.dtsi @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the RZ/G2[HMN] HiHope sub board common parts + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +/ { + aliases { + ethernet0 = &avb; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; + }; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + phy-handle = <&phy0>; + phy-mode = "rgmii-txid"; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + }; +}; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pciec0 { + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + avb_pins: avb { + mux { + groups = "avb_link", "avb_mdio", "avb_mii"; + function = "avb"; + }; + + pins_mdio { + groups = "avb_mdio"; + drive-strength = <24>; + }; + + pins_mii_tx { + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", + "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; + drive-strength = <12>; + }; + }; + + can0_pins: can0 { + groups = "can0_data_a"; + function = "can0"; + }; + + can1_pins: can1 { + groups = "can1_data"; + function = "can1"; + }; + + pwm0_pins: pwm0 { + groups = "pwm0"; + function = "pwm0"; + }; +}; + +&pwm0 { + pinctrl-0 = <&pwm0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts b/arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts new file mode 100644 index 0000000000..a5ca86196a --- /dev/null +++ b/arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 connected to + * sub board + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +#include "r8a774a1-hihope-rzg2m.dts" +#include "hihope-rzg2-ex.dtsi" + +/ { + model = "HopeRun HiHope RZ/G2M with sub board"; + compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m", + "renesas,r8a774a1"; +}; + +/* SW43 should be OFF, if in ON state SATA port will be activated */ +&pciec1 { + status = "okay"; +}; diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts b/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts new file mode 100644 index 0000000000..4881801eea --- /dev/null +++ b/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot for the Hihope RZ/G2M board + * + * Copyright (C) 2020 Renesas Electronics Corporation + */ + +#include "r8a774a1-hihope-rzg2m-ex.dts" +#include "r8a774a1-u-boot.dtsi" + +&gpio3 { + bt_reg_on{ + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "bt-reg-on"; + }; +}; + +&gpio4 { + wlan_reg_on{ + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "wlan-reg-on"; + }; +}; diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m.dts b/arch/arm/dts/r8a774a1-hihope-rzg2m.dts new file mode 100644 index 0000000000..25ae255de0 --- /dev/null +++ b/arch/arm/dts/r8a774a1-hihope-rzg2m.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 main board + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a774a1.dtsi" +#include "hihope-rev4.dtsi" + +/ { + model = "HopeRun HiHope RZ/G2M main board based on r8a774a1"; + compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x80000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", + "dclkin.0", "dclkin.1", "dclkin.2"; +}; diff --git a/arch/arm/dts/r8a774a1-u-boot.dtsi b/arch/arm/dts/r8a774a1-u-boot.dtsi new file mode 100644 index 0000000000..86be1af351 --- /dev/null +++ b/arch/arm/dts/r8a774a1-u-boot.dtsi @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot on RZ/G2 R8A774A1 SoC + * + * Copyright (C) 2020 Renesas Electronics Corporation + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + u-boot,dm-pre-reloc; +}; + +/delete-node/ &audma0; +/delete-node/ &audma1; +/delete-node/ &can0; +/delete-node/ &can1; +/delete-node/ &canfd; +/delete-node/ &csi20; +/delete-node/ &csi40; +/delete-node/ &du; +/delete-node/ &fcpf0; +/delete-node/ &fcpvb0; +/delete-node/ &fcpvd0; +/delete-node/ &fcpvd1; +/delete-node/ &fcpvd2; +/delete-node/ &fcpvi0; +/delete-node/ &hdmi0; +/delete-node/ &lvds0; +/delete-node/ &rcar_sound; +/delete-node/ &sdhi2; +/delete-node/ &sound_card; +/delete-node/ &vin0; +/delete-node/ &vin1; +/delete-node/ &vin2; +/delete-node/ &vin3; +/delete-node/ &vin4; +/delete-node/ &vin5; +/delete-node/ &vin6; +/delete-node/ &vin7; +/delete-node/ &vspb; +/delete-node/ &vspd0; +/delete-node/ &vspd1; +/delete-node/ &vspd2; +/delete-node/ &vspi0; + +/ { + /delete-node/ hdmi0-out; +}; + +/ { + soc { + /delete-node/ fdp1@fe940000; + }; +}; diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 07f607dd9d..e9cd25e162 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -3,7 +3,9 @@ if RCAR_GEN3 menu "Select Target SoC"
config R8A774A1 - bool "Renesas SoC R8A774A1" + bool "Renesas SoC R8A774A1" + imply CLK_R8A774A1 + imply PINCTRL_PFC_R8A774A1
config R8A7795 bool "Renesas SoC R8A7795" @@ -75,6 +77,15 @@ config TARGET_EBISU help Support for Renesas R-Car Gen3 Ebisu platform
+config TARGET_HIHOPE_RZG2 + bool "HiHope RZ/G2 board" + imply R8A774A1 + imply SYS_MALLOC_F + imply MULTI_DTB_FIT + imply MULTI_DTB_FIT_USER_DEFINED_AREA + help + Support for RZG2 HiHope platform + config TARGET_SALVATOR_X bool "Salvator-X board" imply R8A7795 @@ -109,12 +120,15 @@ source "board/renesas/ebisu/Kconfig" source "board/renesas/salvator-x/Kconfig" source "board/renesas/ulcb/Kconfig" source "board/beacon/beacon-rzg2m/Kconfig" +source "board/hoperun/hihope-rzg2/Kconfig"
config MULTI_DTB_FIT_UNCOMPRESS_SZ + default 0x80000 if TARGET_HIHOPE_RZG2 default 0x80000 if TARGET_SALVATOR_X default 0x80000 if TARGET_ULCB
config MULTI_DTB_FIT_USER_DEF_ADDR + default 0x49000000 if TARGET_HIHOPE_RZG2 default 0x49000000 if TARGET_SALVATOR_X default 0x49000000 if TARGET_ULCB
diff --git a/board/hoperun/hihope-rzg2/Kconfig b/board/hoperun/hihope-rzg2/Kconfig new file mode 100644 index 0000000000..ee422ba6c8 --- /dev/null +++ b/board/hoperun/hihope-rzg2/Kconfig @@ -0,0 +1,15 @@ +if TARGET_HIHOPE_RZG2 + +config SYS_SOC + default "rmobile" + +config SYS_BOARD + default "hihope-rzg2" + +config SYS_VENDOR + default "hoperun" + +config SYS_CONFIG_NAME + default "hihope-rzg2" + +endif diff --git a/board/hoperun/hihope-rzg2/MAINTAINERS b/board/hoperun/hihope-rzg2/MAINTAINERS new file mode 100644 index 0000000000..e3702fd12e --- /dev/null +++ b/board/hoperun/hihope-rzg2/MAINTAINERS @@ -0,0 +1,6 @@ +HIHOPE_RZG2 BOARD +M: Biju Das biju.das.jz@bp.renesas.com +S: Maintained +F: board/hoperun/hihope-rzg2/ +F: include/configs/hihope-rzg2.h +F: configs/hihope_rzg2_defconfig diff --git a/board/hoperun/hihope-rzg2/Makefile b/board/hoperun/hihope-rzg2/Makefile new file mode 100644 index 0000000000..5313031109 --- /dev/null +++ b/board/hoperun/hihope-rzg2/Makefile @@ -0,0 +1,9 @@ +# +# board/hoperun/hihope-rzg2/Makefile +# +# Copyright (C) 2020 Renesas Electronics Corporation +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := hihope-rzg2.o diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c new file mode 100644 index 0000000000..3ad04529c8 --- /dev/null +++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * board/hoperun/hihope-rzg2/hihope-rzg2.c + * This file is HiHope RZ/G2M board support. + * + * Copyright (C) 2020 Renesas Electronics Corporation + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/rmobile.h> +#include <linux/libfdt.h> + +#define RST_BASE 0xE6160000 +#define RST_CA57RESCNT (RST_BASE + 0x40) +#define RST_CODE 0xA5A5000F + +/* If the firmware passed a device tree use it for U-Boot DRAM setup. */ +extern u64 rcar_atf_boot_args[]; + +DECLARE_GLOBAL_DATA_PTR; + +void s_init(void) +{ +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +/* Kconfig forces this on, so just return 0 */ +int board_early_init_f(void) +{ + return 0; +} +#endif + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + + return 0; +} + +int fdtdec_board_setup(const void *fdt_blob) +{ + void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]); + + if (fdt_magic(atf_fdt_blob) == FDT_MAGIC) + fdt_overlay_apply_node((void *)fdt_blob, 0, atf_fdt_blob, 0); + + return 0; +} + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} + +void reset_cpu(ulong addr) +{ + writel(RST_CODE, RST_CA57RESCNT); +} + +#if defined(CONFIG_MULTI_DTB_FIT) +int board_fit_config_name_match(const char *name) +{ + /* PRR driver is not available yet */ + u32 cpu_type = rmobile_get_cpu_type(); + + if (cpu_type == RMOBILE_CPU_TYPE_R8A774A1 && + !strcmp(name, "r8a774a1-hihope-rzg2m-u-boot")) + return 0; + + return -1; +} +#endif diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig new file mode 100644 index 0000000000..11e3b3a47a --- /dev/null +++ b/configs/hihope_rzg2_defconfig @@ -0,0 +1,74 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_RMOBILE=y +CONFIG_SYS_TEXT_BASE=0x50000000 +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0xFFFE0000 +CONFIG_DM_GPIO=y +CONFIG_GPIO_HOG=y +CONFIG_RCAR_GEN3=y +CONFIG_TARGET_HIHOPE_RZG2=y +# CONFIG_SPL is not set +CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot" +CONFIG_SMBIOS_PRODUCT_NAME="" +CONFIG_FIT=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m.dtb" +CONFIG_VERSION_VARIABLE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_OF_LIST="r8a774a1-hihope-rzg2m-u-boot" +CONFIG_MULTI_DTB_FIT_LZO=y +CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CLK=y +CONFIG_CLK_RENESAS=y +CONFIG_RCAR_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_I2C=y +CONFIG_SYS_I2C_RCAR_IIC=y +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_RENESAS_SDHI=y +CONFIG_BITBANGMII=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_RENESAS_RAVB=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_SCIF_CONSOLE=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SMBIOS_MANUFACTURER="" diff --git a/include/configs/hihope-rzg2.h b/include/configs/hihope-rzg2.h new file mode 100644 index 0000000000..68a51176e3 --- /dev/null +++ b/include/configs/hihope-rzg2.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * include/configs/hihope-rzg2.h + * This file is HOPERUN HiHope RZ/G2 board configuration. + * + * Copyright (C) 2020 Renesas Electronics Corporation + */ + +#ifndef __HIHOPE_RZG2_H +#define __HIHOPE_RZG2_H + +#include "rcar-gen3-common.h" + +/* Ethernet RAVB */ +#define CONFIG_BITBANGMII_MULTI + +/* Generic Timer Definitions (use in assembler source) */ +#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ + +#endif /* __HIHOPE_RZG2_H */
On 9/18/20 6:03 PM, Biju Das wrote:
[...]
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -0,0 +1,80 @@
[...]
+#define RST_BASE 0xE6160000 +#define RST_CA57RESCNT (RST_BASE + 0x40) +#define RST_CODE 0xA5A5000F
+/* If the firmware passed a device tree use it for U-Boot DRAM setup. */ +extern u64 rcar_atf_boot_args[];
+DECLARE_GLOBAL_DATA_PTR;
+void s_init(void) +{ +}
Is this empty function needed ?
+#ifdef CONFIG_BOARD_EARLY_INIT_F +/* Kconfig forces this on, so just return 0 */
I think BOARD_EARLY_INIT_F should really be disabled in Kconfig rather than implementing empty function here.
+int board_early_init_f(void) +{
- return 0;
+} +#endif
[...]
+int fdtdec_board_setup(const void *fdt_blob) +{
- void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]);
- if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
fdt_overlay_apply_node((void *)fdt_blob, 0, atf_fdt_blob, 0);- return 0;
+}
Please use board/renesas/rcar-common/common.c , no need to duplicate the code.
+int dram_init(void) +{
- return fdtdec_setup_mem_size_base();
+}
+int dram_init_banksize(void) +{
- return fdtdec_setup_memory_banksize();
+}
+void reset_cpu(ulong addr) +{
- writel(RST_CODE, RST_CA57RESCNT);
+}
Isn't there CA53 core in the RZG2 too ?
[...]
Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH 2/2] arm: rmobile: Add HopeRun HiHope RZ/G2M board support
On 9/18/20 6:03 PM, Biju Das wrote:
[...]
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -0,0 +1,80 @@
[...]
+#define RST_BASE0xE6160000 +#define RST_CA57RESCNT(RST_BASE + 0x40) +#define RST_CODE0xA5A5000F
+/* If the firmware passed a device tree use it for U-Boot DRAM setup. +*/ extern u64 rcar_atf_boot_args[];
+DECLARE_GLOBAL_DATA_PTR;
+void s_init(void) +{ +}
Is this empty function needed ?
Yes Compilation error otherwise. This function is called from lowlevel_init_gen3.S. I believe it is place holder for doing some early initialisation such as watchdog That could be the reason all rcar gen3 boards have this empty function for eg:-[1], please correct me if you think otherwise. [1] board/renesas/salvator-x/Salvator-x.c
+#ifdef CONFIG_BOARD_EARLY_INIT_F +/* Kconfig forces this on, so just return 0 */
I think BOARD_EARLY_INIT_F should really be disabled in Kconfig rather than implementing empty function here.
Ok, will fix in v2.
For eg:- file arch/arm/Kconfig Select BOARD_EARLY_INIT_FUNCTION if !(RZA1 || TARGET_HIHOPE_RZG2)
I also noticed other boards in board/renesas directory with empty function(for eg:- ebisu,condor etc). For completeness, do you want me to fix that as well in separate patch and removing empty functions. Select BOARD_EARLY_INIT_FUNCTION if !(RZA1 || TARGET_HIHOPE_RZG2|| TARGET_EBISU || TARGET_CONDOR)
+int board_early_init_f(void) +{ +return 0; +} +#endif
[...]
+int fdtdec_board_setup(const void *fdt_blob) { +void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]);
+if (fdt_magic(atf_fdt_blob) == FDT_MAGIC) +fdt_overlay_apply_node((void *)fdt_blob, 0, atf_fdt_blob,
0);
+return 0; +}
Please use board/renesas/rcar-common/common.c , no need to duplicate the code.
OK will fix in V3.
+int dram_init(void) +{ +return fdtdec_setup_mem_size_base(); }
+int dram_init_banksize(void) +{ +return fdtdec_setup_memory_banksize(); }
+void reset_cpu(ulong addr) +{ +writel(RST_CODE, RST_CA57RESCNT); +}
Isn't there CA53 core in the RZG2 too ?
Yes, big little CPU 2xCA57 + 4 xCA53. Do you want me to add reset code for in case of CA53 boot mode???
Cheers, Biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
On 9/19/20 2:18 PM, Biju Das wrote:
Hi,
[...]
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -0,0 +1,80 @@
[...]
+#define RST_BASE0xE6160000 +#define RST_CA57RESCNT(RST_BASE + 0x40) +#define RST_CODE0xA5A5000F
+/* If the firmware passed a device tree use it for U-Boot DRAM setup. +*/ extern u64 rcar_atf_boot_args[];
+DECLARE_GLOBAL_DATA_PTR;
+void s_init(void) +{ +}
Is this empty function needed ?
Yes Compilation error otherwise. This function is called from lowlevel_init_gen3.S. I believe it is place holder for doing some early initialisation such as watchdog That could be the reason all rcar gen3 boards have this empty function for eg:-[1], please correct me if you think otherwise. [1] board/renesas/salvator-x/Salvator-x.c
Can you try fixing that with WEAK(s_init) in the lowlevel_init_gen3.S ? I think that would be much better, if anyone needs to override the function, then they can, otherwise empty WEAK function would be used.
+#ifdef CONFIG_BOARD_EARLY_INIT_F +/* Kconfig forces this on, so just return 0 */
I think BOARD_EARLY_INIT_F should really be disabled in Kconfig rather than implementing empty function here.
Ok, will fix in v2.
For eg:- file arch/arm/Kconfig Select BOARD_EARLY_INIT_FUNCTION if !(RZA1 || TARGET_HIHOPE_RZG2)
Maybe it would be better to use imply BOARD_EARLY_INIT_F , and then disable it on boards which don't need it (RZA1 and RZG2)
I also noticed other boards in board/renesas directory with empty function(for eg:- ebisu,condor etc). For completeness, do you want me to fix that as well in separate patch and removing empty functions. Select BOARD_EARLY_INIT_FUNCTION if !(RZA1 || TARGET_HIHOPE_RZG2|| TARGET_EBISU || TARGET_CONDOR)
Look at the 'imply' keyword, that might be even better.
[...]
+int fdtdec_board_setup(const void *fdt_blob) { +void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]);
+if (fdt_magic(atf_fdt_blob) == FDT_MAGIC) +fdt_overlay_apply_node((void *)fdt_blob, 0, atf_fdt_blob,
0);
+return 0; +}
Please use board/renesas/rcar-common/common.c , no need to duplicate the code.
OK will fix in V3.
Thanks
+int dram_init(void) +{ +return fdtdec_setup_mem_size_base(); }
+int dram_init_banksize(void) +{ +return fdtdec_setup_memory_banksize(); }
+void reset_cpu(ulong addr) +{ +writel(RST_CODE, RST_CA57RESCNT); +}
Isn't there CA53 core in the RZG2 too ?
Yes, big little CPU 2xCA57 + 4 xCA53. Do you want me to add reset code for in case of CA53 boot mode???
I think if you can start U-Boot on either core, then the reset function should handle both, yes.
Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH 2/2] arm: rmobile: Add HopeRun HiHope RZ/G2M board support
On 9/19/20 2:18 PM, Biju Das wrote:
Hi,
[...]
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -0,0 +1,80 @@
[...]
+#define RST_BASE0xE6160000 +#define RST_CA57RESCNT(RST_BASE + 0x40) #define
RST_CODE0xA5A5000F
+/* If the firmware passed a device tree use it for U-Boot DRAM setup. +*/ extern u64 rcar_atf_boot_args[];
+DECLARE_GLOBAL_DATA_PTR;
+void s_init(void) +{ +}
Is this empty function needed ?
Yes Compilation error otherwise. This function is called from lowlevel_init_gen3.S. I believe it is place holder for doing some early
initialisation such as watchdog That could be the reason all rcar gen3 boards have this empty function for eg:-[1], please correct me if you think otherwise.
[1] board/renesas/salvator-x/Salvator-x.c
Can you try fixing that with WEAK(s_init) in the lowlevel_init_gen3.S ? I think that would be much better, if anyone needs to override the function, then they can, otherwise empty WEAK function would be used.
OK. Will add weak function in lowlevel_init_gen3.S.
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+/* Kconfig forces this on, so just return 0 */
I think BOARD_EARLY_INIT_F should really be disabled in Kconfig rather than implementing empty function here.
Ok, will fix in v2.
For eg:- file arch/arm/Kconfig Select BOARD_EARLY_INIT_FUNCTION if !(RZA1 ||
TARGET_HIHOPE_RZG2)
Maybe it would be better to use imply BOARD_EARLY_INIT_F , and then disable it on boards which don't need it (RZA1 and RZG2)
OK Will fix this in V3.
I also noticed other boards in board/renesas directory with empty
function(for eg:- ebisu,condor etc).
For completeness, do you want me to fix that as well in separate patch and
removing empty functions.
Select BOARD_EARLY_INIT_FUNCTION if !(RZA1 ||
TARGET_HIHOPE_RZG2||
TARGET_EBISU || TARGET_CONDOR)
Look at the 'imply' keyword, that might be even better.
Will send separate patch for this.
[...]
+int fdtdec_board_setup(const void *fdt_blob) { void *atf_fdt_blob = +(void *)(rcar_atf_boot_args[1]);
+if (fdt_magic(atf_fdt_blob) == FDT_MAGIC) +fdt_overlay_apply_node((void *)fdt_blob, 0, atf_fdt_blob,
0);
+return 0; +}
Please use board/renesas/rcar-common/common.c , no need to
duplicate
the code.
OK will fix in V3.
Thanks
+int dram_init(void) +{ +return fdtdec_setup_mem_size_base(); }
+int dram_init_banksize(void) +{ +return fdtdec_setup_memory_banksize(); }
+void reset_cpu(ulong addr) +{ +writel(RST_CODE, RST_CA57RESCNT); +}
Isn't there CA53 core in the RZG2 too ?
Yes, big little CPU 2xCA57 + 4 xCA53. Do you want me to add reset code for
in case of CA53 boot mode???
I think if you can start U-Boot on either core, then the reset function should handle both, yes.
OK. Will fix this in V3.
Cheers, Biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
On 9/19/20 8:38 PM, Biju Das wrote:
[...]
+int dram_init(void) +{ +return fdtdec_setup_mem_size_base(); }
+int dram_init_banksize(void) +{ +return fdtdec_setup_memory_banksize(); }
+void reset_cpu(ulong addr) +{ +writel(RST_CODE, RST_CA57RESCNT); +}
Isn't there CA53 core in the RZG2 too ?
Yes, big little CPU 2xCA57 + 4 xCA53. Do you want me to add reset code for
in case of CA53 boot mode???
I think if you can start U-Boot on either core, then the reset function should handle both, yes.
OK. Will fix this in V3.
Thanks
On 9/18/20 6:03 PM, Biju Das wrote:
Add CPU and PRR IDs for R8A774A1(a.k.a RZ/G2M) SoC.
[...]
+static const struct udevice_id *of_soc_match_compatible(void) +{
- const struct udevice_id *of_match = soc_ids;
- int i;
- for (i = 0; i < ARRAY_SIZE(soc_ids); i++) {
if (!fdt_node_check_compatible(gd->fdt_blob, 0,of_match->compatible))return of_match;of_match++;- }
- return NULL;
+}
This should rather be a generic function, I think this is something that already exists in Linux common code too, right ?
static int rmobile_cpuinfo_idx(void) { int i = 0; u32 cpu_type = rmobile_get_cpu_type();
const struct udevice_id *match = of_soc_match_compatible();
/*
* This loop identifies CPU based on PRR register, it differentiates* RZ/G SoC's from R-Car SoC's by matching RZ/G SoC compatible string* from DT against the family_type.*/for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++)
if (rmobile_cpuinfo[i].cpu_type == cpu_type)break;
if (rmobile_cpuinfo[i].cpu_type == cpu_type) {if (match &&rmobile_cpuinfo[i].family_type == match->data)break;else if (!match &&rmobile_cpuinfo[i].family_type != SOC_RZG2)break;}
I still don't understand this, so if cpu_type == RMOBILE_CPU_TYPE_R8A7796 , then it can be either RZG2 or R8A7796, right? And there is no PRR bit or any other bit to tell those two chips apart ?
I would like to avoid using the OF match here, because that fails if you use MULTI_DTB_FIT , does it not ? So can you please check whether there might be some way to tell the two SoCs apart ?
Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
On 9/18/20 6:03 PM, Biju Das wrote:
Add CPU and PRR IDs for R8A774A1(a.k.a RZ/G2M) SoC.
[...]
+static const struct udevice_id *of_soc_match_compatible(void) { +const struct udevice_id *of_match = soc_ids; +int i;
+for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { +if (!fdt_node_check_compatible(gd->fdt_blob, 0,
of_match->compatible))+return of_match; +of_match++; +}
+return NULL; +}
This should rather be a generic function, I think this is something that already exists in Linux common code too, right ?
No. I have seen some other SoC's uses similar logic [1]& [2] .
[1] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/board/samsung/common/e... [2] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/arch/arm/mach-uniphier...
static int rmobile_cpuinfo_idx(void) { int i = 0; u32 cpu_type = rmobile_get_cpu_type(); +const struct udevice_id *match = of_soc_match_compatible();
+/*
- This loop identifies CPU based on PRR register, it differentiates
- RZ/G SoC's from R-Car SoC's by matching RZ/G SoC compatible
string
- from DT against the family_type.
- */
for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) -if (rmobile_cpuinfo[i].cpu_type == cpu_type) -break; +if (rmobile_cpuinfo[i].cpu_type == cpu_type) { +if (match &&
- rmobile_cpuinfo[i].family_type == match->data)
+break; +else if (!match &&
- rmobile_cpuinfo[i].family_type !=
SOC_RZG2)
+break; +}
I still don't understand this, so if cpu_type == RMOBILE_CPU_TYPE_R8A7796 , then it can be either RZG2 or R8A7796, right?
Yep you are right.
And there is no PRR bit or any other bit to tell those two chips apart ?
No. Currently only way you can distinguish is by SoC compatible string and family type. See [3] for SoC identification logic used to differentiate RCar and RZ/G2 [3]:- https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/driv...
I would like to avoid using the OF match here, because that fails if you use MULTI_DTB_FIT , does it not ?
No. It works OK on both RZ/G2SoC's[4] and RCar[5]
[4] MULTI_DTB_FIT logs for RZG2[HMN] boards
CPU: Renesas Electronics R8A774E1 rev 3.0 Model: HopeRun HiHope RZ/G2H with sub board DRAM: 3.9 GiB
CPU: Renesas Electronics R8A774A1 rev 1.3 Model: HopeRun HiHope RZ/G2M with sub board DRAM: 3.9 GiB
CPU: Renesas Electronics R8A774B1 rev 1.1 Model: HopeRun HiHope RZ/G2N with sub board DRAM: 3.9 GiB
[5] u-boot based on R-Car M3N using rcar3_salvator-x_defconfig, it reports proper SoC.
CPU: Renesas Electronics R8A77965 rev 1.1 Model: Renesas Salvator-XS board based on r8a77965 DRAM: 1.9 GiB Bank #0: 0x048000000 - 0x0bfffffff, 1.9 GiB
MMC: sd@ee100000: 0, sd@ee140000: 1, sd@ee160000: 2 Loading Environment from MMC... OK In: serial@e6e88000 Out: serial@e6e88000 Err: serial@e6e88000 Net: eth0: ethernet@e6800000 Hit any key to stop autoboot: 0 =>
So can you please check whether there might
be some way to tell the two SoCs apart ?
At present there is no way other than matching the SoC compatible string.
Cheers, Biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
On 9/19/20 1:37 PM, Biju Das wrote: [...]
+static const struct udevice_id *of_soc_match_compatible(void) { +const struct udevice_id *of_match = soc_ids; +int i;
+for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { +if (!fdt_node_check_compatible(gd->fdt_blob, 0,
of_match->compatible))+return of_match; +of_match++; +}
+return NULL; +}
This should rather be a generic function, I think this is something that already exists in Linux common code too, right ?
No. I have seen some other SoC's uses similar logic [1]& [2] .
I mean, this looks like Linux's soc_device_match() , so such a function is likely generic code, there is nothing platform specific to it, is there ?
[1] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/board/samsung/common/e... [2] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/arch/arm/mach-uniphier...
static int rmobile_cpuinfo_idx(void) { int i = 0; u32 cpu_type = rmobile_get_cpu_type(); +const struct udevice_id *match = of_soc_match_compatible();
+/*
- This loop identifies CPU based on PRR register, it differentiates
- RZ/G SoC's from R-Car SoC's by matching RZ/G SoC compatible
string
- from DT against the family_type.
- */
for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) -if (rmobile_cpuinfo[i].cpu_type == cpu_type) -break; +if (rmobile_cpuinfo[i].cpu_type == cpu_type) { +if (match &&
- rmobile_cpuinfo[i].family_type == match->data)
+break; +else if (!match &&
- rmobile_cpuinfo[i].family_type !=
SOC_RZG2)
+break; +}
I still don't understand this, so if cpu_type == RMOBILE_CPU_TYPE_R8A7796 , then it can be either RZG2 or R8A7796, right?
Yep you are right.
And there is no PRR bit or any other bit to tell those two chips apart ?
No. Currently only way you can distinguish is by SoC compatible string and family type. See [3] for SoC identification logic used to differentiate RCar and RZ/G2 [3]:- https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/driv...
So Linux is matching on the compatible string of DT passed from U-Boot , right ? Linux has it easier then.
But where does U-Boot get that compatible string from, in case there are multiple DTs passed to U-Boot and U-Boot needs to find out on which SoC it is running on ?
Maybe you can pass the compatible from TFA, which is already happening.
I would like to avoid using the OF match here, because that fails if you use MULTI_DTB_FIT , does it not ?
No. It works OK on both RZ/G2SoC's[4] and RCar[5]
[4] MULTI_DTB_FIT logs for RZG2[HMN] boards
CPU: Renesas Electronics R8A774E1 rev 3.0 Model: HopeRun HiHope RZ/G2H with sub board DRAM: 3.9 GiB
CPU: Renesas Electronics R8A774A1 rev 1.3 Model: HopeRun HiHope RZ/G2M with sub board DRAM: 3.9 GiB
CPU: Renesas Electronics R8A774B1 rev 1.1 Model: HopeRun HiHope RZ/G2N with sub board DRAM: 3.9 GiB
[5] u-boot based on R-Car M3N using rcar3_salvator-x_defconfig, it reports proper SoC.
CPU: Renesas Electronics R8A77965 rev 1.1 Model: Renesas Salvator-XS board based on r8a77965 DRAM: 1.9 GiB Bank #0: 0x048000000 - 0x0bfffffff, 1.9 GiB
MMC: sd@ee100000: 0, sd@ee140000: 1, sd@ee160000: 2 Loading Environment from MMC... OK In: serial@e6e88000 Out: serial@e6e88000 Err: serial@e6e88000 Net: eth0: ethernet@e6800000 Hit any key to stop autoboot: 0 =>
So can you please check whether there might
be some way to tell the two SoCs apart ?
At present there is no way other than matching the SoC compatible string.
Thinking about it a bit more, if you were to use the compatible string psssed from TFA in the / node, you could iterate over soc_ids[] array and return RMOBILE_CPU_TYPE_x , which could be stored there as .data . Then you won't even need the SOC_RZG2 and it would all be faster, as all you would need is a single pass over a smaller array.
Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
On 9/19/20 1:37 PM, Biju Das wrote: [...]
+static const struct udevice_id *of_soc_match_compatible(void) { +const struct udevice_id *of_match = soc_ids; int i;
+for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { if +(!fdt_node_check_compatible(gd->fdt_blob, 0,
of_match->compatible))+return of_match; +of_match++; +}
+return NULL; +}
This should rather be a generic function, I think this is something that already exists in Linux common code too, right ?
No. I have seen some other SoC's uses similar logic [1]& [2] .
I mean, this looks like Linux's soc_device_match() , so such a function is likely generic code, there is nothing platform specific to it, is there ?
I agree, we need to have a new generic api for such purpose. The Linux/U-boot soc_device_match is for adding quirks with in different ES version of same SoC.
What we here need is similar to of_match_compatible for array of different SoC's. Can you please confirm [1] drivers/soc/soc-uclass.c is the right place for such generic api?
[1] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/drivers/soc/soc-uclass...
[1] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/board/samsung/co mmon/exynos5-dt-types.c#L246 [2] https://elixir.bootlin.com/u-boot/v2020.10-rc4/source/arch/arm/mach-un iphier/boards.c#L156
static int rmobile_cpuinfo_idx(void) { int i = 0; u32 cpu_type = rmobile_get_cpu_type(); +const struct udevice_id *match = of_soc_match_compatible();
+/*
- This loop identifies CPU based on PRR register, it
+differentiates
- RZ/G SoC's from R-Car SoC's by matching RZ/G SoC compatible
string
- from DT against the family_type.
- */
for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) -if (rmobile_cpuinfo[i].cpu_type == cpu_type) -break; +if (rmobile_cpuinfo[i].cpu_type == cpu_type) { if (match &&
- rmobile_cpuinfo[i].family_type == match->data) break; else if
+(!match && rmobile_cpuinfo[i].family_type !=
SOC_RZG2)
+break; +}
I still don't understand this, so if cpu_type == RMOBILE_CPU_TYPE_R8A7796 , then it can be either RZG2 or R8A7796,
right?
Yep you are right.
And there is no PRR bit or any other bit to tell those two chips apart ?
No. Currently only way you can distinguish is by SoC compatible string and
family type.
See [3] for SoC identification logic used to differentiate RCar and RZ/G2 [3]:- https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tre e/drivers/soc/renesas/renesas-soc.c?h=v5.9-rc5#n311
So Linux is matching on the compatible string of DT passed from U-Boot , right ? Linux has it easier then.
But where does U-Boot get that compatible string from, in case there are multiple DTs passed to U-Boot and U-Boot needs to find out on which SoC it is running on ?
Maybe you can pass the compatible from TFA, which is already happening.
I would like to avoid using the OF match here, because that fails if you use MULTI_DTB_FIT , does it not ?
No. It works OK on both RZ/G2SoC's[4] and RCar[5]
[4] MULTI_DTB_FIT logs for RZG2[HMN] boards
CPU: Renesas Electronics R8A774E1 rev 3.0 Model: HopeRun HiHope RZ/G2H with sub board DRAM: 3.9 GiB
CPU: Renesas Electronics R8A774A1 rev 1.3 Model: HopeRun HiHope RZ/G2M with sub board DRAM: 3.9 GiB
CPU: Renesas Electronics R8A774B1 rev 1.1 Model: HopeRun HiHope RZ/G2N with sub board DRAM: 3.9 GiB
[5] u-boot based on R-Car M3N using rcar3_salvator-x_defconfig, it reports
proper SoC.
CPU: Renesas Electronics R8A77965 rev 1.1 Model: Renesas Salvator-XS board based on r8a77965 DRAM: 1.9 GiB Bank #0: 0x048000000 - 0x0bfffffff, 1.9 GiB
MMC: sd@ee100000: 0, sd@ee140000: 1, sd@ee160000: 2 Loading Environment from MMC... OK In: serial@e6e88000 Out: serial@e6e88000 Err: serial@e6e88000 Net: eth0: ethernet@e6800000 Hit any key to stop autoboot: 0 =>
So can you please check whether there might
be some way to tell the two SoCs apart ?
At present there is no way other than matching the SoC compatible string.
Thinking about it a bit more, if you were to use the compatible string psssed from TFA in the / node, you could iterate over soc_ids[] array and return RMOBILE_CPU_TYPE_x , which could be stored there as .data . Then you won't even need the SOC_RZG2 and it would all be faster, as all you would need is a single pass over a smaller array.
Good point. Ok will get rid of SOC_RZG2, will use smaller array forRZG2.
Are you suggesting to modify "arch_misc_init" directly set "platform" environment variable using match logic, which use a smaller array Compared to rmobile_cpuinfo.
Basically we match the compatible string from TFA, .data from " RMOBILE_CPU_TYPE_x" matched against PRR values and set the platform type .
Cheers, Biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
On 9/19/20 8:35 PM, Biju Das wrote:
Hi,
[...]
+static const struct udevice_id *of_soc_match_compatible(void) { +const struct udevice_id *of_match = soc_ids; int i;
+for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { if +(!fdt_node_check_compatible(gd->fdt_blob, 0,
of_match->compatible))+return of_match; +of_match++; +}
+return NULL; +}
This should rather be a generic function, I think this is something that already exists in Linux common code too, right ?
No. I have seen some other SoC's uses similar logic [1]& [2] .
I mean, this looks like Linux's soc_device_match() , so such a function is likely generic code, there is nothing platform specific to it, is there ?
I agree, we need to have a new generic api for such purpose. The Linux/U-boot soc_device_match is for adding quirks with in different ES version of same SoC.
What we here need is similar to of_match_compatible for array of different SoC's. Can you please confirm [1] drivers/soc/soc-uclass.c is the right place for such generic api?
Can you use of_machine_is_compatible() ?
[...]
So can you please check whether there might
be some way to tell the two SoCs apart ?
At present there is no way other than matching the SoC compatible string.
Thinking about it a bit more, if you were to use the compatible string psssed from TFA in the / node, you could iterate over soc_ids[] array and return RMOBILE_CPU_TYPE_x , which could be stored there as .data . Then you won't even need the SOC_RZG2 and it would all be faster, as all you would need is a single pass over a smaller array.
Good point. Ok will get rid of SOC_RZG2, will use smaller array forRZG2.
Are you suggesting to modify "arch_misc_init" directly set "platform" environment variable using match logic, which use a smaller array Compared to rmobile_cpuinfo.
Basically we match the compatible string from TFA, .data from " RMOBILE_CPU_TYPE_x" matched against PRR values and set the platform type .
I don't think you need to modify anything then, the DT passed from TFA would contain the correct compatible string in / node, and that gets merged into the U-Boot control DT early on in fdtdec_board_setup() in: board/renesas/rcar-common/common.c so all you would have to do is use of_machine_is_compatible("renesas,r8a7-something-");
Would that work ?
Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
On 9/19/20 8:35 PM, Biju Das wrote:
Hi,
[...]
+static const struct udevice_id *of_soc_match_compatible(void) { +const struct udevice_id *of_match = soc_ids; int i;
+for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { if +(!fdt_node_check_compatible(gd->fdt_blob, 0,
of_match->compatible))+return of_match; +of_match++; +}
+return NULL; +}
This should rather be a generic function, I think this is something that already exists in Linux common code too, right ?
No. I have seen some other SoC's uses similar logic [1]& [2] .
I mean, this looks like Linux's soc_device_match() , so such a function is likely generic code, there is nothing platform specific to it, is
there ?
I agree, we need to have a new generic api for such purpose. The Linux/U-
boot soc_device_match is for adding quirks with in different ES version of same SoC.
What we here need is similar to of_match_compatible for array of
different SoC's.
Can you please confirm [1] drivers/soc/soc-uclass.c is the right place for
such generic api?
Can you use of_machine_is_compatible() ?
Yes, will use that one.
[...]
So can you please check whether there might
be some way to tell the two SoCs apart ?
At present there is no way other than matching the SoC compatible
string.
Thinking about it a bit more, if you were to use the compatible string psssed from TFA in the / node, you could iterate over soc_ids[] array and return RMOBILE_CPU_TYPE_x , which could be stored
there as .data .
Then you won't even need the SOC_RZG2 and it would all be faster, as all you would need is a single pass over a smaller array.
Good point. Ok will get rid of SOC_RZG2, will use smaller array forRZG2.
Are you suggesting to modify "arch_misc_init" directly set "platform" environment variable using match logic, which use a smaller array
Compared to rmobile_cpuinfo.
Basically we match the compatible string from TFA, .data from "
RMOBILE_CPU_TYPE_x" matched against PRR values and set the platform type .
I don't think you need to modify anything then, the DT passed from TFA would contain the correct compatible string in / node, and that gets merged into the U-Boot control DT early on in fdtdec_board_setup() in: board/renesas/rcar-common/common.c so all you would have to do is use of_machine_is_compatible("renesas,r8a7-something-");
Would that work ?
Yes, I have added the below function to get cpu name from small array tfa_cpu_table. Will send V3 with this changes.
+static const u8* get_cpu_name(void) +{ +u32 cpu_type = rmobile_get_cpu_type(); + +return is_tfa_soc_match(cpu_type) ? +tfa_cpuinfo[tfa_cpuinfo_idx(cpu_type)].cpu_name : +rmobile_cpuinfo[rmobile_cpuinfo_idx(cpu_type)].cpu_name; +}
+static int tfa_cpuinfo_idx(u32 cpu_type) +{ +int i = 0; + +for (; i < ARRAY_SIZE(tfa_cpuinfo); i++) +if (tfa_cpuinfo[i].cpu_type == cpu_type) +break; + +return i; +} + +static bool is_tfa_soc_match(u32 cpu_type) +{ +int idx = tfa_cpuinfo_idx(cpu_type); + +if (idx != ARRAY_SIZE(tfa_cpuinfo) && + of_machine_is_compatible(tfa_cpuinfo[idx].compatible)) +return true; + +return false; +}
Cheers, biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
On 9/21/20 12:30 PM, Biju Das wrote:
[...]
I don't think you need to modify anything then, the DT passed from TFA would contain the correct compatible string in / node, and that gets merged into the U-Boot control DT early on in fdtdec_board_setup() in: board/renesas/rcar-common/common.c so all you would have to do is use of_machine_is_compatible("renesas,r8a7-something-");
Would that work ?
Yes, I have added the below function to get cpu name from small array tfa_cpu_table. Will send V3 with this changes.
+static const u8* get_cpu_name(void) +{ +u32 cpu_type = rmobile_get_cpu_type();
+return is_tfa_soc_match(cpu_type) ? +tfa_cpuinfo[tfa_cpuinfo_idx(cpu_type)].cpu_name : +rmobile_cpuinfo[rmobile_cpuinfo_idx(cpu_type)].cpu_name; +}
+static int tfa_cpuinfo_idx(u32 cpu_type) +{ +int i = 0;
+for (; i < ARRAY_SIZE(tfa_cpuinfo); i++) +if (tfa_cpuinfo[i].cpu_type == cpu_type) +break;
+return i; +}
+static bool is_tfa_soc_match(u32 cpu_type) +{ +int idx = tfa_cpuinfo_idx(cpu_type);
+if (idx != ARRAY_SIZE(tfa_cpuinfo) &&
- of_machine_is_compatible(tfa_cpuinfo[idx].compatible))
+return true;
+return false; +}
There might be even better way. Look at rmobile_get_cpu_type() , that is a weak function. So if you can implement one for RZG2 , then that function can return CPU_TYPE_RZG2_something ; and rmobile_get_cpu_type() for RZG2 can be implemented using the match on /compatible string .
Take a look at how arch/arm/mach-rmobile/cpu_info-rcar.c implements it using PRR, you might need cpu_info-rzg.c I think.
Also, I hope there should already be some function to which you provide a compatible string and a table of supported compatible strings (of match table), from which it will return the .data field of the matching entry in that table. And that .data field can already be the CPU_TYPE_RZG_something , so you don't have to implement the table look up again.
What do you think ?
Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
On 9/21/20 12:30 PM, Biju Das wrote:
[...]
I don't think you need to modify anything then, the DT passed from TFA would contain the correct compatible string in / node, and that gets merged into the U-Boot control DT early on in fdtdec_board_setup()
in:
board/renesas/rcar-common/common.c so all you would have to do is use of_machine_is_compatible("renesas,r8a7-something-");
Would that work ?
Yes, I have added the below function to get cpu name from small array
tfa_cpu_table. Will send V3 with this changes.
+static const u8* get_cpu_name(void) +{ +u32 cpu_type = rmobile_get_cpu_type();
+return is_tfa_soc_match(cpu_type) ? +tfa_cpuinfo[tfa_cpuinfo_idx(cpu_type)].cpu_name : +rmobile_cpuinfo[rmobile_cpuinfo_idx(cpu_type)].cpu_name; +}
+static int tfa_cpuinfo_idx(u32 cpu_type) { int i = 0;
+for (; i < ARRAY_SIZE(tfa_cpuinfo); i++) if (tfa_cpuinfo[i].cpu_type +== cpu_type) break;
+return i; +}
+static bool is_tfa_soc_match(u32 cpu_type) { int idx = +tfa_cpuinfo_idx(cpu_type);
+if (idx != ARRAY_SIZE(tfa_cpuinfo) &&
- of_machine_is_compatible(tfa_cpuinfo[idx].compatible))
+return true;
+return false; +}
There might be even better way. Look at rmobile_get_cpu_type() , that is a weak function. So if you can implement one for RZG2 , then that function can return CPU_TYPE_RZG2_something ; and rmobile_get_cpu_type() for RZG2 can be implemented using the match on /compatible string .
Take a look at how arch/arm/mach-rmobile/cpu_info-rcar.c implements it using PRR, you might need cpu_info-rzg.c I think.
As mentioned in the commit message PRR values of both R-Car M3-W and RZ/G2M are identical. So there is no need for separate cpu_info-rzg.c. I believe it is duplication of code.
We are matching PRR first (device binding) and then use TFA SoC compatible string to differentiate from R-Car family. Please see the diff below[3].
Also, I hope there should already be some function to which you provide a compatible string and a table of supported compatible strings (of match table), from which it will return the .data field of the matching entry in that table. And that .data field can already be the CPU_TYPE_RZG_something , so you don't have to implement the table look up again.
What do you think ?
Device binding is important use case, run time you need to match PRR, that is same for both RCar-M3W and RZ/G2E. In RZ/G2 case, we miss device binding if just go with TFA compatible Approach. So we need both.
What do you think?
[3] +static const struct { +char *compatible; +u16 cpu_type; +u8 cpu_name[10]; +} tfa_cpuinfo[] = { +{ "renesas,r8a774a1", RMOBILE_CPU_TYPE_R8A774A1, "R8A774A1" }, +{ }, +}; + +static int tfa_cpuinfo_idx(u32 cpu_type) +{ +int i = 0; + +for (; i < ARRAY_SIZE(tfa_cpuinfo); i++) +if (tfa_cpuinfo[i].cpu_type == cpu_type) +break; + +return i; +} + +#if CONFIG_IS_ENABLED(OF_CONTROL) +static bool is_tfa_soc_match(u32 cpu_type) +{ +int idx = tfa_cpuinfo_idx(cpu_type); + +if (idx != ARRAY_SIZE(tfa_cpuinfo) && + of_machine_is_compatible(tfa_cpuinfo[idx].compatible)) +return true; + +return false; +} +#else +static bool __is_tfa_soc_match(u32 cpu_type) +{ +return false; +} +bool is_tfa_soc_match(u32 cpu_type) +__attribute__((weak, alias("__is_tfa_soc_match"))); +#endif + /* CPU infomation table */ static const struct { u16 cpu_type; @@ -74,10 +115,9 @@ static const struct { { 0x0, "CPU" }, };
-static int rmobile_cpuinfo_idx(void) +static int rmobile_cpuinfo_idx(u32 cpu_type) { int i = 0; -u32 cpu_type = rmobile_get_cpu_type();
for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) if (rmobile_cpuinfo[i].cpu_type == cpu_type) @@ -86,14 +126,24 @@ static int rmobile_cpuinfo_idx(void) return i; }
+static const u8 *get_cpu_name(void) +{ +u32 cpu_type = rmobile_get_cpu_type(); + +return is_tfa_soc_match(cpu_type) ? +tfa_cpuinfo[tfa_cpuinfo_idx(cpu_type)].cpu_name : +rmobile_cpuinfo[rmobile_cpuinfo_idx(cpu_type)].cpu_name; +} + #ifdef CONFIG_ARCH_MISC_INIT int arch_misc_init(void) { -int i, idx = rmobile_cpuinfo_idx(); +const u8 *cpu_name = get_cpu_name(); char cpu[10] = { 0 }; +int i;
for (i = 0; i < sizeof(cpu); i++) -cpu[i] = tolower(rmobile_cpuinfo[idx].cpu_name[i]); +cpu[i] = tolower(cpu_name[i]);
env_set("platform", cpu);
@@ -103,10 +153,8 @@ int arch_misc_init(void)
int print_cpuinfo(void) { -int i = rmobile_cpuinfo_idx(); - printf("CPU: Renesas Electronics %s rev %d.%d\n", -rmobile_cpuinfo[i].cpu_name, rmobile_get_cpu_rev_integer(), +get_cpu_name(), rmobile_get_cpu_rev_integer(), rmobile_get_cpu_rev_fraction());
Cheers, Biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
Hi Marek,
-----Original Message----- From: Biju Das Sent: 21 September 2020 18:30 To: Marek Vasut marek.vasut@gmail.com; Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: u-boot@lists.denx.de; Chris Paterson Chris.Paterson2@renesas.com; Prabhakar Mahadev Lad prabhakar.mahadev-lad.rj@bp.renesas.com Subject: RE: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
Hi Marek,
Thanks for the feedback.
Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
On 9/21/20 12:30 PM, Biju Das wrote:
[...]
I don't think you need to modify anything then, the DT passed from TFA would contain the correct compatible string in / node, and that gets merged into the U-Boot control DT early on in fdtdec_board_setup()
in:
board/renesas/rcar-common/common.c so all you would have to do is use of_machine_is_compatible("renesas,r8a7-something-");
Would that work ?
Yes, I have added the below function to get cpu name from small array
tfa_cpu_table. Will send V3 with this changes.
+static const u8* get_cpu_name(void) { +u32 cpu_type = rmobile_get_cpu_type();
+return is_tfa_soc_match(cpu_type) ? +tfa_cpuinfo[tfa_cpuinfo_idx(cpu_type)].cpu_name : +rmobile_cpuinfo[rmobile_cpuinfo_idx(cpu_type)].cpu_name; +}
+static int tfa_cpuinfo_idx(u32 cpu_type) { int i = 0;
+for (; i < ARRAY_SIZE(tfa_cpuinfo); i++) if +(tfa_cpuinfo[i].cpu_type == cpu_type) break;
+return i; +}
+static bool is_tfa_soc_match(u32 cpu_type) { int idx = +tfa_cpuinfo_idx(cpu_type);
+if (idx != ARRAY_SIZE(tfa_cpuinfo) &&
- of_machine_is_compatible(tfa_cpuinfo[idx].compatible))
+return true;
+return false; +}
There might be even better way. Look at rmobile_get_cpu_type() , that is a weak function. So if you can implement one for RZG2 , then that function can return CPU_TYPE_RZG2_something ; and rmobile_get_cpu_type() for RZG2 can be implemented using the match on
/compatible string .
Take a look at how arch/arm/mach-rmobile/cpu_info-rcar.c implements it using PRR, you might need cpu_info-rzg.c I think.
As mentioned in the commit message PRR values of both R-Car M3-W and RZ/G2M are identical. So there is no need for separate cpu_info-rzg.c. I believe it is duplication of code.
We are matching PRR first (device binding) and then use TFA SoC compatible string to differentiate from R-Car family. Please see the diff below[3].
Also, I hope there should already be some function to which you provide a compatible string and a table of supported compatible strings (of match table), from which it will return the .data field of the matching entry in that table. And that .data field can already be the CPU_TYPE_RZG_something , so you don't have to implement the table
look up again.
What do you think ?
Thinking further, we can define CPU_TYPE_RZG_MASK as 0x1000. The value CPU_TYPE_RZG_MASK | SOC_PR Is added into tfa_cpu_info table.
We just match PRR of the SoC and compatible string from TFA with smaller array table. If match found, we set cputype= CPU_TYPE_RZG_MASK | SOC_PR. Then the remaining logic in the code works as usual and changes are minimal.
I prefer this match function to be vendor specific, iterating cputype in smaller array(tfa_cpu_info ) is faster than iterating compatible string from device tree.
Please share your views on this.
Cheers, Biju
Device binding is important use case, run time you need to match PRR, that is same for both RCar-M3W and RZ/G2E. In RZ/G2 case, we miss device binding if just go with TFA compatible Approach. So we need both.
What do you think?
[3] +static const struct { +char *compatible; +u16 cpu_type; +u8 cpu_name[10]; +} tfa_cpuinfo[] = { +{ "renesas,r8a774a1", RMOBILE_CPU_TYPE_R8A774A1, "R8A774A1" }, +{ }, +};
+static int tfa_cpuinfo_idx(u32 cpu_type) { +int i = 0;
+for (; i < ARRAY_SIZE(tfa_cpuinfo); i++) +if (tfa_cpuinfo[i].cpu_type == cpu_type) +break;
+return i; +}
+#if CONFIG_IS_ENABLED(OF_CONTROL) +static bool is_tfa_soc_match(u32 cpu_type) { +int idx = tfa_cpuinfo_idx(cpu_type);
+if (idx != ARRAY_SIZE(tfa_cpuinfo) &&
- of_machine_is_compatible(tfa_cpuinfo[idx].compatible))
+return true;
+return false; +} +#else +static bool __is_tfa_soc_match(u32 cpu_type) { +return false; +} +bool is_tfa_soc_match(u32 cpu_type) +__attribute__((weak, alias("__is_tfa_soc_match"))); #endif
/* CPU infomation table */ static const struct { u16 cpu_type; @@ -74,10 +115,9 @@ static const struct { { 0x0, "CPU" }, };
-static int rmobile_cpuinfo_idx(void) +static int rmobile_cpuinfo_idx(u32 cpu_type) { int i = 0; -u32 cpu_type = rmobile_get_cpu_type();
for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) if (rmobile_cpuinfo[i].cpu_type == cpu_type) @@ -86,14 +126,24 @@ static int rmobile_cpuinfo_idx(void) return i; }
+static const u8 *get_cpu_name(void) +{ +u32 cpu_type = rmobile_get_cpu_type();
+return is_tfa_soc_match(cpu_type) ? +tfa_cpuinfo[tfa_cpuinfo_idx(cpu_type)].cpu_name :
rmobile_cpuinfo[rmobile_cpuinfo_idx(cpu_type)].cpu_name; +}
#ifdef CONFIG_ARCH_MISC_INIT int arch_misc_init(void) { -int i, idx = rmobile_cpuinfo_idx(); +const u8 *cpu_name = get_cpu_name(); char cpu[10] = { 0 }; +int i;
for (i = 0; i < sizeof(cpu); i++) -cpu[i] = tolower(rmobile_cpuinfo[idx].cpu_name[i]); +cpu[i] = tolower(cpu_name[i]);
env_set("platform", cpu);
@@ -103,10 +153,8 @@ int arch_misc_init(void)
int print_cpuinfo(void) { -int i = rmobile_cpuinfo_idx();
printf("CPU: Renesas Electronics %s rev %d.%d\n", -rmobile_cpuinfo[i].cpu_name, rmobile_get_cpu_rev_integer(), +get_cpu_name(), rmobile_get_cpu_rev_integer(), rmobile_get_cpu_rev_fraction());
Cheers, Biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
Hi Marek,
Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
On 9/21/20 12:30 PM, Biju Das wrote:
[...]
I don't think you need to modify anything then, the DT passed from TFA would contain the correct compatible string in / node, and that gets merged into the U-Boot control DT early on in fdtdec_board_setup()
in:
board/renesas/rcar-common/common.c so all you would have to do is use of_machine_is_compatible("renesas,r8a7-something-");
Would that work ?
Yes, I have added the below function to get cpu name from small array
tfa_cpu_table. Will send V3 with this changes.
+static const u8* get_cpu_name(void) { +u32 cpu_type = rmobile_get_cpu_type();
+return is_tfa_soc_match(cpu_type) ? +tfa_cpuinfo[tfa_cpuinfo_idx(cpu_type)].cpu_name : +rmobile_cpuinfo[rmobile_cpuinfo_idx(cpu_type)].cpu_name; +}
+static int tfa_cpuinfo_idx(u32 cpu_type) { int i = 0;
+for (; i < ARRAY_SIZE(tfa_cpuinfo); i++) if +(tfa_cpuinfo[i].cpu_type == cpu_type) break;
+return i; +}
+static bool is_tfa_soc_match(u32 cpu_type) { int idx = +tfa_cpuinfo_idx(cpu_type);
+if (idx != ARRAY_SIZE(tfa_cpuinfo) &&
- of_machine_is_compatible(tfa_cpuinfo[idx].compatible))
+return true;
+return false; +}
There might be even better way. Look at rmobile_get_cpu_type() , that is a weak function. So if you can implement one for RZG2 , then that function can return CPU_TYPE_RZG2_something ; and rmobile_get_cpu_type() for RZG2 can be implemented using the match on
/compatible string .
Take a look at how arch/arm/mach-rmobile/cpu_info-rcar.c implements it using PRR, you might need cpu_info-rzg.c I think.
As mentioned in the commit message PRR values of both R-Car M3-W and RZ/G2M are identical. So there is no need for separate cpu_info-rzg.c. I believe it is duplication of code.
We are matching PRR first (device binding) and then use TFA SoC compatible string to differentiate from R-Car family. Please see the diff below[3].
Also, I hope there should already be some function to which you provide a compatible string and a table of supported compatible strings (of match table), from which it will return the .data field of the matching entry in that table. And that .data field can already be the CPU_TYPE_RZG_something , so you don't have to implement the table
look up again.
What do you think ?
Thinking further, we can define CPU_TYPE_RZG_MASK as 0x1000. The value CPU_TYPE_RZG_MASK | SOC_PR Is added into tfa_cpu_info table.
We just match PRR of the SoC and compatible string from TFA with smaller array table. If match found, we set cputype= CPU_TYPE_RZG_MASK | SOC_PR. Then the remaining logic in the code works as usual and changes are minimal.
I prefer this match function to be vendor specific, iterating cputype in smaller array(tfa_cpu_info ) is faster than iterating compatible string from device tree.
Please share your views on this.
The new diffs looks like this. I will send V3.
As you suggested, I have used match function which returns RZG2_CPU_ID.
+#if CONFIG_IS_ENABLED(OF_CONTROL) +static const struct udevice_id tfa_soc_ids[] = { +{ .compatible = "renesas,r8a774a1", .data = RMOBILE_CPU_TYPE_R8A774A1 }, +{ }, +}; + +static const u16 get_rzg_soc_cpu_type(void) +{ +const struct udevice_id *of_match = tfa_soc_ids; +u32 cpu_type = rmobile_get_cpu_type(); +int i; + +for (i = 0; i < ARRAY_SIZE(tfa_soc_ids); i++) { +if (cpu_type == of_match->data && + of_machine_is_compatible(of_match->compatible)) +return (cpu_type | RZG_CPU_MASK); +of_match++; +} + +return 0; +} +#else +static const const u16 __get_rzg_soc_cpu_type(void) +{ +return 0; +} + +static const const u16 get_rzg_soc_cpu_type(void) +__attribute__((weak, alias("__get_rzg_soc_cpu_type"))); +#endif + /* CPU infomation table */ static const struct { u16 cpu_type; @@ -59,6 +91,7 @@ static const struct { } rmobile_cpuinfo[] = { { RMOBILE_CPU_TYPE_SH73A0, "SH73A0" }, { RMOBILE_CPU_TYPE_R8A7740, "R8A7740" }, +{ RMOBILE_CPU_TYPE_R8A774A1 | RZG_CPU_MASK, "R8A774A1" }, { RMOBILE_CPU_TYPE_R8A7790, "R8A7790" }, { RMOBILE_CPU_TYPE_R8A7791, "R8A7791" }, { RMOBILE_CPU_TYPE_R8A7792, "R8A7792" }, @@ -77,7 +110,8 @@ static const struct { static int rmobile_cpuinfo_idx(void) { int i = 0; -u32 cpu_type = rmobile_get_cpu_type(); +u16 rzg2_cpu_type = get_rzg_soc_cpu_type(); +u32 cpu_type = rzg2_cpu_type ? rzg2_cpu_type : rmobile_get_cpu_type();
Device binding is important use case, run time you need to match PRR, that is same for both RCar-M3W and RZ/G2E. In RZ/G2 case, we miss device binding if just go with TFA compatible Approach. So we need both.
Please look at the code above, looks like we don't need generic function. Since we need to compare both CPUID and Compatible string Iterating through CPU ID is much faster than iterating through compatible string.
Cheers, Biju
Renesas Electronics Europe GmbH, Geschaeftsfuehrer/President: Carsten Jauch, Sitz der Gesellschaft/Registered office: Duesseldorf, Arcadiastrasse 10, 40472 Duesseldorf, Germany, Handelsregister/Commercial Register: Duesseldorf, HRB 3708 USt-IDNr./Tax identification no.: DE 119353406 WEEE-Reg.-Nr./WEEE reg. no.: DE 14978647
On 9/21/20 7:29 PM, Biju Das wrote:
[...]
There might be even better way. Look at rmobile_get_cpu_type() , that is a weak function. So if you can implement one for RZG2 , then that function can return CPU_TYPE_RZG2_something ; and rmobile_get_cpu_type() for RZG2 can be implemented using the match on /compatible string .
Take a look at how arch/arm/mach-rmobile/cpu_info-rcar.c implements it using PRR, you might need cpu_info-rzg.c I think.
As mentioned in the commit message PRR values of both R-Car M3-W and RZ/G2M are identical. So there is no need for separate cpu_info-rzg.c. I believe it is duplication of code.
I wonder whether it wouldn't be easier to simply ignore PRR on RZG altogether, and simply match on the /compatible string from the DT.
We are matching PRR first (device binding) and then use TFA SoC compatible string to differentiate from R-Car family. Please see the diff below[3].
I wonder whether we need the PRR matching at all ?
Also, I hope there should already be some function to which you provide a compatible string and a table of supported compatible strings (of match table), from which it will return the .data field of the matching entry in that table. And that .data field can already be the CPU_TYPE_RZG_something , so you don't have to implement the table look up again.
What do you think ?
Device binding is important use case, run time you need to match PRR, that is same for both RCar-M3W and RZ/G2E. In RZ/G2 case, we miss device binding if just go with TFA compatible Approach. So we need both.
What do you think?
[3] +static const struct { +char *compatible; +u16 cpu_type; +u8 cpu_name[10]; +} tfa_cpuinfo[] = { +{ "renesas,r8a774a1", RMOBILE_CPU_TYPE_R8A774A1, "R8A774A1" }, +{ }, +};
btw Can you please fix your mailer so it doesn't drop indent ? It's real hard to read the code.
[...]
participants (2)
-
Biju Das -
Marek Vasut