[U-Boot] [PATCH resend] Added watchdog support for davinchi_dm365evm
--- arch/arm/cpu/arm926ejs/davinci/dm365.c | 61 ++++++++++++++++++++++++ arch/arm/include/asm/arch-davinci/timer_defs.h | 2 + board/davinci/dm365evm/dm365evm.c | 19 ++++++++ include/configs/davinci_dm365evm.h | 11 +++++ 4 files changed, 93 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365.c b/arch/arm/cpu/arm926ejs/davinci/dm365.c index 56c1bc0..48f9631 100644 --- a/arch/arm/cpu/arm926ejs/davinci/dm365.c +++ b/arch/arm/cpu/arm926ejs/davinci/dm365.c @@ -20,6 +20,7 @@ */
#include <common.h> +#include <asm/io.h> #include <asm/arch/hardware.h>
void davinci_enable_uart0(void) @@ -33,3 +34,63 @@ void davinci_enable_i2c(void) lpsc_on(DAVINCI_LPSC_I2C); } #endif + +#ifdef CONFIG_HW_WATCHDOG +static struct davinci_timer * const wdttimer = + (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE; + +/* WDTCR bit definitions */ +#define WDEN (1 << 14) +#define WDFLAG (1 << 15) +#define WDKEY_SEQ0 (0xa5c6 << 16) +#define WDKEY_SEQ1 (0xda7e << 16) + +/* TCR bit definitions */ +#define ENAMODE12_DISABLED (0 << 6) +#define ENAMODE12_ONESHOT (1 << 6) +#define ENAMODE12_PERIODIC (2 << 6) + +/* TGCR bit definitions */ +#define TIM12RS_UNRESET (1 << 0) +#define TIM34RS_UNRESET (1 << 1) +#define TIMMODE_64BIT_WDOG (2 << 2) + +void davinci_dm365_hw_watchdog_enable(void) +{ + u32 timer_margin; + ulong wdt_freq; + + /* disable, internal clock source */ + writel(0x0, &wdttimer->tcr); + /* reset timer, set mode to 64-bit watchdog, and unreset */ + writel(0x0, &wdttimer->tgcr); + writel(TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET, &wdttimer->tgcr); + /* clear counter regs */ + writel(0x0, &wdttimer->tim12); + writel(0x0, &wdttimer->tim34); + + /* set timeout period */ + wdt_freq = CONFIG_SYS_HZ_CLOCK; + printf("Setting watchdog period to %llu ticks == %is * %luHz\n",((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq), CONFIG_SYS_WDT_PERIOD_SECONDS, wdt_freq); + timer_margin = (((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq) & 0xffffffff); + writel(timer_margin, &wdttimer->prd12); + timer_margin = (((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq) >> 32); + writel(timer_margin, &wdttimer->prd34); + + /* enable run continuously */ + writel(ENAMODE12_PERIODIC, &wdttimer->tcr); + + /* put watchdog in pre-active state */ + writel(WDKEY_SEQ0 | WDEN, &wdttimer->wdtcr); + /* put watchdog in active state */ + writel(WDKEY_SEQ1 | WDEN, &wdttimer->wdtcr); +} + +void davinci_dm365_hw_watchdog_reset(void) +{ + writel(WDKEY_SEQ0, &wdttimer->wdtcr); + writel(WDKEY_SEQ1, &wdttimer->wdtcr); +} + +#endif + diff --git a/arch/arm/include/asm/arch-davinci/timer_defs.h b/arch/arm/include/asm/arch-davinci/timer_defs.h index 914ae07..93f788c 100644 --- a/arch/arm/include/asm/arch-davinci/timer_defs.h +++ b/arch/arm/include/asm/arch-davinci/timer_defs.h @@ -56,5 +56,7 @@ struct davinci_timer { #ifdef CONFIG_HW_WATCHDOG void davinci_hw_watchdog_enable(void); void davinci_hw_watchdog_reset(void); +void davinci_dm365_hw_watchdog_enable(void); +void davinci_dm365_hw_watchdog_reset(void); #endif #endif /* _TIMER_DEFS_H_ */ diff --git a/board/davinci/dm365evm/dm365evm.c b/board/davinci/dm365evm/dm365evm.c index ac54106..19e3527 100644 --- a/board/davinci/dm365evm/dm365evm.c +++ b/board/davinci/dm365evm/dm365evm.c @@ -29,6 +29,9 @@ #include <mmc.h> #include <asm/arch/sdmmc_defs.h> #endif +#ifdef CONFIG_HW_WATCHDOG +#include <asm/arch/timer_defs.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -150,3 +153,19 @@ int board_mmc_init(bd_t *bis) return err; } #endif + +#ifdef CONFIG_HW_WATCHDOG +void hw_watchdog_reset(void) +{ + davinci_dm365_hw_watchdog_reset(); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_HW_WATCHDOG + davinci_dm365_hw_watchdog_enable(); +#endif + return 0; +} + diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index a75bce6..04173b9 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -245,4 +245,15 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_MISC_INIT_R + +// Hardware watchdog config +#ifdef CONFIG_HW_WATCHDOG +#define CONFIG_SYS_WDTTIMERBASE 0x01C21C00 +#define CONFIG_SYS_WDT_PERIOD_SECONDS 60 +// These two are insignificant but required to build arch/arm/cpu/arm926ejs/davinci/timer.c +#define CONFIG_SYS_WDT_PERIOD_LOW 0 +#define CONFIG_SYS_WDT_PERIOD_HIGH 0 +#endif + #endif /* __CONFIG_H */
--- tools/mkimage.h | 6 ++++++ tools/ublimage.c | 29 +++++++++++++++++++++++++++-- tools/ublimage.h | 2 ++ 3 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/tools/mkimage.h b/tools/mkimage.h index 5fe1a48..cd835f0 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -140,6 +140,12 @@ struct image_type_params { void mkimage_register (struct image_type_params *tparams);
/* + * This struct contains the global parameters and is initialized + * by the main core before any image type specific functions are called. + */ +extern struct mkimage_params params; + +/* * There is a c file associated with supported image type low level code * for ex. default_image.c, fit_image.c * init is the only function referred by mkimage core. diff --git a/tools/ublimage.c b/tools/ublimage.c index d6b4017..adbfc83 100644 --- a/tools/ublimage.c +++ b/tools/ublimage.c @@ -36,6 +36,10 @@ #include <image.h> #include "ublimage.h"
+#include <sys/types.h> +#include <sys/stat.h> +#include <unistd.h> + /* * Supported commands for configuration file */ @@ -58,8 +62,9 @@ static table_entry_t ublimage_cmds[] = { * this is needed to set the correct flash offset */ static table_entry_t ublimage_bootops[] = { - {UBL_MAGIC_SAFE, "safe", "Safe boot mode", }, - {-1, "", "Invalid", }, + {UBL_MAGIC_SAFE,"safe", "Safe boot mode", }, + {UBL_MAGIC_PLL, "pll", "With PLL enabled to have higher ARM/DMA clocks", }, + {-1, "", "Invalid", }, };
static struct ubl_header ublimage_header; @@ -89,6 +94,20 @@ static void print_hdr(struct ubl_header *ubl_hdr) printf("start page : %08x\n", ubl_hdr->page); }
+//This function calculates the size of the datafile in NAND pages +static uint32_t get_data_pages_size(void) +{ + uint32_t size = 0; + struct stat buf; + int rv = stat(params.datafile, &buf); + if (rv == 0) { + size = (buf.st_size/UBL_BLOCK_SIZE) + (buf.st_size % UBL_BLOCK_SIZE == 0 ? 0 : 1); + } else { + fprintf(stderr, "Error: could not stat datafile %s\n", params.datafile); + } + return size; +} + static void parse_cfg_cmd(struct ubl_header *ublhdr, int32_t cmd, char *token, char *name, int lineno, int fld, int dcd_len) { @@ -171,6 +190,12 @@ static uint32_t parse_cfg_file(struct ubl_header *ublhdr, char *name) *ptr = 0xff; ptr++; } + + /* By default, the size of the data in NAND pages + * will be automatically calculated but it can be overwritten + * in the configuration file. + */ + ublhdr->pages = get_data_pages_size();
/* * Very simple parsing, line starting with # are comments diff --git a/tools/ublimage.h b/tools/ublimage.h index e440625..cbff8b7 100644 --- a/tools/ublimage.h +++ b/tools/ublimage.h @@ -61,6 +61,8 @@ enum ublimage_fld_types { #define UBL_MAGIC_DMA_IC (0x44) /* DMA + ICache + Fast EMIF boot mode */ #define UBL_MAGIC_DMA_IC_FAST (0x55) +/* With PLL enabled to have higher ARM/DMA clocks */ +#define UBL_MAGIC_PLL (0x66)
/* Define max UBL image size */ #define UBL_IMAGE_SIZE (0x00003800u)
On 06/02/2012 01:38 PM, Stijn Souffriau wrote:
tools/mkimage.h | 6 ++++++ tools/ublimage.c | 29 +++++++++++++++++++++++++++-- tools/ublimage.h | 2 ++ 3 files changed, 35 insertions(+), 2 deletions(-)
In addition to what I just said about v2, v3 and so forth (and needing a body of the commit message, in this case explain what PLL mode is and so forth), you have a few cases of '//' or: /* multi line * comments. */ that don't match the required style. Using checkpatch.pl should catch one or both of these cases.
[snip]
- {UBL_MAGIC_SAFE,"safe", "Safe boot mode", },
- {UBL_MAGIC_PLL, "pll", "With PLL enabled to have higher ARM/DMA clocks", },
Missing space. Thanks!
On 06/02/2012 01:38 PM, Stijn Souffriau wrote:
arch/arm/cpu/arm926ejs/davinci/dm365.c | 61 ++++++++++++++++++++++++ arch/arm/include/asm/arch-davinci/timer_defs.h | 2 + board/davinci/dm365evm/dm365evm.c | 19 ++++++++ include/configs/davinci_dm365evm.h | 11 +++++ 4 files changed, 93 insertions(+)
First, the proper way to send revised patches is to put 'v2' or 'v3' rather than resend in the subject and to include, after the full commit message, "---" and then changes from v1 to v2, v2 to v3 and so forth. Second, I just re-read this code and the in-tree arch/arm/cpu/arm926ejs/davinci/timer.c code and think you really really need to sort out what magic value(s) has changed slightly and re-use that code. The reset code is the same. The programming sequence looks to be the same. I just didn't write out all of the non-0 values used to see what's different. I'm 99% certain this is small change from one revision to another of the basic IP block and you need to see what bits are being set (or not set!) in both cases and see what the differences between them are all about.
participants (2)
-
Stijn Souffriau -
Tom Rini