[U-Boot] [PATCH 0/6] reset: add reset driver for SoCFPGA
Hi,
This patchset does the following for the SoCFPGA platform:
- Adds a DM reset manager driver - Make the SoCFPGA platform use the DM I2C driver - Adds i2c aliases and enable i2c for de0_nano_soc platform - Adds a reset manager call to the i2c designware driver to look up any reset properties in the i2c dts node, and deassert the reset the IP if found. - Adds CONFIG_DM_RESET to all the SoCFPGA defconfigs
For this patchset, I'm only enabling the i2c in the DTS for the Terasic DE-0 Atlas board. I'll look to enable the other boards in the near future.
Dinh
Dinh Nguyen (6): reset: socfpga: add reset driver for SoCFPGA platform configs: socfpga: convert i2c to dm arm: dts: socfpga: enables i2c0 in socfpga_de0_nano arm: dts: socfpga: add reset property i2c: designware: add reset ctrl to driver configs: socfpga: add DM_RESET
arch/arm/dts/socfpga.dtsi | 12 +++ arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 12 +++ configs/socfpga_arria5_defconfig | 2 + configs/socfpga_cyclone5_defconfig | 2 + configs/socfpga_dbm_soc1_defconfig | 2 + configs/socfpga_de0_nano_soc_defconfig | 2 + configs/socfpga_de10_nano_defconfig | 2 + configs/socfpga_de1_soc_defconfig | 2 + configs/socfpga_is1_defconfig | 2 + configs/socfpga_mcvevk_defconfig | 2 + configs/socfpga_sockit_defconfig | 2 + configs/socfpga_socrates_defconfig | 2 + configs/socfpga_sr1500_defconfig | 2 + configs/socfpga_vining_fpga_defconfig | 1 + drivers/i2c/designware_i2c.c | 10 +++ drivers/reset/Kconfig | 7 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-socfpga.c | 105 +++++++++++++++++++++++++ include/configs/socfpga_common.h | 2 + 19 files changed, 172 insertions(+) create mode 100644 drivers/reset/reset-socfpga.c
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org --- v2: use setbits_le32 and clrbits_le32 --- drivers/reset/Kconfig | 7 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-socfpga.c | 105 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 113 insertions(+) create mode 100644 drivers/reset/reset-socfpga.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 3964b9e..90b021f 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -83,4 +83,11 @@ config RESET_ROCKCHIP though is that some reset signals, like I2C or MISC reset multiple devices.
+config RESET_SOCFPGA + bool "Reset controller driver for SoCFPGA" + depends on DM_RESET && ARCH_SOCFPGA + default y + help + Support for reset controller on SoCFPGA platform. + endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 7d7e080..6f791ee 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -13,3 +13,4 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o +obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c new file mode 100644 index 0000000..466455d --- /dev/null +++ b/drivers/reset/reset-socfpga.c @@ -0,0 +1,105 @@ +/* + * Socfpga Reset Controller Driver + * + * Copyright 2014 Steffen Trumtrar s.trumtrar@pengutronix.de + * + * based on + * Allwinner SoCs Reset Controller driver + * + * Copyright 2013 Maxime Ripard + * + * Maxime Ripard maxime.ripard@free-electrons.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <dm/of_access.h> +#include <reset-uclass.h> +#include <linux/bitops.h> +#include <linux/io.h> +#include <linux/sizes.h> + +#define BANK_INCREMENT 4 +#define NR_BANKS 8 + +struct socfpga_reset_data { + void __iomem *membase; +}; + +static int socfpga_reset_assert(struct reset_ctl *reset_ctl) +{ + struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev); + int id = reset_ctl->id; + int reg_width = sizeof(u32); + int bank = id / (reg_width * BITS_PER_BYTE); + int offset = id % (reg_width * BITS_PER_BYTE); + + setbits_le32(data->membase + (bank * BANK_INCREMENT), BIT(offset)); + return 0; +} + +static int socfpga_reset_deassert(struct reset_ctl *reset_ctl) +{ + struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev); + int id = reset_ctl->id; + int reg_width = sizeof(u32); + int bank = id / (reg_width * BITS_PER_BYTE); + int offset = id % (reg_width * BITS_PER_BYTE); + + clrbits_le32(data->membase + (bank * BANK_INCREMENT), BIT(offset)); + return 0; +} + +static int socfpga_reset_request(struct reset_ctl *reset_ctl) +{ + debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id); + + return 0; +} + +static int socfpga_reset_free(struct reset_ctl *reset_ctl) +{ + debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +} + +static const struct reset_ops socfpga_reset_ops = { + .request = socfpga_reset_request, + .free = socfpga_reset_free, + .rst_assert = socfpga_reset_assert, + .rst_deassert = socfpga_reset_deassert, +}; + +static int socfpga_reset_probe(struct udevice *dev) +{ + struct socfpga_reset_data *data = dev_get_priv(dev); + const void *blob = gd->fdt_blob; + int node = dev_of_offset(dev); + u32 modrst_offset; + + data->membase = devfdt_get_addr_ptr(dev); + + modrst_offset = fdtdec_get_int(blob, node, "altr,modrst-offset", 0x10); + data->membase += modrst_offset; + + return 0; +} + +static const struct udevice_id socfpga_reset_match[] = { + { .compatible = "altr,rst-mgr" }, + { /* sentinel */ }, +}; + +U_BOOT_DRIVER(socfpga_reset) = { + .name = "socfpga-reset", + .id = UCLASS_RESET, + .of_match = socfpga_reset_match, + .probe = socfpga_reset_probe, + .priv_auto_alloc_size = sizeof(struct socfpga_reset_data), + .ops = &socfpga_reset_ops, +};
On 04/05/2018 12:18 AM, Dinh Nguyen wrote:
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org
[...]
+static int socfpga_reset_request(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__,
reset_ctl, reset_ctl->dev, reset_ctl->id);- return 0;
+}
+static int socfpga_reset_free(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);- return 0;
+}
Is request/free needed at all ? It looks like a useless debug to me.
+static const struct reset_ops socfpga_reset_ops = {
- .request = socfpga_reset_request,
- .free = socfpga_reset_free,
- .rst_assert = socfpga_reset_assert,
- .rst_deassert = socfpga_reset_deassert,
+};
[...]
v
On 04/04/2018 05:56 PM, Marek Vasut wrote:
On 04/05/2018 12:18 AM, Dinh Nguyen wrote:
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org
[...]
+static int socfpga_reset_request(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__,
reset_ctl, reset_ctl->dev, reset_ctl->id);- return 0;
+}
+static int socfpga_reset_free(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);- return 0;
+}
Is request/free needed at all ? It looks like a useless debug to me.
I used the code to debug that the i2c driver did hook into the reset manager driver. Certainly, it can be removed in the final version. I'll send a V3 shortly with this removed.
Dinh
On 04/05/2018 09:12 AM, Dinh Nguyen wrote:
v
On 04/04/2018 05:56 PM, Marek Vasut wrote:
On 04/05/2018 12:18 AM, Dinh Nguyen wrote:
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org
[...]
+static int socfpga_reset_request(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__,
reset_ctl, reset_ctl->dev, reset_ctl->id);- return 0;
+}
+static int socfpga_reset_free(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);- return 0;
+}
Is request/free needed at all ? It looks like a useless debug to me.
I used the code to debug that the i2c driver did hook into the reset manager driver. Certainly, it can be removed in the final version. I'll send a V3 shortly with this removed.
I cannot remove the request function as this is needed in the reset-uclass driver. Do you want me to remove free? Leaving the code there seems harmless to me.
Thanks, Dinh
On 04/05/2018 04:46 PM, Dinh Nguyen wrote:
On 04/05/2018 09:12 AM, Dinh Nguyen wrote:
v
On 04/04/2018 05:56 PM, Marek Vasut wrote:
On 04/05/2018 12:18 AM, Dinh Nguyen wrote:
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org
[...]
+static int socfpga_reset_request(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__,
reset_ctl, reset_ctl->dev, reset_ctl->id);- return 0;
+}
+static int socfpga_reset_free(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);- return 0;
+}
Is request/free needed at all ? It looks like a useless debug to me.
I used the code to debug that the i2c driver did hook into the reset manager driver. Certainly, it can be removed in the final version. I'll send a V3 shortly with this removed.
I cannot remove the request function as this is needed in the reset-uclass driver.
Fix the driver please.
Do you want me to remove free? Leaving the code there seems harmless to me.
Do a generic fix and then submit a fix for this driver, so two patches in total. I'll apply the V2 for now.
On Thu, Apr 5, 2018 at 11:28 AM, Marek Vasut marex@denx.de wrote:
On 04/05/2018 04:46 PM, Dinh Nguyen wrote:
On 04/05/2018 09:12 AM, Dinh Nguyen wrote:
v
On 04/04/2018 05:56 PM, Marek Vasut wrote:
On 04/05/2018 12:18 AM, Dinh Nguyen wrote:
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org
[...]
+static int socfpga_reset_request(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__,
reset_ctl, reset_ctl->dev, reset_ctl->id);- return 0;
+}
+static int socfpga_reset_free(struct reset_ctl *reset_ctl) +{
- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);- return 0;
+}
Is request/free needed at all ? It looks like a useless debug to me.
I used the code to debug that the i2c driver did hook into the reset manager driver. Certainly, it can be removed in the final version. I'll send a V3 shortly with this removed.
I cannot remove the request function as this is needed in the reset-uclass driver.
Fix the driver please.
Do you want me to remove free? Leaving the code there seems harmless to me.
Do a generic fix and then submit a fix for this driver, so two patches in total. I'll apply the V2 for now.
Ok...will do.
Dinh
Enable DM I2C driver on SoCFPGA platforms.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org --- configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_dbm_soc1_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + configs/socfpga_de10_nano_defconfig | 1 + configs/socfpga_de1_soc_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_mcvevk_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + include/configs/socfpga_common.h | 2 ++ 12 files changed, 13 insertions(+)
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 5f80232..40146e0 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -40,6 +40,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 5202f47..eed3d66 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -40,6 +40,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index d14fceb..0ba40ed 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -43,6 +43,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 4736def..1dfdd3e 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -40,6 +40,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 5a876dd..4d75faf 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -36,6 +36,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 33381da..95ac0dd 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_DM=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 53b5c34..d94be9a 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index c97dcd0..9f005da 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -40,6 +40,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index f421740..95b8fe9 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -40,6 +40,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 3873c2b..7bc5cc7 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -41,6 +41,7 @@ CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index d7df688..ee9159e 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 6644ef6..5790d52 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -138,6 +138,7 @@ /* * I2C support */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS #define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS @@ -158,6 +159,7 @@ unsigned int cm_get_l4_sp_clk_hz(void); #define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000) #endif +#endif /* CONFIG_DM_I2C */
/* * QSPI support
Add all the appropriate i2c alias in the base socfpga dtsi and enables the i2c node on the DE0 NANO board.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org --- arch/arm/dts/socfpga.dtsi | 4 ++++ arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 12 ++++++++++++ 2 files changed, 16 insertions(+)
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index 7557aa0..f34dd9d 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -14,6 +14,10 @@ aliases { ethernet0 = &gmac0; ethernet1 = &gmac1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; serial0 = &uart0; serial1 = &uart1; timer0 = &timer0; diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts index dc09bed..5e7fe2a 100644 --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts @@ -56,6 +56,18 @@ status = "okay"; };
+&i2c0 { + status = "okay"; + + dxl345: adxl345@0 { + compatible = "adi,adxl345"; + reg = <0x53>; + + interrupt-parent = <&portc>; + interrupts = <3 2>; + }; +}; + &mmc0 { status = "okay"; u-boot,dm-pre-reloc;
Add reset dts property to the i2c nodes.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org --- arch/arm/dts/socfpga.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index f34dd9d..ead0560 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -509,6 +509,8 @@ compatible = "snps,designware-i2c"; reg = <0xffc04000 0x1000>; clocks = <&l4_sp_clk>; + resets = <&rst I2C0_RESET>; + reset-names = "i2c"; interrupts = <0 158 0x4>; status = "disabled"; }; @@ -519,6 +521,8 @@ compatible = "snps,designware-i2c"; reg = <0xffc05000 0x1000>; clocks = <&l4_sp_clk>; + resets = <&rst I2C1_RESET>; + reset-names = "i2c"; interrupts = <0 159 0x4>; status = "disabled"; }; @@ -529,6 +533,8 @@ compatible = "snps,designware-i2c"; reg = <0xffc06000 0x1000>; clocks = <&l4_sp_clk>; + resets = <&rst I2C2_RESET>; + reset-names = "i2c"; interrupts = <0 160 0x4>; status = "disabled"; }; @@ -539,6 +545,8 @@ compatible = "snps,designware-i2c"; reg = <0xffc07000 0x1000>; clocks = <&l4_sp_clk>; + resets = <&rst I2C3_RESET>; + reset-names = "i2c"; interrupts = <0 161 0x4>; status = "disabled"; };
Add code to look for a reset manager property. Specifically, look for the reset-names of 'i2c'. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present.
If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org --- drivers/i2c/designware_i2c.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index 8cfed21..419d021 100644 --- a/drivers/i2c/designware_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -9,6 +9,7 @@ #include <dm.h> #include <i2c.h> #include <pci.h> +#include <reset.h> #include <asm/io.h> #include "designware_i2c.h"
@@ -34,6 +35,7 @@ static struct dw_scl_sda_cfg byt_config = { struct dw_i2c { struct i2c_regs *regs; struct dw_scl_sda_cfg *scl_sda_cfg; + struct reset_ctl reset_ctl; };
#ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED @@ -534,6 +536,7 @@ static int designware_i2c_probe_chip(struct udevice *bus, uint chip_addr, static int designware_i2c_probe(struct udevice *bus) { struct dw_i2c *priv = dev_get_priv(bus); + int ret;
if (device_is_on_pci_bus(bus)) { #ifdef CONFIG_DM_PCI @@ -549,6 +552,13 @@ static int designware_i2c_probe(struct udevice *bus) priv->regs = (struct i2c_regs *)devfdt_get_addr_ptr(bus); }
+ ret = reset_get_by_name(bus, "i2c", &priv->reset_ctl); + if (ret) + pr_info("reset_get_by_name() failed: %d\n", ret); + + if (&priv->reset_ctl) + reset_deassert(&priv->reset_ctl); + __dw_i2c_init(priv->regs, 0, 0);
return 0;
Hello Dinh,
Am 05.04.2018 um 00:18 schrieb Dinh Nguyen:
Add code to look for a reset manager property. Specifically, look for the reset-names of 'i2c'. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present.
If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org
drivers/i2c/designware_i2c.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
Reviewed-by: Heiko Schocher hs@denx.de
Thanks!
bye, Heiko
Add the DM reset driver to socfpga defconfigs.
Signed-off-by: Dinh Nguyen dinguyen@kernel.org --- configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_dbm_soc1_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + configs/socfpga_de10_nano_defconfig | 1 + configs/socfpga_de1_soc_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_mcvevk_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + 12 files changed, 12 insertions(+)
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 40146e0..ba2bd1e 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -53,6 +53,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index eed3d66..4310db3 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -54,6 +54,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 0ba40ed..aabcccc 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -50,6 +50,7 @@ CONFIG_MMC_DW=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 1dfdd3e..22c7818 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -48,6 +48,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 4d75faf..d60435c 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -44,6 +44,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 95ac0dd..384501f 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -45,6 +45,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index d94be9a..119b99a 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -48,5 +48,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 9f005da..d7a9117 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -47,6 +47,7 @@ CONFIG_MMC_DW=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 95b8fe9..8400180 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -54,6 +54,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 7bc5cc7..76199fb 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -54,6 +54,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index ee9159e..200d858 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -53,6 +53,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index a245c54..bb71c01 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -69,6 +69,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y
On 04/05/2018 12:18 AM, Dinh Nguyen wrote:
Hi,
This patchset does the following for the SoCFPGA platform:
- Adds a DM reset manager driver
- Make the SoCFPGA platform use the DM I2C driver
- Adds i2c aliases and enable i2c for de0_nano_soc platform
- Adds a reset manager call to the i2c designware driver to look up any reset properties in the i2c dts node, and deassert the reset the IP if found.
- Adds CONFIG_DM_RESET to all the SoCFPGA defconfigs
For this patchset, I'm only enabling the i2c in the DTS for the Terasic DE-0 Atlas board. I'll look to enable the other boards in the near future.
Dinh
Dinh Nguyen (6): reset: socfpga: add reset driver for SoCFPGA platform configs: socfpga: convert i2c to dm arm: dts: socfpga: enables i2c0 in socfpga_de0_nano arm: dts: socfpga: add reset property i2c: designware: add reset ctrl to driver configs: socfpga: add DM_RESET
arch/arm/dts/socfpga.dtsi | 12 +++ arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 12 +++ configs/socfpga_arria5_defconfig | 2 + configs/socfpga_cyclone5_defconfig | 2 + configs/socfpga_dbm_soc1_defconfig | 2 + configs/socfpga_de0_nano_soc_defconfig | 2 + configs/socfpga_de10_nano_defconfig | 2 + configs/socfpga_de1_soc_defconfig | 2 + configs/socfpga_is1_defconfig | 2 + configs/socfpga_mcvevk_defconfig | 2 + configs/socfpga_sockit_defconfig | 2 + configs/socfpga_socrates_defconfig | 2 + configs/socfpga_sr1500_defconfig | 2 + configs/socfpga_vining_fpga_defconfig | 1 + drivers/i2c/designware_i2c.c | 10 +++ drivers/reset/Kconfig | 7 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-socfpga.c | 105 +++++++++++++++++++++++++ include/configs/socfpga_common.h | 2 + 19 files changed, 172 insertions(+) create mode 100644 drivers/reset/reset-socfpga.c
Series looks OK to me , except for that one minor nit in 1/6. I'd like AB/RB from Heiko, otherwise I'll just pull it in.
participants (4)
-
Dinh Nguyen -
Dinh Nguyen -
Heiko Schocher -
Marek Vasut