From: Angelo Dureghello angelo@sysam.it

Signed-off-by: Angelo Dureghello angelo@sysam.it Cc: Tom Rini trini@ti.com ---

This patch adds support for Sysam AMCORE mcf5307-based board

Changes for v2: - fix patch email sending issues Changes for v3: - fix code format issues Changes for v4: - add MAINTAINERS file entry - remove all unnecessary blank lines - add get_ram_size in sdram init - reuse already existing sdram test routine - remove custom flash.c, used std mtd/CFI driver Changes for v5: - fix MAINTAINERS bad sorted entry - fix incorrect indentation - remove #undef where not needed - fix CONFIG_SYS_SDRAM_SIZE to be in bytes Changes for v6: - remove still some #undef not needed in amcore.h - remove custom sdram test routine Changes for v7: - changes for recent _defconfig way --- board/sysam/amcore/Kconfig | 22 +++++ board/sysam/amcore/MAINTAINERS | 6 ++ board/sysam/amcore/Makefile | 7 ++ board/sysam/amcore/amcore.c | 109 +++++++++++++++++++++++ board/sysam/amcore/config.mk | 7 ++ board/sysam/amcore/u-boot.lds | 87 ++++++++++++++++++ configs/amcore_defconfig | 2 + include/configs/amcore.h | 195 +++++++++++++++++++++++++++++++++++++++++ 8 files changed, 435 insertions(+) create mode 100644 board/sysam/amcore/Kconfig create mode 100644 board/sysam/amcore/MAINTAINERS create mode 100644 board/sysam/amcore/Makefile create mode 100644 board/sysam/amcore/amcore.c create mode 100644 board/sysam/amcore/config.mk create mode 100644 board/sysam/amcore/u-boot.lds create mode 100644 configs/amcore_defconfig create mode 100644 include/configs/amcore.h

diff --git a/board/sysam/amcore/Kconfig b/board/sysam/amcore/Kconfig new file mode 100644 index 0000000..dd9816e --- /dev/null +++ b/board/sysam/amcore/Kconfig @@ -0,0 +1,22 @@ +if TARGET_AMCORE + +config SYS_CPU + string + default "mcf530x" + +config SYS_BOARD + string + default "amcore" + +config SYS_VENDOR + string + default "sysam" + +config SYS_CONFIG_NAME + string + default "amcore" + +endif + + + diff --git a/board/sysam/amcore/MAINTAINERS b/board/sysam/amcore/MAINTAINERS new file mode 100644 index 0000000..fe5dd9b --- /dev/null +++ b/board/sysam/amcore/MAINTAINERS @@ -0,0 +1,6 @@ +AMCORE BOARD +M: Angelo Dureghello angelo@sysam.it +S: Maintained +F: board/sysam/amcore/ +F: include/configs/amcore.h +F: configs/amcore_defconfig diff --git a/board/sysam/amcore/Makefile b/board/sysam/amcore/Makefile new file mode 100644 index 0000000..051186f --- /dev/null +++ b/board/sysam/amcore/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2014 Angelo Dureghello angelo@sysam.it +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = amcore.o diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c new file mode 100644 index 0000000..e666bbe --- /dev/null +++ b/board/sysam/amcore/amcore.c @@ -0,0 +1,109 @@ +/* + * Board functions for Sysam AMCORE (MCF5307 based) board + * + * (C) Copyright 2014 Angelo Dureghello angelo@sysam.it + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This file copies memory testdram() from sandburst/common/sb_common.c + */ + +#include <common.h> +#include <asm/immap.h> +#include <asm/io.h> + +void init_lcd(void) +{ + /* + * board can have a K0108 lcd connected on the parallel port, + * wired as below: + * + * fc cpu P0 P1 P2 P3 P4 P5 P6 P7 P10 P11 P12 P13 P14 + * lcd D0 D1 D2 D3 D4 D5 D6 D7 CS1 CS2 RW DI E + * + * Starting up setting lines in high impedance + */ + sim_t *sim = (sim_t *)(MMAP_SIM); + + out_be16(&sim->par, 0x300); + + gpio_t *gpio = (gpio_t *)(MMAP_GPIO); + + out_be16(&gpio->paddr, 0xfcff); + out_be16(&gpio->padat, 0x0c00); +} + +int checkboard(void) +{ + puts("Board: "); + puts("AMCORE v.001(alpha)\n"); + + init_lcd(); + + return 0; +} + +/* + * in initdram we are here executing from flash + * case 1: + * is with no ACR/flash cache enabled + * nop = 40ns (scope measured) + */ +void fudelay(int usec) +{ + while (usec--) + asm volatile ("nop"); +} + +phys_size_t initdram(int board_type) +{ + u32 dramsize, RC; + + dramctrl_t *dc = (dramctrl_t *)(MMAP_DRAMC); + + /* + * SDRAM MT48LC4M32B2 details + * Memory block 0: 16 MB of SDRAM at address $00000000 + * Port size: 32-bit port + * + * Memory block 0 wired as follows: + * CPU : A15 A14 A13 A12 A11 A10 A9 A17 A18 A19 A20 A21 A22 A23 + * SDRAM : A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA0 BA1 + * + * Ensure that there is a delay of at least 100 microseconds from + * processor reset to the following code so that the SDRAM is ready + * for commands. + */ + fudelay(100); + + /* + * DCR + * set proper RC as per specification + */ + RC = (CONFIG_SYS_CPU_CLK / 1000000) >> 1; + RC = (RC * 15) >> 4; + + /* 0x8000 is the faster option */ + out_be16(&dc->dcr, 0x8200 | RC); + + /* + * DACR0, page mode continuous, CMD on A20 0x0300 + */ + out_be32(&dc->dacr0, 0x00003304); + + dramsize = ((CONFIG_SYS_SDRAM_SIZE)-1) & 0xfffc0000; + out_be32(&dc->dmr0, dramsize|1); + + /* issue a PRECHARGE ALL */ + out_be32(&dc->dacr0, 0x0000330c); + out_be32(0x00000004, 0xbeaddeed); + /* issue AUTOREFRESH */ + out_be32(&dc->dacr0, 0x0000b304); + /* let refresh occour */ + fudelay(1); + + out_be32(&dc->dacr0, 0x0000b344); + out_be32(0x00000c00, 0xbeaddeed); + + return get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); +} diff --git a/board/sysam/amcore/config.mk b/board/sysam/amcore/config.mk new file mode 100644 index 0000000..d01a8bb --- /dev/null +++ b/board/sysam/amcore/config.mk @@ -0,0 +1,7 @@ +# +# (C) Copyright 2014 Angelo Dureghello angelo@sysam.it +# +# SPDX-License-Identifier: GPL-2.0+ +# + +CONFIG_SYS_TEXT_BASE = 0xffc00000 diff --git a/board/sysam/amcore/u-boot.lds b/board/sysam/amcore/u-boot.lds new file mode 100644 index 0000000..2f7a241 --- /dev/null +++ b/board/sysam/amcore/u-boot.lds @@ -0,0 +1,87 @@ +/* + * Linker script for Sysam AMCORE board + * + * (C) Copyright 2014 Angelo Dureghello angelo@sysam.it + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_ARCH(m68k) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + .text : + { + arch/m68k/cpu/mcf530x/start.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.text) + + *(.text) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + + .reloc : + { + __got_start = .; + KEEP(*(.got)) + __got_end = .; + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.sdata) + } + _edata = .; + PROVIDE (edata = .); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + _sbss = .; + *(.sbss*) + *(.bss*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + } + __bss_end = . ; + PROVIDE (end = .); +} diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig new file mode 100644 index 0000000..705c400 --- /dev/null +++ b/configs/amcore_defconfig @@ -0,0 +1,2 @@ +CONFIG_M68K=y +CONFIG_TARGET_AMCORE=y diff --git a/include/configs/amcore.h b/include/configs/amcore.h new file mode 100644 index 0000000..17ae6db --- /dev/null +++ b/include/configs/amcore.h @@ -0,0 +1,195 @@ +/* + * Sysam AMCORE board configuration + * + * (C) Copyright 2014 Angelo Dureghello angelo@sysam.it + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AMCORE 1 +#define CONFIG_HOSTNAME AMCORE + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFC00000 +#endif + +#define CONFIG_SYS_LDSCRIPT "board/sysam/amcore/u-boot.lds" + +/* + * AMCORE flash memory map + * + * As per CONFIG_SYS_SST_SECTSZ, amcore SST39VF3201B flash + * is organized into 1024 x 4K small secotrs (total 4MB). + * + * 0xffc00000 flash start + * 0xffc00000 u-boot code (128-4kB) + * 0xffc1f000 u-boot env (4kB) + * ----------------------------------------- + * 0xffc20000 to + * 0xffffffff reserved for os usage + */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MCF530x /* define processor family */ +#define CONFIG_M5307 /* define processor type */ + +#define CONFIG_MCFTMR +#define CONFIG_MCFUART +#define CONFIG_SYS_UART_PORT 0 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , \ + 57600, 115200 } + +/* autoboot delay in seconds */ +#define CONFIG_BOOTDELAY 1 +/* autoboot command */ +#define CONFIG_BOOTCOMMAND "bootm ffc20000" + +/* + * Command line configuration. + */ + +#include <config_cmd_default.h> +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_TIMER +#define CONFIG_CMD_DIAG + +#define CONFIG_SYS_PROMPT "amcore$ " +#undef CONFIG_SYS_LONGHELP /* undef to save memory */ + +#if defined(CONFIG_CMD_KGDB) +/* Console I/O buff. size */ +#define CONFIG_SYS_CBSIZE 1024 +#else +#define CONFIG_SYS_CBSIZE 256 +#endif +/* Print buffer size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT)+16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot argument buffer size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* no console @ startup */ +#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ +#define CONFIG_LOOPW 1 /* enable loopw command */ +#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ + +#define CONFIG_SYS_LOAD_ADDR 0x20000 /* default load address */ + +#define CONFIG_SYS_MEMTEST_START 0x0 +#define CONFIG_SYS_MEMTEST_END 0x1000000 + +#define CONFIG_SYS_HZ 1000 + +/* + * Clock configuration: enable only one of the following options + */ + +/* MCF5307 cpu run at 90MHz, set as bus clock x 2 */ +#define CONFIG_SYS_CLK 45000000 +#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 2) + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ + +/* + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* size of used SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/* + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_SIZE 0x1000000 /* in Bytes */ +#define CONFIG_SYS_FLASH_BASE 0xffc00000 +#define CONFIG_SYS_TEXT_BASE 0xffc00000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 1024 +#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 + +/* + * CFI FLASH driver setup + */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +/* amcore design has flash data bytes wired swapped */ +#define CONFIG_SYS_WRITE_SWAPPED_DATA + +/* reserve 128-4KB */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) +#define CONFIG_SYS_MONITOR_LEN ((128-4)*1024) +#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE 0x1000 /* Size of env. data */ +#define CONFIG_ENV_SECT_SIZE 0x1000 /* see README */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_SIZE << 20) + +/* + * Cache Configuration + * + * Special 8K version 3 core cache. + * This is a single unified instruction/data cache. + * sdram - single region - no masks + */ +#define CONFIG_SYS_CACHELINE_SIZE 16 + +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CONFIG_SYS_CACHE_ACR0 (CF_ACR_CM_WT | CF_ACR_SM_ALL | \ + CF_ACR_EN) +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_DCM_P | CF_CACR_ESB | \ + CF_CACR_EC) + +/* + * Memory bank definitions + */ + +/* CS0 - AMD Flash, address 0xffc00000 */ +#define CONFIG_SYS_CS0_BASE (CONFIG_SYS_FLASH_BASE>>16) +/* 4MB, AA=0,V=1 C/I BIT for errata */ +#define CONFIG_SYS_CS0_MASK 0x003f0001 +/* WS=10, AA=1, PS=16bit (10) */ +#define CONFIG_SYS_CS0_CTRL 0x1980 + + +/* CS1 - DM9000 Ethernet Controller, address 0x30000000 */ +#define CONFIG_SYS_CS1_BASE 0x3000 +#define CONFIG_SYS_CS1_MASK 0x00070001 +#define CONFIG_SYS_CS1_CTRL 0x0100 + +#endif /* __CONFIG_H */