[U-Boot] [PATCH 1/1] ipu common: reset ipuv3 correctly
From: Liu Ying Ying.Liu@freescale.com
This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to high to reset IPUv3. This makes sure that IPUv3 finishes sofware reset.
Signed-off-by: Liu Ying Ying.Liu@freescale.com --- drivers/video/ipu_common.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c index 2020da9..03b7382 100644 --- a/drivers/video/ipu_common.c +++ b/drivers/video/ipu_common.c @@ -397,6 +397,9 @@ void ipu_reset(void) value = __raw_readl(reg); value = value | SW_IPU_RST; __raw_writel(value, reg); + + while (__raw_readl(reg) & SW_IPU_RST) + ; }
/*
Hi Liu Ying,
On Sat, Oct 6, 2012 at 7:32 AM, Liu Ying Ying.liu@freescale.com wrote:
@@ -397,6 +397,9 @@ void ipu_reset(void) value = __raw_readl(reg); value = value | SW_IPU_RST; __raw_writel(value, reg);
while (__raw_readl(reg) & SW_IPU_RST);
Ok, but if the reset fails we would hand the whole system.
Wouldn't it be better to add a timeout here?
Regards,
Fabio Estevam
On Sat, Oct 6, 2012 at 9:59 AM, Fabio Estevam festevam@gmail.com wrote:
Hi Liu Ying,
On Sat, Oct 6, 2012 at 7:32 AM, Liu Ying Ying.liu@freescale.com wrote:
@@ -397,6 +397,9 @@ void ipu_reset(void) value = __raw_readl(reg); value = value | SW_IPU_RST; __raw_writel(value, reg);
while (__raw_readl(reg) & SW_IPU_RST);Ok, but if the reset fails we would hand the whole system.
I mean "hang"
Wouldn't it be better to add a timeout here?
Regards,
Fabio Estevam
participants (2)
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Fabio Estevam -
Liu Ying