Rune Torgersen wrote:

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Subject: [U-Boot-Users] Please explain this code in drivers/pci.c

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The value of bar_response is 0xffff8008 which looks good. This gives bar

size of

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0x8000 which also looks good. The value of mem is initially 0x90000000.

So,

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(mem - 1) = 0x8fffffff and (bar_size - 1) = 0x7fff). When these are or'd

one gets

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0x8fffffff and adding 1 gives 0x90000000. This result is that the card is

given 4

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address bases all at 0x90000000.

If the card wants 4 different memory regiuons, I assume it has 4 BAR registers? Each BAR must have the correct base address, so you have to add the size of the last region to the memory pointer before writing the address to the next BAR

I am not sure if you are trying to clarify the question or provide an answer. My complaint is that the code does not do what you say. I believe the code should provide four unique values for the four BARs, but it does not. Each gets the same value because the ORing logic does not succeed in doing a new base = old base + size.

The logic envoked by CONFIG_PCI_PNP gets the calculation right. If someone is familiar with the code and can confirm that it is not behaving as intended, then I will do a patch. The ORing logic looks to me to be copied from the Linux kernel where the allocation starts at the top of the address range and proceeds downward, but maybe it is an attempt to force alignment. I don't know.

Don