[PATCH v2 0/5] fix npcm bmc error
1. add name for gpio pinctrl function 2. add baud rate table 3. fix ecc ram size 4. add dts 5. modify configs
Jim Liu (5): pinctrl: npcm8xx: add name for gpio function configs: npcm: support more uart baud rate board: nuvuton: arbel: fix incorrect ram size arm: dts: npcm8xx: add watchdog node configs: nuvoton: npcm8xx: disable CONFIG_SPI_FLASH_USE_4K_SECTORS
arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 24 +++++++++++++++++++++++ board/nuvoton/arbel_evb/arbel_evb.c | 17 ++++++++-------- configs/arbel_evb_defconfig | 1 + drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 1 + include/configs/arbel.h | 5 ++++- include/configs/poleg.h | 2 ++ 6 files changed, 41 insertions(+), 9 deletions(-)
gpio function name is needed in the debug log
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 7976e3b3ed..ff49819b58 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -329,6 +329,7 @@ struct group_info {
static const struct group_info npcm8xx_groups[] = { FUNC_LIST + {FN_gpio, "GPIO", NULL, 0, 0, 0} };
/* Pin flags */
add uart baud rate table to arbel(npcm8xx) and poleg(npcm7xx)
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- include/configs/arbel.h | 5 ++++- include/configs/poleg.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 891257bc93..c45b2ac137 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -7,10 +7,13 @@ #define __CONFIG_ARBEL_H
#define CFG_SYS_SDRAM_BASE 0x0 -#define CFG_SYS_BOOTMAPSZ (30 << 20) +#define CFG_SYS_BOOTMAPSZ (128 << 20) #define CFG_SYS_BOOTM_LEN (20 << 20) #define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CFG_SYS_INIT_RAM_SIZE 0x8000 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 14400, 19200, 38400, 57600, 115200, 230400, \ + 380400, 460800, 921600 } +
/* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80400000\0" \ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 1e96e838be..fd0e9a7362 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -13,6 +13,8 @@ #define CFG_SYS_BOOTMAPSZ (0x30 << 20) #define CFG_SYS_SDRAM_BASE 0x0
+#define CONFIG_SYS_BAUDRATE_TABLE { 57600, 115200, 230400, 460800 } + /* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \
On Wed, Oct 11, 2023 at 04:45:30PM +0800, Jim Liu wrote:
add uart baud rate table to arbel(npcm8xx) and poleg(npcm7xx)
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
include/configs/arbel.h | 5 ++++- include/configs/poleg.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 891257bc93..c45b2ac137 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -7,10 +7,13 @@ #define __CONFIG_ARBEL_H
#define CFG_SYS_SDRAM_BASE 0x0 -#define CFG_SYS_BOOTMAPSZ (30 << 20) +#define CFG_SYS_BOOTMAPSZ (128 << 20) #define CFG_SYS_BOOTM_LEN (20 << 20) #define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CFG_SYS_INIT_RAM_SIZE 0x8000 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 14400, 19200, 38400, 57600, 115200, 230400, \
380400, 460800, 921600 }/* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80400000\0" \ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 1e96e838be..fd0e9a7362 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -13,6 +13,8 @@ #define CFG_SYS_BOOTMAPSZ (0x30 << 20) #define CFG_SYS_SDRAM_BASE 0x0
+#define CONFIG_SYS_BAUDRATE_TABLE { 57600, 115200, 230400, 460800 }
/* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \
This is now CFG_SYS_BAUDRATE_TABLE, do you really need something other than the default as well?
Hi Tom
Thanks for your review. Google and other customers need to change baud rate so I added this table.
I will modify the name to CFG_SYS_BAUDRATE_TABLE.
Best regards, Jim
On Wed, Oct 11, 2023 at 7:20 AM Tom Rini trini@konsulko.com wrote:
On Wed, Oct 11, 2023 at 04:45:30PM +0800, Jim Liu wrote:
add uart baud rate table to arbel(npcm8xx) and poleg(npcm7xx)
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
include/configs/arbel.h | 5 ++++- include/configs/poleg.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 891257bc93..c45b2ac137 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -7,10 +7,13 @@ #define __CONFIG_ARBEL_H
#define CFG_SYS_SDRAM_BASE 0x0 -#define CFG_SYS_BOOTMAPSZ (30 << 20) +#define CFG_SYS_BOOTMAPSZ (128 << 20) #define CFG_SYS_BOOTM_LEN (20 << 20) #define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CFG_SYS_INIT_RAM_SIZE 0x8000 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 14400, 19200, 38400, 57600, 115200, 230400, \
380400, 460800, 921600 }/* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80400000\0" \ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 1e96e838be..fd0e9a7362 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -13,6 +13,8 @@ #define CFG_SYS_BOOTMAPSZ (0x30 << 20) #define CFG_SYS_SDRAM_BASE 0x0
+#define CONFIG_SYS_BAUDRATE_TABLE { 57600, 115200, 230400, 460800 }
/* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \
This is now CFG_SYS_BAUDRATE_TABLE, do you really need something other than the default as well?
-- Tom
fix incorrect ram size of 4GB dram with ECC enabled
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- board/nuvoton/arbel_evb/arbel_evb.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index e52e0a59ab..acaafad549 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -16,7 +16,7 @@ #define DRAM_1GB_SIZE 0x40000000ULL #define DRAM_2GB_ECC_SIZE 0x70000000ULL #define DRAM_2GB_SIZE 0x80000000ULL -#define DRAM_4GB_ECC_SIZE 0xE00000000ULL +#define DRAM_4GB_ECC_SIZE 0xE0000000ULL #define DRAM_4GB_SIZE 0x100000000ULL
DECLARE_GLOBAL_DATA_PTR; @@ -29,7 +29,6 @@ int board_init(void) int dram_init(void) { struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; - uint64_t delta = 0ULL;
/* * get dram active size value from bootblock. @@ -62,26 +61,28 @@ int dram_init(void) gd->bd->bi_dram[1].size = 0; break; case DRAM_4GB_ECC_SIZE: - gd->bd->bi_dram[0].size = DRAM_2GB_ECC_SIZE; + gd->bd->bi_dram[0].size = DRAM_2GB_SIZE; gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; - gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; - delta = DRAM_4GB_SIZE - DRAM_2GB_ECC_SIZE; + gd->bd->bi_dram[1].size = DRAM_2GB_SIZE - + (DRAM_4GB_SIZE - DRAM_4GB_ECC_SIZE); + /* use bank0 only */ + gd->ram_size = DRAM_2GB_SIZE; break; case DRAM_4GB_SIZE: gd->bd->bi_dram[0].size = DRAM_2GB_SIZE; gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; - delta = DRAM_4GB_SIZE - DRAM_2GB_SIZE; + /* use bank0 only */ + gd->ram_size = DRAM_2GB_SIZE; break; default: gd->bd->bi_dram[0].size = DRAM_1GB_SIZE; gd->bd->bi_dram[1].start = 0; gd->bd->bi_dram[1].size = 0; + gd->ram_size = DRAM_1GB_SIZE; break; }
- gd->ram_size -= delta; - return 0; }
add npcm8xx watchdog node
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi index fabe5925b7..fb544e5f1a 100644 --- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi @@ -154,6 +154,30 @@ clock-names = "refclk"; };
+ watchdog0: watchdog@801c { + compatible = "nuvoton,npcm750-wdt"; + clocks = <&clk NPCM8XX_CLK_REFCLK>; + reg = <0x801c 0x4>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + watchdog1: watchdog@901c { + compatible = "nuvoton,npcm750-wdt"; + clocks = <&clk NPCM8XX_CLK_REFCLK>; + reg = <0x901c 0x4>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + watchdog2: watchdog@a01c { + compatible = "nuvoton,npcm750-wdt"; + clocks = <&clk NPCM8XX_CLK_REFCLK>; + reg = <0xa01c 0x4>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + serial0: serial@0 { compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; reg = <0x0 0x1000>;
disable this config to improve flash program time
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- configs/arbel_evb_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 8c32b4b20d..6cfb5a7d32 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -58,6 +58,7 @@ CONFIG_MMC_SDHCI_NPCM=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_BROADCOM=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y
participants (2)
-
Jim Liu -
Tom Rini