[PATCH 0/3] cmd: avoid duplicate weak functions
If we have multiple weak implementations of functions, the linker might choose any of these.
ARM and RISC-V already provide a weak implementation of flush_dcache_all() but cmd/cache.c provides another implementation. Add an #ifdef to avoid the duplication.
The EFI sub-systems uses invalidate_icache_all() after loading binaries. Both the EFI sub-system and cmd/cache.c provide a weak invalidate_icache_all() function. Remove the EFI instance.
For ARM11 functional implementation of invalidate_icache_all is missing. Add it.
Heinrich Schuchardt (3): cmd: avoid duplicate weak flush_dcache_all() arm: implement invalidate_icache_all on ARM11 efi_loader: avoid duplicate weak invalidate_icache_all()
arch/arm/cpu/arm11/cpu.c | 12 ++++++++++++ cmd/cache.c | 3 +++ lib/efi_loader/efi_image_loader.c | 13 +++++++------ lib/efi_loader/efi_runtime.c | 7 ++++++- 4 files changed, 28 insertions(+), 7 deletions(-)
If we have multiple weak implementations of functions, the linker might choose any of these. ARM and RISC-V already provide a weak implementation of flush_dcache_all().
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com --- cmd/cache.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..16fa0f7c652 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -52,11 +52,14 @@ static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, return 0; }
+/* ARM and RISC-V define a weak flush_dcache_all() themselves. */ +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) void __weak flush_dcache_all(void) { puts("No arch specific flush_dcache_all available!\n"); /* please define arch specific flush_dcache_all */ } +#endif
static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
If we have multiple weak implementations of functions, the linker might choose any of these. ARM and RISC-V already provide a weak implementation of flush_dcache_all().
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
cmd/cache.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..16fa0f7c652 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -52,11 +52,14 @@ static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, return 0; }
+/* ARM and RISC-V define a weak flush_dcache_all() themselves. */ +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) void __weak flush_dcache_all(void) { puts("No arch specific flush_dcache_all available!\n"); /* please define arch specific flush_dcache_all */ }
Aren't we supposed to add a single __weak function so the linker can replace it? IOW why is the declaration for Arm/riscv a weak one?
Thanks /Ilias
+#endif
static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -- 2.43.0
On 19.06.24 14:23, Ilias Apalodimas wrote:
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
If we have multiple weak implementations of functions, the linker might choose any of these. ARM and RISC-V already provide a weak implementation of flush_dcache_all().
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
cmd/cache.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..16fa0f7c652 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -52,11 +52,14 @@ static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, return 0; }
+/* ARM and RISC-V define a weak flush_dcache_all() themselves. */ +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) void __weak flush_dcache_all(void) { puts("No arch specific flush_dcache_all available!\n"); /* please define arch specific flush_dcache_all */ }
Aren't we supposed to add a single __weak function so the linker can replace it? IOW why is the declaration for Arm/riscv a weak one?
Some sub-architectures override the architecture specific weak implementation, e.g.
arch/riscv/cpu/andes/cache.c:44: void flush_dcache_all(void)
arch/arm/cpu/arm926ejs/cache.c:17: void flush_dcache_all(void)
Best regards
Heinrich
Thanks /Ilias
+#endif
static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -- 2.43.0
On Wed, 19 Jun 2024 at 15:36, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
On 19.06.24 14:23, Ilias Apalodimas wrote:
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
If we have multiple weak implementations of functions, the linker might choose any of these. ARM and RISC-V already provide a weak implementation of flush_dcache_all().
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
cmd/cache.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..16fa0f7c652 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -52,11 +52,14 @@ static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, return 0; }
+/* ARM and RISC-V define a weak flush_dcache_all() themselves. */ +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) void __weak flush_dcache_all(void) { puts("No arch specific flush_dcache_all available!\n"); /* please define arch specific flush_dcache_all */ }
Aren't we supposed to add a single __weak function so the linker can replace it? IOW why is the declaration for Arm/riscv a weak one?
Some sub-architectures override the architecture specific weak implementation, e.g.
arch/riscv/cpu/andes/cache.c:44: void flush_dcache_all(void)
arch/arm/cpu/arm926ejs/cache.c:17: void flush_dcache_all(void)
Ok, this does fix a problem, but afaict this is a band-aid and the cache management is a mess overall -- e.g invalidate_icache_all() will suffer from the same issue if a sub-architecture decides to define its own in the future.
Would it be less bad to define static inline __weak flush_dcache_all(void) { } static inline __weak flush_icache_all(void) { } in include/cpu_func.h instead of a random cmd file? We can only define those if !CONFIG_ARM && !!CONFIG_RISCV and add a comment on why. It's kind of putting lipstick on a pig, but at least we'll have them gathered in a single header file and know what we have to fix.
Cheers /Ilias
Best regards
Heinrich
Thanks /Ilias
+#endif
static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -- 2.43.0
On Wed, 19 Jun 2024 at 16:05, Ilias Apalodimas ilias.apalodimas@linaro.org wrote:
On Wed, 19 Jun 2024 at 15:36, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
On 19.06.24 14:23, Ilias Apalodimas wrote:
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
If we have multiple weak implementations of functions, the linker might choose any of these. ARM and RISC-V already provide a weak implementation of flush_dcache_all().
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
cmd/cache.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..16fa0f7c652 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -52,11 +52,14 @@ static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, return 0; }
+/* ARM and RISC-V define a weak flush_dcache_all() themselves. */ +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) void __weak flush_dcache_all(void) { puts("No arch specific flush_dcache_all available!\n"); /* please define arch specific flush_dcache_all */ }
Aren't we supposed to add a single __weak function so the linker can replace it? IOW why is the declaration for Arm/riscv a weak one?
Some sub-architectures override the architecture specific weak implementation, e.g.
arch/riscv/cpu/andes/cache.c:44: void flush_dcache_all(void)
arch/arm/cpu/arm926ejs/cache.c:17: void flush_dcache_all(void)
Ok, this does fix a problem, but afaict this is a band-aid and the cache management is a mess overall -- e.g invalidate_icache_all() will suffer from the same issue if a sub-architecture decides to define its own in the future.
Would it be less bad to define static inline __weak flush_dcache_all(void) { } static inline __weak flush_icache_all(void) { }
ugh, this but without the inline!
Thanks /Ilias
in include/cpu_func.h instead of a random cmd file? We can only define those if !CONFIG_ARM && !!CONFIG_RISCV and add a comment on why. It's kind of putting lipstick on a pig, but at least we'll have them gathered in a single header file and know what we have to fix.
Cheers /Ilias
Best regards
Heinrich
Thanks /Ilias
+#endif
static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -- 2.43.0
On 19.06.24 15:19, Ilias Apalodimas wrote:
On Wed, 19 Jun 2024 at 16:05, Ilias Apalodimas ilias.apalodimas@linaro.org wrote:
On Wed, 19 Jun 2024 at 15:36, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
On 19.06.24 14:23, Ilias Apalodimas wrote:
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
If we have multiple weak implementations of functions, the linker might choose any of these. ARM and RISC-V already provide a weak implementation of flush_dcache_all().
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
cmd/cache.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..16fa0f7c652 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -52,11 +52,14 @@ static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, return 0; }
+/* ARM and RISC-V define a weak flush_dcache_all() themselves. */ +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) void __weak flush_dcache_all(void) { puts("No arch specific flush_dcache_all available!\n"); /* please define arch specific flush_dcache_all */ }
Aren't we supposed to add a single __weak function so the linker can replace it? IOW why is the declaration for Arm/riscv a weak one?
Some sub-architectures override the architecture specific weak implementation, e.g.
arch/riscv/cpu/andes/cache.c:44: void flush_dcache_all(void)
arch/arm/cpu/arm926ejs/cache.c:17: void flush_dcache_all(void)
Ok, this does fix a problem, but afaict this is a band-aid and the cache management is a mess overall -- e.g invalidate_icache_all() will suffer from the same issue if a sub-architecture decides to define its own in the future.
Would it be less bad to define static inline __weak flush_dcache_all(void) { } static inline __weak flush_icache_all(void) { }
ugh, this but without the inline!
Thanks /Ilias
GCC does not allow both a weak and a strong implementation in the same module:
CC board/sandbox/sandbox.o arch/sandbox/cpu/cache.c:15:6: error: redefinition of ‘invalidate_icache_all’ 15 | void invalidate_icache_all(void) | ^~~~~~~~~~~~~~~~~~~~~ In file included from arch/sandbox/cpu/cache.c:6: include/cpu_func.h:74:13: note: previous definition of ‘invalidate_icache_all’ with type ‘void(void)’ 74 | void __weak invalidate_icache_all(void) | ^~~~~~~~~~~~~~~~~~~~~
Best regards
Heinrich
in include/cpu_func.h instead of a random cmd file? We can only define those if !CONFIG_ARM && !!CONFIG_RISCV and add a comment on why. It's kind of putting lipstick on a pig, but at least we'll have them gathered in a single header file and know what we have to fix.
Cheers /Ilias
Best regards
Heinrich
Thanks /Ilias
+#endif
static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -- 2.43.0
On Wed, Jun 19, 2024 at 03:23:36PM +0300, Ilias Apalodimas wrote:
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
If we have multiple weak implementations of functions, the linker might choose any of these. ARM and RISC-V already provide a weak implementation of flush_dcache_all().
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
cmd/cache.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/cmd/cache.c b/cmd/cache.c index 0254ff17f9b..16fa0f7c652 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -52,11 +52,14 @@ static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, return 0; }
+/* ARM and RISC-V define a weak flush_dcache_all() themselves. */ +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) void __weak flush_dcache_all(void) { puts("No arch specific flush_dcache_all available!\n"); /* please define arch specific flush_dcache_all */ }
Aren't we supposed to add a single __weak function so the linker can replace it? IOW why is the declaration for Arm/riscv a weak one?
Yeah, I'm going to see about re-structuring this a little bit right now.
In EFI sub-system we rely on invalidate_icache_all() to invalidate the instruction cache after loading binaries. Add the missing implementation on ARM1136, ARM1176.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com --- arch/arm/cpu/arm11/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 01d2e1a125d..4bf0446b543 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -116,3 +116,15 @@ void enable_caches(void) #endif } #endif + +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) +/* Invalidate entire I-cache */ +void invalidate_icache_all(void) +{ + unsigned long i = 0; + + asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i)); +} +#else +void invalidate_icache_all(void) {} +#endif
Hi Heinrich,
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
In EFI sub-system we rely on invalidate_icache_all() to invalidate the instruction cache after loading binaries. Add the missing implementation on ARM1136, ARM1176.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
arch/arm/cpu/arm11/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 01d2e1a125d..4bf0446b543 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -116,3 +116,15 @@ void enable_caches(void) #endif } #endif
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) +/* Invalidate entire I-cache */ +void invalidate_icache_all(void) +{
unsigned long i = 0;asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
This looks correct, but can't we define it as __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); ?
Thanks /Ilias
+} +#else +void invalidate_icache_all(void) {}
+#endif
2.43.0
On 19.06.24 14:22, Ilias Apalodimas wrote:
Hi Heinrich,
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
In EFI sub-system we rely on invalidate_icache_all() to invalidate the instruction cache after loading binaries. Add the missing implementation on ARM1136, ARM1176.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
arch/arm/cpu/arm11/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 01d2e1a125d..4bf0446b543 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -116,3 +116,15 @@ void enable_caches(void) #endif } #endif
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) +/* Invalidate entire I-cache */ +void invalidate_icache_all(void) +{
unsigned long i = 0;asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));This looks correct, but can't we define it as __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); ?
Both compile to the same code. So we should simplify the expression.
arch/arm/cpu/armv7/cache_v7.c and other modules always uses asm and not __asm__.
@Tom: Can we specify what is preferred in doc/develop/codingstyle.rst?
https://gcc.gnu.org/onlinedocs/gcc/Alternate-Keywords.html gives some background.
Best regards
Heinrich
Thanks /Ilias
+} +#else +void invalidate_icache_all(void) {}
+#endif
2.43.0
On Wed, Jun 19, 2024 at 02:56:24PM +0200, Heinrich Schuchardt wrote:
On 19.06.24 14:22, Ilias Apalodimas wrote:
Hi Heinrich,
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
In EFI sub-system we rely on invalidate_icache_all() to invalidate the instruction cache after loading binaries. Add the missing implementation on ARM1136, ARM1176.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
arch/arm/cpu/arm11/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 01d2e1a125d..4bf0446b543 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -116,3 +116,15 @@ void enable_caches(void) #endif } #endif
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) +/* Invalidate entire I-cache */ +void invalidate_icache_all(void) +{
unsigned long i = 0;asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));This looks correct, but can't we define it as __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); ?
Both compile to the same code. So we should simplify the expression.
arch/arm/cpu/armv7/cache_v7.c and other modules always uses asm and not __asm__.
@Tom: Can we specify what is preferred in doc/develop/codingstyle.rst?
https://gcc.gnu.org/onlinedocs/gcc/Alternate-Keywords.html gives some background.
Sure.
If multiple weak implementations of a weak function exist, it is unclear which one the linker should chose. cmd/cache.c already defines a weak invalidate_icache_all().
We don't need a call to invalidate_icache_all() on x86. ARM, RISC-V, and Sandbox provide an implementation.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com --- lib/efi_loader/efi_image_loader.c | 13 +++++++------ lib/efi_loader/efi_runtime.c | 7 ++++++- 2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index 60424360328..45dc5b6b244 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -173,11 +173,6 @@ static efi_status_t efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel, return EFI_SUCCESS; }
-void __weak invalidate_icache_all(void) -{ - /* If the system doesn't support icache_all flush, cross our fingers */ -} - /** * efi_set_code_and_data_type() - determine the memory types to be used for code * and data. @@ -986,7 +981,13 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, /* Flush cache */ flush_cache((ulong)efi_reloc, ALIGN(virt_size, EFI_CACHELINE_SIZE)); - invalidate_icache_all(); + + /* + * If on x86 a write affects a prefetched instruction, + * the prefetch queue is invalidated. + */ + if (!CONFIG_IS_ENABLED(X86)) + invalidate_icache_all();
/* Populate the loaded image interface bits */ loaded_image_info->image_base = efi_reloc; diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 011bcd04836..05369c47b01 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -783,7 +783,12 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) lastoff = offset; #endif
- invalidate_icache_all(); + /* + * If on x86 a write affects a prefetched instruction, + * the prefetch queue is invalidated. + */ + if (!CONFIG_IS_ENABLED(X86)) + invalidate_icache_all(); }
/**
On Sun, 16 Jun 2024 at 20:31, Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
If multiple weak implementations of a weak function exist, it is unclear which one the linker should chose. cmd/cache.c already defines a weak invalidate_icache_all().
We don't need a call to invalidate_icache_all() on x86. ARM, RISC-V, and Sandbox provide an implementation.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
lib/efi_loader/efi_image_loader.c | 13 +++++++------ lib/efi_loader/efi_runtime.c | 7 ++++++- 2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index 60424360328..45dc5b6b244 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -173,11 +173,6 @@ static efi_status_t efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel, return EFI_SUCCESS; }
-void __weak invalidate_icache_all(void) -{
/* If the system doesn't support icache_all flush, cross our fingers */-}
/**
- efi_set_code_and_data_type() - determine the memory types to be used for code
and data.@@ -986,7 +981,13 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, /* Flush cache */ flush_cache((ulong)efi_reloc, ALIGN(virt_size, EFI_CACHELINE_SIZE));
invalidate_icache_all();
/** If on x86 a write affects a prefetched instruction,* the prefetch queue is invalidated.*/if (!CONFIG_IS_ENABLED(X86))invalidate_icache_all(); /* Populate the loaded image interface bits */ loaded_image_info->image_base = efi_reloc;diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 011bcd04836..05369c47b01 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -783,7 +783,12 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) lastoff = offset; #endif
invalidate_icache_all();
/** If on x86 a write affects a prefetched instruction,* the prefetch queue is invalidated.*/if (!CONFIG_IS_ENABLED(X86))invalidate_icache_all();}
/**
2.43.0
Reviewed-by: Ilias Apalodimas ilias.apalodimas@linaro.org
On Sun, Jun 16, 2024 at 07:31:05PM +0200, Heinrich Schuchardt wrote:
If multiple weak implementations of a weak function exist, it is unclear which one the linker should chose. cmd/cache.c already defines a weak invalidate_icache_all().
We don't need a call to invalidate_icache_all() on x86. ARM, RISC-V, and Sandbox provide an implementation.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com Reviewed-by: Ilias Apalodimas ilias.apalodimas@linaro.org
Reviewed-by: Tom Rini trini@konsulko.com
On Sun, 16 Jun 2024 19:31:02 +0200, Heinrich Schuchardt wrote:
If we have multiple weak implementations of functions, the linker might choose any of these.
ARM and RISC-V already provide a weak implementation of flush_dcache_all() but cmd/cache.c provides another implementation. Add an #ifdef to avoid the duplication.
[...]
Applied to u-boot/master, thanks!
participants (3)
-
Heinrich Schuchardt -
Ilias Apalodimas -
Tom Rini