[v3 0/2] mtd: spi-nor-ids: add support for XTX part# and modify some comment - U-Boot - denx.biz

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[v3 0/2] mtd: spi-nor-ids: add support for XTX part# and modify some comment

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[PULL] u-boot-at91-fixes-2023.07-a

Bruce Suen

19 Jun 2023 19 Jun '23

12:28 p.m.

0001-change full company name of XTX 0002-add xtxtech part#

changed from v2: seprate it into two patches

Bruce Suen (2): mtd: spi-nor-ids: change full company name of XTX mtd: spi-nor-ids: add xtxtech part#

drivers/mtd/spi/spi-nor-ids.c | 38 +++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-)

-- 2.25.1

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Bruce Suen

19 Jun 19 Jun

12:28 p.m.

New subject: [v3 1/2] mtd: spi-nor-ids: change full company name of XTX

XTX changed full company name from "XTX Technology (Shenzhen) Limited to "XTX Technology Limited" since 2020,So remove "(Shenzhen)".

Signed-off-by: Bruce Suen bruce_suen@163.com --- drivers/mtd/spi/spi-nor-ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3f8b796789..a00e4e50a4 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -528,7 +528,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX - /* XTX Technology (Shenzhen) Limited */ + /* XTX Technology Limited */ { INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif { },

-- 2.25.1

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bruce_suen＠163.com

4:53 p.m.

New subject: [v3 2/2] mtd: spi-nor-ids: add xtxtech part#

add following XTX part numbers to the list:

xt25f08: 3V QSPI, 8Mbit xt25f16: 3V QSPI, 16Mbit xt25f32: 3V QSPI, 32Mbit xt25f64: 3V QSPI, 64Mbit xt25f128: 3V QSPI, 128Mbit xt25f256: 3V QSPI, 256Mbit xt25q08: 1.8V QSPI, 8Mbit xt25q16: 1.8V QSPI, 16Mbit xt25q32: 1.8V QSPI, 32Mbit xt25q64: 1.8V QSPI, 64Mbit xt25q128: 1.8V QSPI, 128Mbit xt25q256: 1.8V QSPI, 256Mbit xt25q512: 1.8V QSPI, 512Mbit xt25q01g: 1.8V QSPI, 1Gbit xt25w512: wide voltage, QSPI, 512Mbit xt25w01g: wide voltage, QSPI, 1Gbit

remove xt25f128b and add xt25f128,because xt25f128b andxt25f128f share same jdec id,we use xt25f128 instead.

Signed-off-by: Bruce Suen bruce_suen@163.com --- drivers/mtd/spi/spi-nor-ids.c | 36 ++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index a00e4e50a4..9a079c851d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -529,7 +529,41 @@ const struct flash_info spi_nor_ids[] = { #endif #ifdef CONFIG_SPI_FLASH_XTX /* XTX Technology Limited */ - { INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + /* adding these 3V QSPI flash parts */ + { INFO("xt25f08", 0x0b4014, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f16", 0x0b4015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f32", 0x0b4016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f64", 0x0b4017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f128", 0x0b4018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f256", 0x0b4019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + /* adding these 1.8V QSPI flash parts */ + { INFO("xt25q08", 0x0b6014, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q16", 0x0b6015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q32", 0x0b6016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q64", 0x0b6017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q128", 0x0b6018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q256", 0x0b6019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25q512", 0x0b601A, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25q01g", 0x0b601B, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + /* adding these wide voltage QSPI flash parts */ + { INFO("xt25w512", 0x0b651A, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25w01g", 0x0b651B, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, #endif { }, }; -- 2.25.1

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Bruce Suen
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