[PATCH v2 0/7] Add Support for MMC/SD in J721e
The following patches add support for MMC/SD in J721e. Currently, SD card is capped at 25 MBps and eMMC is capped at 50 MBps. Support for higher speeds and eMMC boot support will be added in futures series.
v2: 1. Dropped FAT_WRITE patch because its already merged. 2. Fixed up environment patch to support latest CONFIGS. 3. Rebased to the latest u-boot-ti next branch
Faiz Abbas (7): mmc: am654_sdhci: Get Xin clock by name mmc: am654_sdhci: Add Support for configuring PHY in J721e arm: dts: k3-j721e-common-proc-board: Remove voltage-ranges from sdhci nodes arm: dts: k3-j721e-common-proc-board: Add pinmux for SD card configs: j721e_evm: Add configs for ADMA Support configs: j721e_evm_a72: Add Support for GPT partitions configs: j721e_evm: Add configs for environment in eMMC
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +- .../k3-j721e-common-proc-board-u-boot.dtsi | 4 + arch/arm/dts/k3-j721e-common-proc-board.dts | 22 ++- .../arm/dts/k3-j721e-r5-common-proc-board.dts | 16 +++ configs/j721e_evm_a72_defconfig | 9 +- configs/j721e_evm_r5_defconfig | 7 +- drivers/mmc/am654_sdhci.c | 129 ++++++++++++++---- include/configs/j721e_evm.h | 12 ++ 8 files changed, 166 insertions(+), 36 deletions(-)
Get clk_xin by name instead of by index to avoid having to put clocks in the same order in all devices.
Signed-off-by: Faiz Abbas faiz_abbas@ti.com --- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 ++- drivers/mmc/am654_sdhci.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index bea80c5d00..57877f3d84 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -25,7 +25,8 @@ compatible = "ti,am654-sdhci-5.1"; reg = <0x0 0x4FA0000 0x0 0x1000>, <0x0 0x4FB0000 0x0 0x400>; - clocks = <&k3_clks 48 1>; + clocks =<&k3_clks 48 0>, <&k3_clks 48 1>; + clock-names = "clk_ahb", "clk_xin"; power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; max-frequency = <25000000>; ti,otap-del-sel = <0x2>; diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index 7cd5516197..a4359fcc18 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -223,7 +223,7 @@ static int am654_sdhci_probe(struct udevice *dev) unsigned long clock; int ret;
- ret = clk_get_by_index(dev, 0, &clk); + ret = clk_get_by_name(dev, "clk_xin", &clk); if (ret) { dev_err(dev, "failed to get clock\n"); return ret;
Add Support for writing to PHY registers for J721e. There are number of differences between the J721e 8 bit PHY, J721e 4 bit PHY and AM654 PHY. Create a driver_data structure with an ops and flags field and use the flags field to indicate these differences. The differences are as follows:
1. The J721e 4 bit instance PHY does not have a DLL. Introduce a DLL_PRESENT flag to make sure that DLL related registers are accessed only where they are present. Also add a separate set_ios_post() callback.
2. The J721e 8 bit instance is not muxed with anything else inside the SoC and hence the IOMUX_ENABLE filed does not exist. Add a flag which is used to indicate the presence of this field.
3. The register field used to select DLL frequency is 3 bit wide in J721e as compared to 2 bits in AM65x. Add another flag that distinguishes these fields.
4. The strobe select field is 8 bit wide as compared to 4 bit wide for AM65x. Add yet another flag to indicate this difference. Strobe select is used only for HS400 speed mode, support for which has not been added in AM65x.
Signed-off-by: Faiz Abbas faiz_abbas@ti.com --- drivers/mmc/am654_sdhci.c | 127 +++++++++++++++++++++++++++++--------- 1 file changed, 98 insertions(+), 29 deletions(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index a4359fcc18..41a90834ff 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -36,11 +36,14 @@ #define OTAPDLYSEL_SHIFT 12 #define OTAPDLYSEL_MASK GENMASK(15, 12) #define STRBSEL_SHIFT 24 -#define STRBSEL_MASK GENMASK(27, 24) +#define STRBSEL_4BIT_MASK GENMASK(27, 24) +#define STRBSEL_8BIT_MASK GENMASK(31, 24) #define SEL50_SHIFT 8 #define SEL50_MASK BIT(SEL50_SHIFT) #define SEL100_SHIFT 9 #define SEL100_MASK BIT(SEL100_SHIFT) +#define FREQSEL_SHIFT 8 +#define FREQSEL_MASK GENMASK(10, 8) #define DLL_TRIM_ICP_SHIFT 4 #define DLL_TRIM_ICP_MASK GENMASK(7, 4) #define DR_TY_SHIFT 20 @@ -72,11 +75,20 @@ struct am654_sdhci_plat { u32 otap_del_sel; u32 trm_icp; u32 drv_strength; + u32 strb_sel; u32 flags; #define DLL_PRESENT (1 << 0) +#define IOMUX_PRESENT (1 << 1) +#define FREQSEL_2_BIT (1 << 2) +#define STRBSEL_4_BIT (1 << 3) bool dll_on; };
+struct am654_driver_data { + const struct sdhci_ops *ops; + u32 flags; +}; + static void am654_sdhci_set_control_reg(struct sdhci_host *host) { struct mmc *mmc = (struct mmc *)host->mmc; @@ -97,7 +109,7 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host) struct udevice *dev = host->mmc->dev; struct am654_sdhci_plat *plat = dev_get_platdata(dev); unsigned int speed = host->mmc->clock; - int sel50, sel100; + int sel50, sel100, freqsel; u32 mask, val; int ret;
@@ -121,25 +133,49 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host) mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; val = (1 << OTAPDLYENA_SHIFT) | (plat->otap_del_sel << OTAPDLYSEL_SHIFT); - regmap_update_bits(plat->base, PHY_CTRL4, mask, val); - switch (speed) { - case 200000000: - sel50 = 0; - sel100 = 0; - break; - case 100000000: - sel50 = 0; - sel100 = 1; - break; - default: - sel50 = 1; - sel100 = 0; + + /* Write to STRBSEL for HS400 speed mode */ + if (host->mmc->selected_mode == MMC_HS_400) { + if (plat->flags & STRBSEL_4_BIT) + mask |= STRBSEL_4BIT_MASK; + else + mask |= STRBSEL_8BIT_MASK; + + val |= plat->strb_sel << STRBSEL_SHIFT; }
- /* Configure PHY DLL frequency */ - mask = SEL50_MASK | SEL100_MASK; - val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT); - regmap_update_bits(plat->base, PHY_CTRL5, mask, val); + regmap_update_bits(plat->base, PHY_CTRL4, mask, val); + + if (plat->flags & FREQSEL_2_BIT) { + switch (speed) { + case 200000000: + sel50 = 0; + sel100 = 0; + break; + case 100000000: + sel50 = 0; + sel100 = 1; + break; + default: + sel50 = 1; + sel100 = 0; + } + + /* Configure PHY DLL frequency */ + mask = SEL50_MASK | SEL100_MASK; + val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT); + regmap_update_bits(plat->base, PHY_CTRL5, mask, val); + } else { + switch (speed) { + case 200000000: + freqsel = 0x0; + break; + default: + freqsel = 0x4; + } + regmap_update_bits(plat->base, PHY_CTRL5, FREQSEL_MASK, + freqsel << FREQSEL_SHIFT); + }
/* Enable DLL */ regmap_update_bits(plat->base, PHY_CTRL1, ENDLL_MASK, @@ -164,8 +200,37 @@ const struct sdhci_ops am654_sdhci_ops = { .set_control_reg = &am654_sdhci_set_control_reg, };
+const struct am654_driver_data am654_drv_data = { + .ops = &am654_sdhci_ops, + .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT, +}; + +const struct am654_driver_data j721e_8bit_drv_data = { + .ops = &am654_sdhci_ops, + .flags = DLL_PRESENT, +}; + +static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host) +{ + struct udevice *dev = host->mmc->dev; + struct am654_sdhci_plat *plat = dev_get_platdata(dev); + u32 mask, val; + + mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; + val = (1 << OTAPDLYENA_SHIFT) | + (plat->otap_del_sel << OTAPDLYSEL_SHIFT); + regmap_update_bits(plat->base, PHY_CTRL4, mask, val); + + return 0; +} + const struct sdhci_ops j721e_4bit_sdhci_ops = { - .set_control_reg = &am654_sdhci_set_control_reg, + .set_ios_post = &j721e_4bit_sdhci_set_ios_post, +}; + +const struct am654_driver_data j721e_4bit_drv_data = { + .ops = &j721e_4bit_sdhci_ops, + .flags = IOMUX_PRESENT, };
int am654_sdhci_init(struct am654_sdhci_plat *plat) @@ -202,7 +267,8 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat) }
/* Enable pins by setting IO mux to 0 */ - regmap_update_bits(plat->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0); + if (plat->flags & IOMUX_PRESENT) + regmap_update_bits(plat->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0);
/* Set slot type based on SD or eMMC */ if (plat->non_removable) @@ -215,6 +281,8 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)
static int am654_sdhci_probe(struct udevice *dev) { + struct am654_driver_data *drv_data = + (struct am654_driver_data *)dev_get_driver_data(dev); struct am654_sdhci_plat *plat = dev_get_platdata(dev); struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct sdhci_host *host = dev_get_priv(dev); @@ -242,7 +310,8 @@ static int am654_sdhci_probe(struct udevice *dev) AM654_SDHCI_MIN_FREQ); if (ret) return ret; - host->ops = (struct sdhci_ops *)dev_get_driver_data(dev); + + host->ops = drv_data->ops; host->mmc->priv = host; upriv->mmc = host->mmc;
@@ -265,10 +334,6 @@ static int am654_sdhci_ofdata_to_platdata(struct udevice *dev) host->ioaddr = (void *)dev_read_addr(dev); plat->non_removable = dev_read_bool(dev, "non-removable");
- if (device_is_compatible(dev, "ti,am654-sdhci-5.1") || - device_is_compatible(dev, "ti,j721e-sdhci-8bit")) - plat->flags |= DLL_PRESENT; - ret = dev_read_u32(dev, "ti,otap-del-sel", &plat->otap_del_sel); if (ret) return ret; @@ -314,23 +379,27 @@ static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)
static int am654_sdhci_bind(struct udevice *dev) { + struct am654_driver_data *drv_data = + (struct am654_driver_data *)dev_get_driver_data(dev); struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ plat->flags = drv_data->flags; + return sdhci_bind(dev, &plat->mmc, &plat->cfg); }
static const struct udevice_id am654_sdhci_ids[] = { { .compatible = "ti,am654-sdhci-5.1", - .data = (ulong)&am654_sdhci_ops, + .data = (ulong)&am654_drv_data, }, { .compatible = "ti,j721e-sdhci-8bit", - .data = (ulong)&am654_sdhci_ops, + .data = (ulong)&j721e_8bit_drv_data, }, { .compatible = "ti,j721e-sdhci-4bit", - .data = (ulong)&j721e_4bit_sdhci_ops, + .data = (ulong)&j721e_4bit_drv_data, }, { } };
voltage-ranges properties are NOP. Remove them.
Signed-off-by: Faiz Abbas faiz_abbas@ti.com --- arch/arm/dts/k3-j721e-common-proc-board.dts | 2 -- 1 file changed, 2 deletions(-)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts index 137da7e425..72110d634d 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-common-proc-board.dts @@ -67,14 +67,12 @@
&main_sdhci0 { /* eMMC */ - voltage-ranges = <1800 1800>; non-removable; ti,driver-strength-ohm = <50>; };
&main_sdhci1 { /* SD/MMC */ - voltage-ranges = <1800 1800 3300 3300>; ti,driver-strength-ohm = <50>; };
Add pinmux for sdhci1 node connected to the SD card.
Signed-off-by: Faiz Abbas faiz_abbas@ti.com --- .../k3-j721e-common-proc-board-u-boot.dtsi | 4 ++++ arch/arm/dts/k3-j721e-common-proc-board.dts | 20 ++++++++++++++++++- .../arm/dts/k3-j721e-r5-common-proc-board.dts | 16 +++++++++++++++ 3 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 9ca025c4c5..aff0efaca8 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -325,3 +325,7 @@ reg-names = "gmii-sel"; }; }; + +&main_mmc1_pins_default { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts index 72110d634d..9ed538ca8c 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-common-proc-board.dts @@ -65,6 +65,22 @@ status = "disabled"; };
+&main_pmx0 { + main_mmc1_pins_default: main_mmc1_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ + J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ + J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ + J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */ + J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ + J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */ + J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */ + J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */ + J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ + >; + }; +}; + &main_sdhci0 { /* eMMC */ non-removable; @@ -72,7 +88,9 @@ };
&main_sdhci1 { - /* SD/MMC */ + /* SD card */ + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_pins_default>; ti,driver-strength-ohm = <50>; };
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 1a8e107861..28a355d49c 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -119,6 +119,20 @@ J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */ >; }; + + main_mmc1_pins_default: main_mmc1_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ + J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ + J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ + J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */ + J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ + J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */ + J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */ + J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */ + J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ + >; + }; };
&wkup_uart0 { @@ -156,6 +170,8 @@ /delete-property/ power-domains; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_pins_default>; clock-names = "clk_xin"; clocks = <&clk_200mhz>; ti,driver-strength-ohm = <50>;
Add configs for ADMA Support.
Signed-off-by: Faiz Abbas faiz_abbas@ti.com --- configs/j721e_evm_a72_defconfig | 2 ++ configs/j721e_evm_r5_defconfig | 1 + 2 files changed, 3 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index ec8444ab5b..7ec3a53022 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -83,6 +83,8 @@ CONFIG_K3_SEC_PROXY=y CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 10f4f00699..52dfe39641 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -69,6 +69,7 @@ CONFIG_FS_LOADER=y CONFIG_K3_AVS0=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y +CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y
Introduce a default GPT partition table for eMMC.
Signed-off-by: Faiz Abbas faiz_abbas@ti.com --- include/configs/j721e_evm.h | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 71cea3dd8a..bbbbe4296e 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -71,6 +71,11 @@ "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \ "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
+#define PARTS_DEFAULT \ + /* Linux partitions */ \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" + /* U-Boot MMC-specific configuration */ #define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \ "boot=mmc\0" \ @@ -88,6 +93,7 @@ "load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && " \ "fdt apply ${overlayaddr};" \ "done;\0" \ + "partitions=" PARTS_DEFAULT \ "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ "${bootdir}/${name_kern}\0"
Add config to save and read back environment from eMMC.
Signed-off-by: Faiz Abbas faiz_abbas@ti.com --- configs/j721e_evm_a72_defconfig | 7 ++++++- configs/j721e_evm_r5_defconfig | 6 +++++- include/configs/j721e_evm.h | 6 ++++++ 3 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 7ec3a53022..fd7fec1c4e 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -5,10 +5,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0x680000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_ENV_SIZE=0x20000 CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_FS_FAT=y @@ -24,6 +25,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_RESET=y @@ -54,6 +56,9 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 52dfe39641..cb6c74d7bf 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -6,10 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x55000 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_R5_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0x680000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_ENV_SIZE=0x20000 CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y @@ -46,6 +47,9 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index bbbbe4296e..48d81dfd61 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -127,4 +127,10 @@ /* Now for the remaining common defines */ #include <configs/ti_armv7_common.h>
+/* MMC ENV related defines */ +#ifdef CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 1 +#endif + #endif /* __CONFIG_J721E_EVM_H */
On 16/01/20 7:42 PM, Faiz Abbas wrote:
The following patches add support for MMC/SD in J721e. Currently, SD card is capped at 25 MBps and eMMC is capped at 50 MBps. Support for higher speeds and eMMC boot support will be added in futures series.
v2:
- Dropped FAT_WRITE patch because its already merged.
- Fixed up environment patch to support latest CONFIGS.
- Rebased to the latest u-boot-ti next branch
Merged into u-boot-ti
Thanks and regards, Lokesh
Faiz Abbas (7): mmc: am654_sdhci: Get Xin clock by name mmc: am654_sdhci: Add Support for configuring PHY in J721e arm: dts: k3-j721e-common-proc-board: Remove voltage-ranges from sdhci nodes arm: dts: k3-j721e-common-proc-board: Add pinmux for SD card configs: j721e_evm: Add configs for ADMA Support configs: j721e_evm_a72: Add Support for GPT partitions configs: j721e_evm: Add configs for environment in eMMC
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +- .../k3-j721e-common-proc-board-u-boot.dtsi | 4 + arch/arm/dts/k3-j721e-common-proc-board.dts | 22 ++- .../arm/dts/k3-j721e-r5-common-proc-board.dts | 16 +++ configs/j721e_evm_a72_defconfig | 9 +- configs/j721e_evm_r5_defconfig | 7 +- drivers/mmc/am654_sdhci.c | 129 ++++++++++++++---- include/configs/j721e_evm.h | 12 ++ 8 files changed, 166 insertions(+), 36 deletions(-)
participants (2)
-
Faiz Abbas -
Lokesh Vutla