syscon_regmap_lookup_by_phandle() can be used to the regmap of a syscon device from a reference in the DTS. It operates similarly to the linux version of the namesake function.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com

---

Changes in v3: - in syscon_regmap_lookup_by_phandle(), use dev_dbg() instead of printf() - added unit test for syscon_regmap_lookup_by_phandle()

Changes in v2: None

arch/sandbox/dts/test.dts | 6 ++++-- drivers/core/syscon-uclass.c | 23 +++++++++++++++++++++++ include/syscon.h | 13 +++++++++++++ test/dm/syscon.c | 29 +++++++++++++++++++++++++++++ 4 files changed, 69 insertions(+), 2 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index b0f0ca8..fcb1e94 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -307,6 +307,8 @@

test4 { compatible = "denx,u-boot-probe-test"; + first-syscon = <&syscon0>; + second-sys-ctrl = <&another_system_controller>; }; };

@@ -376,12 +378,12 @@ }; };

- syscon@0 { + syscon0: syscon@0 { compatible = "sandbox,syscon0"; reg = <0x10 4>; };

- syscon@1 { + another_system_controller: syscon@1 { compatible = "sandbox,syscon1"; reg = <0x20 5 0x28 6 diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index a69937e..739fddd 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -45,6 +45,29 @@ static int syscon_pre_probe(struct udevice *dev) #endif }

+struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev, + const char *name) +{ + struct udevice *syscon; + struct regmap *r; + int err; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, + name, &syscon); + if (err) { + dev_dbg(dev, "unable to find syscon device\n"); + return ERR_PTR(err); + } + + r = syscon_get_regmap(syscon); + if (!r) { + dev_dbg(dev, "unable to find regmap\n"); + return ERR_PTR(-ENODEV); + } + + return r; +} + int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp) { struct udevice *dev; diff --git a/include/syscon.h b/include/syscon.h index 5d52b1c..23d257a 100644 --- a/include/syscon.h +++ b/include/syscon.h @@ -74,6 +74,19 @@ int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp); struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data);

/** + * syscon_regmap_lookup_by_phandle() - Look up a controller by a phandle + * + * This operates by looking up the given name in the device (device + * tree property) of the device using the system controller. + * + * @dev: Device using the system controller + * @name: Name of property referring to the system controller + * @return A pointer to the regmap if found, ERR_PTR(-ve) on error + */ +struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev, + const char *name); + +/** * syscon_get_first_range() - get the first memory range from a syscon regmap * * @driver_data: Driver data value to look up diff --git a/test/dm/syscon.c b/test/dm/syscon.c index c40f5fc..6f93e63 100644 --- a/test/dm/syscon.c +++ b/test/dm/syscon.c @@ -7,6 +7,7 @@ #include <common.h> #include <dm.h> #include <syscon.h> +#include <regmap.h> #include <asm/test.h> #include <dm/test.h> #include <test/ut.h> @@ -46,3 +47,31 @@ static int dm_test_syscon_by_driver_data(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_syscon_by_driver_data, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test system controller by phandle */ +static int dm_test_syscon_by_phandle(struct unit_test_state *uts) +{ + struct udevice *dev; + struct regmap *map; + + ut_assertok(uclass_get_device_by_name(UCLASS_TEST_PROBE, "test4", + &dev)); + if (!dev || IS_ERR(dev)) + return -ENODEV; + + ut_assertok_ptr(syscon_regmap_lookup_by_phandle(dev, "first-syscon")); + map = syscon_regmap_lookup_by_phandle(dev, "first-syscon"); + if (map && !IS_ERR(map)) + ut_asserteq(1, map->range_count); + + ut_assertok_ptr(syscon_regmap_lookup_by_phandle(dev, + "second-sys-ctrl")); + map = syscon_regmap_lookup_by_phandle(dev, "second-sys-controller"); + if (map && !IS_ERR(map)) + ut_asserteq(4, map->range_count); + + ut_assert(IS_ERR(syscon_regmap_lookup_by_phandle(dev, "not-present"))); + + return 0; +} +DM_TEST(dm_test_syscon_by_phandle, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

The omap5 uses the dwc3. The dwc3 supports the driver model but it requires some glue logic to load the the driver.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com

---

Changes in v3: - use the live tree API in the omap5 glue logic

Changes in v2: None

drivers/usb/host/Kconfig | 10 +++++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/dwc3-omap-glue.c | 60 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 71 insertions(+) create mode 100644 drivers/usb/host/dwc3-omap-glue.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index a7249b7..ae34eeb 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -79,6 +79,16 @@ config USB_XHCI_DRA7XX_INDEX Select the DRA7XX xHCI USB index. Current supported values: 0, 1.

+config USB_DM_XHCI_OMAP + bool "Support for OMAP family on-chip xHCI USB controller (DM version)" + depends on DM_USB + depends on ARCH_OMAP2PLUS + default y if DRA7XX + help + Enables support for the on-chip xHCI controller on TI OMAP family SoCs + using the Driver Model. + This driver provides the glue logic to probe the generic dwc3 driver. + config USB_XHCI_FSL bool "Support for NXP Layerscape on-chip xHCI USB controller" default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2 diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 9819489..a47446a 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -59,6 +59,7 @@ obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o obj-$(CONFIG_USB_XHCI_RCAR) += xhci-rcar.o obj-$(CONFIG_USB_XHCI_STI) += dwc3-sti-glue.o +obj-$(CONFIG_USB_DM_XHCI_OMAP) += dwc3-omap-glue.o

# designware obj-$(CONFIG_USB_DWC2) += dwc2.o diff --git a/drivers/usb/host/dwc3-omap-glue.c b/drivers/usb/host/dwc3-omap-glue.c new file mode 100644 index 0000000..5ce3af6 --- /dev/null +++ b/drivers/usb/host/dwc3-omap-glue.c @@ -0,0 +1,60 @@ +/* + * OMAP5 family DWC3 specific Glue layer + * + * Copyright (c) 2017 + * Jean-Jacques Hiblot jjhiblot@ti.com + * based on dwc3-sti-glue + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <dm/of_access.h> + +DECLARE_GLOBAL_DATA_PTR; + +static inline bool is_ofnode_compatible(ofnode node, const char *compat) +{ + const void *fdt = gd->fdt_blob; + + if (ofnode_is_np(node)) + return of_device_is_compatible(ofnode_to_np(node), compat, + NULL, NULL); + else + return !fdt_node_check_compatible(fdt, ofnode_to_offset(node), + compat); +} + +static int omap5_dwc3_glue_bind(struct udevice *dev) +{ + bool found = false; + ofnode node; + + dev_for_each_subnode(node, dev) { + if (is_ofnode_compatible(node, "snps,dwc3")) { + found = true; + break; + } + } + + if (!found) { + dev_err(dev, "Can't find subnode compatible with dwc3"); + return -ENOENT; + } + + return dm_scan_fdt_dev(dev); +} + +static const struct udevice_id omap5_dwc3_glue_ids[] = { + { .compatible = "ti,dwc3" }, + { } +}; + +U_BOOT_DRIVER(dwc3_omap5_glue) = { + .name = "dwc3_omap5_glue", + .id = UCLASS_MISC, + .of_match = omap5_dwc3_glue_ids, + .bind = omap5_dwc3_glue_bind, +};

This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com

---

Changes in v3: None Changes in v2: - omap-usb2-phy: Implement power_on and power_off callbacks

drivers/phy/Kconfig | 8 ++ drivers/phy/Makefile | 1 + drivers/phy/omap-usb2-phy.c | 198 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 207 insertions(+) create mode 100644 drivers/phy/omap-usb2-phy.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 4e9d099..9e84e25 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -110,4 +110,12 @@ config STI_USB_PHY used by USB2 and USB3 Host controllers available on STiH407 SoC families.

+config OMAP_USB2_PHY + bool "Support OMAP's USB2 PHY" + depends on PHY + depends on SYSCON + help + Support for the OMAP's USB2 PHY. + This PHY is found on OMAP devices supporting USB2. + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 68087ae..b79dbe0 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o +obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c new file mode 100644 index 0000000..9dcf7df --- /dev/null +++ b/drivers/phy/omap-usb2-phy.c @@ -0,0 +1,198 @@ +/* + * OMAP USB2 PHY driver + * + * Copyright (c) 2017 + * Jean-Jacques Hiblot jjhiblot@ti.com + * based on dwc3-sti-glue + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <dm.h> +#include <errno.h> +#include <generic-phy.h> +#include <regmap.h> +#include <syscon.h> + +#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(0) + +#define OMAP_DEV_PHY_PD BIT(0) +#define OMAP_USB2_PHY_PD BIT(28) + +#define USB2PHY_DISCON_BYP_LATCH BIT(31) +#define USB2PHY_ANA_CONFIG1 (0x4c) + +DECLARE_GLOBAL_DATA_PTR; + +struct omap_usb2_phy { + struct regmap *pwr_regmap; + ulong flags; + void *phy_base; + u32 pwr_reg_offset; +}; + +struct usb_phy_data { + const char *label; + u8 flags; + u32 mask; + u32 power_on; + u32 power_off; +}; + +static const struct usb_phy_data omap5_usb2_data = { + .label = "omap5_usb2", + .flags = 0, + .mask = OMAP_DEV_PHY_PD, + .power_off = OMAP_DEV_PHY_PD, +}; + +static const struct usb_phy_data dra7x_usb2_data = { + .label = "dra7x_usb2", + .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT, + .mask = OMAP_DEV_PHY_PD, + .power_off = OMAP_DEV_PHY_PD, +}; + +static const struct usb_phy_data dra7x_usb2_phy2_data = { + .label = "dra7x_usb2_phy2", + .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT, + .mask = OMAP_USB2_PHY_PD, + .power_off = OMAP_USB2_PHY_PD, +}; + +static const struct udevice_id omap_usb2_id_table[] = { + { + .compatible = "ti,omap5-usb2", + .data = (ulong)&omap5_usb2_data, + }, + { + .compatible = "ti,dra7x-usb2", + .data = (ulong)&dra7x_usb2_data, + }, + { + .compatible = "ti,dra7x-usb2-phy2", + .data = (ulong)&dra7x_usb2_phy2_data, + }, + {}, +}; + +static int omap_usb_phy_power(struct phy *usb_phy, bool on) +{ + struct udevice *dev = usb_phy->dev; + const struct usb_phy_data *data; + const struct omap_usb2_phy *phy = dev_get_priv(dev); + u32 val; + int rc; + + data = (const struct usb_phy_data *)dev_get_driver_data(dev); + if (!data) + return -EINVAL; + + rc = regmap_read(phy->pwr_regmap, phy->pwr_reg_offset, &val); + if (rc) + return rc; + val &= ~data->mask; + if (on) + val |= data->power_on; + else + val |= data->power_off; + rc = regmap_write(phy->pwr_regmap, phy->pwr_reg_offset, val); + if (rc) + return rc; + + return 0; +} + +static int omap_usb2_phy_init(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct omap_usb2_phy *priv = dev_get_priv(dev); + u32 val; + + if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) { + /* + * + * Reduce the sensitivity of internal PHY by enabling the + * DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This + * resolves issues with certain devices which can otherwise + * be prone to false disconnects. + * + */ + val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1); + val |= USB2PHY_DISCON_BYP_LATCH; + writel(val, priv->phy_base + USB2PHY_ANA_CONFIG1); + } + + return 0; +} + +static int omap_usb2_phy_power_on(struct phy *usb_phy) +{ + return omap_usb_phy_power(usb_phy, true); +} + +static int omap_usb2_phy_power_off(struct phy *usb_phy) +{ + return omap_usb_phy_power(usb_phy, false); +} + +static int omap_usb2_phy_exit(struct phy *usb_phy) +{ + return omap_usb_phy_power(usb_phy, false); +} + +struct phy_ops omap_usb2_phy_ops = { + .init = omap_usb2_phy_init, + .power_on = omap_usb2_phy_power_on, + .power_off = omap_usb2_phy_power_off, + .exit = omap_usb2_phy_exit, +}; + +int omap_usb2_phy_probe(struct udevice *dev) +{ + int rc; + struct regmap *regmap; + struct omap_usb2_phy *priv = dev_get_priv(dev); + const struct usb_phy_data *data; + u32 tmp[2]; + + data = (const struct usb_phy_data *)dev_get_driver_data(dev); + if (!data) + return -EINVAL; + + if (data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) { + u32 base = dev_read_addr(dev); + + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + priv->phy_base = (void *)base; + priv->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT; + } + + regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-phy-power"); + if (IS_ERR(regmap)) { + printf("can't get regmap (err %ld)\n", PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + priv->pwr_regmap = regmap; + + rc = dev_read_u32_array(dev, "syscon-phy-power", tmp, 2); + if (rc) { + printf("couldn't get power reg. offset (err %d)\n", rc); + return rc; + } + priv->pwr_reg_offset = tmp[1]; + + return 0; +} + +U_BOOT_DRIVER(omap_usb2_phy) = { + .name = "omap_usb2_phy", + .id = UCLASS_PHY, + .of_match = omap_usb2_id_table, + .probe = omap_usb2_phy_probe, + .ops = &omap_usb2_phy_ops, + .priv_auto_alloc_size = sizeof(struct omap_usb2_phy), +};

From: Vignesh R vigneshr@ti.com

Enable USB clocks in late init stage to support ports under DM_USB.

Signed-off-by: Vignesh R vigneshr@ti.com

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---

Changes in v3: None Changes in v2: - am57xx boards: when DM_USB is used, turn on the required USB clocks

board/ti/am57xx/board.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)

diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 5bd8778..cd53776 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -676,6 +676,19 @@ out: return; }

+#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL) +static int device_okay(const char *path) +{ + int node; + + node = fdt_path_offset(gd->fdt_blob, path); + if (node < 0) + return 0; + + return fdtdec_get_is_enabled(gd->fdt_blob, node); +} +#endif + int board_late_init(void) { setup_board_eeprom_env(); @@ -715,6 +728,12 @@ int board_late_init(void) board_ti_set_ethaddr(2); #endif

+#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL) + if (device_okay("/ocp/omap_dwc3_1@48880000")) + enable_usb_clocks(0); + if (device_okay("/ocp/omap_dwc3_2@488c0000")) + enable_usb_clocks(1); +#endif return 0; }

On all the EVMs featuring a SOC of the DRA7 family, the USB1 port is used as a device for DFU. This port is managed by the platform code and must not be advertised to the DWC3 DM driver. This will be changed when/if support for the device mode is added to the dwc3-omap driver.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com

---

Changes in v3: None Changes in v2: - Instead of disabling USB1 port in dts files, use *-u-boot.dtsi files

arch/arm/dts/dra7-evm-u-boot.dtsi | 8 ++++++++ arch/arm/dts/dra71-evm-u-boot.dtsi | 9 +++++++++ arch/arm/dts/dra72-evm-revc-u-boot.dtsi | 8 ++++++++ arch/arm/dts/dra72-evm-u-boot.dtsi | 23 +++++++++++++++++++++++ arch/arm/dts/dra76-evm-u-boot.dtsi | 9 +++++++++ 5 files changed, 57 insertions(+) create mode 100644 arch/arm/dts/dra72-evm-u-boot.dtsi

diff --git a/arch/arm/dts/dra7-evm-u-boot.dtsi b/arch/arm/dts/dra7-evm-u-boot.dtsi index 3e7da7c..59b5643 100644 --- a/arch/arm/dts/dra7-evm-u-boot.dtsi +++ b/arch/arm/dts/dra7-evm-u-boot.dtsi @@ -33,3 +33,11 @@ &mmc2_iodelay_hs200_rev20_conf { u-boot,dm-spl; }; + +&usb1 { + status = "disabled"; +}; + +&omap_dwc3_1 { + status = "disabled"; +}; diff --git a/arch/arm/dts/dra71-evm-u-boot.dtsi b/arch/arm/dts/dra71-evm-u-boot.dtsi index e2ab0bb..a61fcfb 100644 --- a/arch/arm/dts/dra71-evm-u-boot.dtsi +++ b/arch/arm/dts/dra71-evm-u-boot.dtsi @@ -45,3 +45,12 @@ &mmc2_iodelay_hs200_rev20_conf { u-boot,dm-spl; }; + +&usb1 { + status = "disabled"; +}; + +&omap_dwc3_1 { + status = "disabled"; +}; + diff --git a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi index e2ab0bb..aeca9b2 100644 --- a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi +++ b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi @@ -45,3 +45,11 @@ &mmc2_iodelay_hs200_rev20_conf { u-boot,dm-spl; }; + +&usb1 { + status = "disabled"; +}; + +&omap_dwc3_1 { + status = "disabled"; +}; diff --git a/arch/arm/dts/dra72-evm-u-boot.dtsi b/arch/arm/dts/dra72-evm-u-boot.dtsi new file mode 100644 index 0000000..ce6e365 --- /dev/null +++ b/arch/arm/dts/dra72-evm-u-boot.dtsi @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "omap5-u-boot.dtsi" + +&pcf_gpio_21{ + u-boot,i2c-offset-len = <0>; +}; + +&pcf_hdmi{ + u-boot,i2c-offset-len = <0>; +}; + +&usb1 { + status = "disabled"; +}; + +&omap_dwc3_1 { + status = "disabled"; +}; diff --git a/arch/arm/dts/dra76-evm-u-boot.dtsi b/arch/arm/dts/dra76-evm-u-boot.dtsi index a5a0694..c719421 100644 --- a/arch/arm/dts/dra76-evm-u-boot.dtsi +++ b/arch/arm/dts/dra76-evm-u-boot.dtsi @@ -25,3 +25,12 @@ &mmc2_iodelay_hs200_conf { u-boot,dm-spl; }; + +&usb1 { + status = "disabled"; +}; + +&omap_dwc3_1 { + status = "disabled"; +}; +

Enable DM_USB for AM57xx based boards.

Signed-off-by: Vignesh R vigneshr@ti.com

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---

Changes in v3: None Changes in v2: - Enable DM_USB in am57xx_evm_defconfig. USB3 (super speed) is supported.

configs/am57xx_evm_defconfig | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 7ed010f..4c0fb8d 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -76,3 +76,8 @@ CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0451 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_DM_USB=y +CONFIG_OMAP_USB2_PHY=y +CONFIG_PIPE3_PHY=y +CONFIG_MISC=y +CONFIG_PHY=y