Add initial clock driver for Allwinner A64.

Implement USB clock enable and disable functions for OHCI, EHCI, OTG and USBPHY gate and clock registers.

Tested-by: Jagan Teki jagan@amarulasolutions.com # BPI-M64 Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/include/asm/arch-sunxi/ccu.h | 47 ++++++++++++++++++++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sunxi/Kconfig | 18 ++++++++ drivers/clk/sunxi/Makefile | 9 ++++ drivers/clk/sunxi/clk_a64.c | 62 +++++++++++++++++++++++++++ drivers/clk/sunxi/clk_sunxi.c | 58 +++++++++++++++++++++++++ 7 files changed, 196 insertions(+) create mode 100644 arch/arm/include/asm/arch-sunxi/ccu.h create mode 100644 drivers/clk/sunxi/Kconfig create mode 100644 drivers/clk/sunxi/Makefile create mode 100644 drivers/clk/sunxi/clk_a64.c create mode 100644 drivers/clk/sunxi/clk_sunxi.c

diff --git a/arch/arm/include/asm/arch-sunxi/ccu.h b/arch/arm/include/asm/arch-sunxi/ccu.h new file mode 100644 index 0000000000..998ab38bf2 --- /dev/null +++ b/arch/arm/include/asm/arch-sunxi/ccu.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#ifndef _ASM_ARCH_CCU_H +#define _ASM_ARCH_CCU_H + +/** + * ccu_clk_map - common clock unit clock map + * + * @off: ccu clock offset + * @bit: ccu clock bit value + * @ccu_clk_set_rate: ccu clock set rate func + */ +struct ccu_clk_map { + u16 off; + u32 bit; + int (*ccu_clk_set_rate)(void *base, u32 bit, ulong rate); +}; + +/** + * struct ccu_desc - common clock unit descriptor + * + * @clks: mapping clocks descriptor + * @num_clks: number of mapped clocks + */ +struct ccu_desc { + struct ccu_clk_map *clks; + unsigned long num_clks; +}; + +/** + * struct sunxi_clk_priv - sunxi clock private structure + * + * @base: base address + * @desc: ccu descriptor + */ +struct sunxi_clk_priv { + void *base; + const struct ccu_desc *desc; +}; + +extern struct clk_ops sunxi_clk_ops; + +#endif /* _ASM_ARCH_CCU_H */ diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a99abed9e9..b4992e9ff1 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -88,6 +88,7 @@ source "drivers/clk/exynos/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/owl/Kconfig" source "drivers/clk/renesas/Kconfig" +source "drivers/clk/sunxi/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/uniphier/Kconfig"

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 034bf44078..f7dc6c6021 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_MESON) += clk_meson.o obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ +obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_MVEBU) += mvebu/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig new file mode 100644 index 0000000000..bf5ecb3801 --- /dev/null +++ b/drivers/clk/sunxi/Kconfig @@ -0,0 +1,18 @@ +config CLK_SUNXI + bool "Clock support for Allwinner SoCs" + depends on CLK && ARCH_SUNXI + default y + help + This enables support for common clock driver API on Allwinner + SoCs. + +if CLK_SUNXI + +config CLK_SUN50I_A64 + bool "Clock driver for Allwinner A64" + default MACH_SUN50I + help + This enables common clock driver support for platforms based + on Allwinner A64 SoC. + +endif # CLK_SUNXI diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile new file mode 100644 index 0000000000..fb20d28333 --- /dev/null +++ b/drivers/clk/sunxi/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2018 Amarula Solutions. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o + +obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c new file mode 100644 index 0000000000..8966472c2d --- /dev/null +++ b/drivers/clk/sunxi/clk_a64.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun50i-a64-ccu.h> + +static struct ccu_clk_map a64_clks[] = { + [CLK_BUS_OTG] = { 0x060, BIT(23), NULL }, + [CLK_BUS_EHCI0] = { 0x060, BIT(24), NULL }, + [CLK_BUS_EHCI1] = { 0x060, BIT(25), NULL }, + [CLK_BUS_OHCI0] = { 0x060, BIT(28), NULL }, + [CLK_BUS_OHCI1] = { 0x060, BIT(29), NULL }, + + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, + [CLK_USB_PHY1] = { 0x0cc, BIT(9), NULL }, + [CLK_USB_HSIC] = { 0x0cc, BIT(10), NULL }, + [CLK_USB_HSIC_12M] = { 0x0cc, BIT(11), NULL }, + [CLK_USB_OHCI0] = { 0x0cc, BIT(16), NULL }, + [CLK_USB_OHCI1] = { 0x0cc, BIT(17), NULL }, +}; + +static const struct ccu_desc sun50i_a64_ccu_desc = { + .clks = a64_clks, + .num_clks = ARRAY_SIZE(a64_clks), +}; + +static int a64_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static const struct udevice_id a64_clk_ids[] = { + { .compatible = "allwinner,sun50i-a64-ccu", + .data = (ulong)&sun50i_a64_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun50i_a64) = { + .name = "sun50i_a64_ccu", + .id = UCLASS_CLK, + .of_match = a64_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = a64_clk_probe, +}; diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c new file mode 100644 index 0000000000..de2784db34 --- /dev/null +++ b/drivers/clk/sunxi/clk_sunxi.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/io.h> +#include <asm/arch/ccu.h> +#include <linux/log2.h> + +static int sunxi_clk_enable(struct clk *clk) +{ + struct sunxi_clk_priv *priv = dev_get_priv(clk->dev); + struct ccu_clk_map *map = &priv->desc->clks[clk->id]; + u32 reg; + + if (!map->off || !map->bit) { + debug("%s (CLK#%ld) unhandled\n", __func__, clk->id); + return 0; + } + + debug("%s(#%ld) off#0x%x, BIT(%d)\n", __func__, + clk->id, map->off, ilog2(map->bit)); + + reg = readl(priv->base + map->off); + writel(reg | map->bit, priv->base + map->off); + + return 0; +} + +static int sunxi_clk_disable(struct clk *clk) +{ + struct sunxi_clk_priv *priv = dev_get_priv(clk->dev); + struct ccu_clk_map *map = &priv->desc->clks[clk->id]; + u32 reg; + + if (!map->off || !map->bit) { + debug("%s (CLK#%ld) unhandled\n", __func__, clk->id); + return 0; + } + + debug("%s(#%ld) off#0x%x, BIT(%d)\n", __func__, + clk->id, map->off, ilog2(map->bit)); + + reg = readl(priv->base + map->off); + writel(reg & ~map->bit, priv->base + map->off); + + return 0; +} + +struct clk_ops sunxi_clk_ops = { + .enable = sunxi_clk_enable, + .disable = sunxi_clk_disable, +};

Missing request ops from respective uclass driver generating "synchronous abort" in Allwinner platform, may be in arm. So return 0 if request ops is not used for those uclass drivers.

Cc: Simon Glass sjg@chromium.org Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/reset/reset-uclass.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c index 3899537635..867dc8d596 100644 --- a/drivers/reset/reset-uclass.c +++ b/drivers/reset/reset-uclass.c @@ -69,6 +69,9 @@ int reset_get_by_index(struct udevice *dev, int index, return ret; }

+ if (!ops->request) + return 0; + ret = ops->request(reset_ctl); if (ret) { debug("ops->request() failed: %d\n", ret);

Add common reset driver for all Allwinner SoC's.

Since CLK and RESET share common DT compatible, it is CLK driver job is to bind the reset driver. So add CLK bind call on respective SoC driver by passing ccu map descriptor so-that reset deassert, deassert operations held based on reset register map defined by CLK driver.

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET since CLK and RESET share common DT compatible and code.

Tested-by: Jagan Teki jagan@amarulasolutions.com # BPI-M64 Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/include/asm/arch-sunxi/ccu.h | 25 ++++++ drivers/clk/sunxi/Kconfig | 1 + drivers/clk/sunxi/clk_a64.c | 22 +++++ drivers/reset/Kconfig | 8 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-sunxi.c | 125 ++++++++++++++++++++++++++ 6 files changed, 182 insertions(+) create mode 100644 drivers/reset/reset-sunxi.c

diff --git a/arch/arm/include/asm/arch-sunxi/ccu.h b/arch/arm/include/asm/arch-sunxi/ccu.h index 998ab38bf2..3e322a7655 100644 --- a/arch/arm/include/asm/arch-sunxi/ccu.h +++ b/arch/arm/include/asm/arch-sunxi/ccu.h @@ -20,15 +20,31 @@ struct ccu_clk_map { int (*ccu_clk_set_rate)(void *base, u32 bit, ulong rate); };

+/** + * ccu_reset_map - common clock unit reset map + * + * @off: ccu reset offset + * @bit: ccu reset bit value + */ +struct ccu_reset_map { + u16 off; + u32 bit; +}; + /** * struct ccu_desc - common clock unit descriptor * * @clks: mapping clocks descriptor * @num_clks: number of mapped clocks + * @resets: mapping resets descriptor + * @num_resets: number of mapped resets */ struct ccu_desc { struct ccu_clk_map *clks; unsigned long num_clks; + + struct ccu_reset_map *resets; + unsigned long num_resets; };

/** @@ -44,4 +60,13 @@ struct sunxi_clk_priv {

extern struct clk_ops sunxi_clk_ops;

+/** + * sunxi_reset_bind() - reset binding + * + * @dev: reset device + * @count: reset count + * @return 0 success, or error value + */ +int sunxi_reset_bind(struct udevice *dev, ulong count); + #endif /* _ASM_ARCH_CCU_H */ diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index bf5ecb3801..041d711e58 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -1,6 +1,7 @@ config CLK_SUNXI bool "Clock support for Allwinner SoCs" depends on CLK && ARCH_SUNXI + select DM_RESET default y help This enables support for common clock driver API on Allwinner diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index 8966472c2d..13b58aa57f 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -10,6 +10,7 @@ #include <errno.h> #include <asm/arch/ccu.h> #include <dt-bindings/clock/sun50i-a64-ccu.h> +#include <dt-bindings/reset/sun50i-a64-ccu.h>

static struct ccu_clk_map a64_clks[] = { [CLK_BUS_OTG] = { 0x060, BIT(23), NULL }, @@ -26,9 +27,24 @@ static struct ccu_clk_map a64_clks[] = { [CLK_USB_OHCI1] = { 0x0cc, BIT(17), NULL }, };

+static struct ccu_reset_map a64_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, + [RST_USB_HSIC] = { 0x0cc, BIT(2) }, + + [RST_BUS_OTG] = { 0x2c0, BIT(23) }, + [RST_BUS_EHCI0] = { 0x2c0, BIT(24) }, + [RST_BUS_EHCI1] = { 0x2c0, BIT(25) }, + [RST_BUS_OHCI0] = { 0x2c0, BIT(28) }, + [RST_BUS_OHCI1] = { 0x2c0, BIT(29) }, +}; + static const struct ccu_desc sun50i_a64_ccu_desc = { .clks = a64_clks, .num_clks = ARRAY_SIZE(a64_clks), + + .resets = a64_resets, + .num_resets = ARRAY_SIZE(a64_resets), };

static int a64_clk_probe(struct udevice *dev) @@ -46,6 +62,11 @@ static int a64_clk_probe(struct udevice *dev) return 0; }

+static int a64_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 50); +} + static const struct udevice_id a64_clk_ids[] = { { .compatible = "allwinner,sun50i-a64-ccu", .data = (ulong)&sun50i_a64_ccu_desc }, @@ -59,4 +80,5 @@ U_BOOT_DRIVER(clk_sun50i_a64) = { .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), .ops = &sunxi_clk_ops, .probe = a64_clk_probe, + .bind = a64_clk_bind, }; diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 33c39b7fb6..bdc06564a0 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -98,4 +98,12 @@ config RESET_SOCFPGA help Support for reset controller on SoCFPGA platform.

+config RESET_SUNXI + bool "RESET support for Allwinner SoCs" + depends on DM_RESET && ARCH_SUNXI + default y + help + This enables support for common reset driver for + Allwinner SoCs. + endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index ad08be4c8c..698d15a0e0 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -15,3 +15,4 @@ obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o obj-$(CONFIG_RESET_MESON) += reset-meson.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o +obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c new file mode 100644 index 0000000000..293297e98c --- /dev/null +++ b/drivers/reset/reset-sunxi.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <reset-uclass.h> +#include <asm/io.h> +#include <dm/lists.h> +#include <linux/log2.h> +#include <asm/arch/ccu.h> + +struct sunxi_reset_priv { + void *base; + ulong count; + const struct ccu_desc *desc; +}; + +static int sunxi_reset_request(struct reset_ctl *reset_ctl) +{ + struct sunxi_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s (RST#%ld)\n", __func__, reset_ctl->id); + + /* check dt-bindings/reset/sun8i-h3-ccu.h for max id */ + if (reset_ctl->id >= priv->count) + return -EINVAL; + + return 0; +} + +static int sunxi_reset_free(struct reset_ctl *reset_ctl) +{ + debug("%s (RST#%ld)\n", __func__, reset_ctl->id); + + return 0; +} + +static int sunxi_reset_assert(struct reset_ctl *reset_ctl) +{ + struct sunxi_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ccu_reset_map *map = &priv->desc->resets[reset_ctl->id]; + u32 reg; + + if (!map->off || !map->bit) { + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return 0; + } + + debug("%s(#%ld) off#0x%x, BIT(%d)\n", __func__, + reset_ctl->id, map->off, ilog2(map->bit)); + + reg = readl(priv->base + map->off); + writel(reg & ~map->bit, priv->base + map->off); + + return 0; +} + +static int sunxi_reset_deassert(struct reset_ctl *reset_ctl) +{ + struct sunxi_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ccu_reset_map *map = &priv->desc->resets[reset_ctl->id]; + u32 reg; + + if (!map->off || !map->bit) { + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return 0; + } + + debug("%s(#%ld) off#0x%x, BIT(%d)\n", __func__, + reset_ctl->id, map->off, ilog2(map->bit)); + + reg = readl(priv->base + map->off); + writel(reg | map->bit, priv->base + map->off); + + return 0; +} + +struct reset_ops sunxi_reset_ops = { + .request = sunxi_reset_request, + .free = sunxi_reset_free, + .rst_assert = sunxi_reset_assert, + .rst_deassert = sunxi_reset_deassert, +}; + +static int sunxi_reset_probe(struct udevice *dev) +{ + struct sunxi_reset_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + + return 0; +} + +int sunxi_reset_bind(struct udevice *dev, ulong count) +{ + struct udevice *rst_dev; + struct sunxi_reset_priv *priv; + int ret; + + ret = device_bind_driver_to_node(dev, "sunxi_reset", "reset", + dev_ofnode(dev), &rst_dev); + if (ret) { + debug("Warning: failed to bind sunxi_reset driver (ret=%d)\n", + ret); + return ret; + } + priv = malloc(sizeof(struct sunxi_reset_priv)); + priv->count = count; + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + rst_dev->priv = priv; + + return 0; +} + +U_BOOT_DRIVER(reset_sun8i_h3) = { + .name = "sunxi_reset", + .id = UCLASS_RESET, + .ops = &sunxi_reset_ops, + .probe = sunxi_reset_probe, + .priv_auto_alloc_size = sizeof(struct sunxi_reset_priv), +};

Add initial clock driver for Allwinner H3/H5.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for H3/H5, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset_map descriptor for H3/H5, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by: Jagan Teki jagan@amarulasolutions.com #BPI-M2+, OPI-PC2 Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 +++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_h3.c | 97 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) create mode 100644 drivers/clk/sunxi/clk_h3.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index 041d711e58..c3713bbac2 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -9,6 +9,13 @@ config CLK_SUNXI

if CLK_SUNXI

+config CLK_SUN8I_H3 + bool "Clock driver for Allwinner H3/H5" + default MACH_SUNXI_H3_H5 + help + This enables common clock driver support for platforms based + on Allwinner H3/H5 SoC. + config CLK_SUN50I_A64 bool "Clock driver for Allwinner A64" default MACH_SUN50I diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index fb20d28333..dec49f27a1 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -6,4 +6,5 @@

obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o

+obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c new file mode 100644 index 0000000000..cb2f22810a --- /dev/null +++ b/drivers/clk/sunxi/clk_h3.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-h3-ccu.h> +#include <dt-bindings/reset/sun8i-h3-ccu.h> + +static struct ccu_clk_map h3_clks[] = { + [CLK_BUS_OTG] = { 0x060, BIT(23), NULL }, + [CLK_BUS_EHCI0] = { 0x060, BIT(24), NULL }, + [CLK_BUS_EHCI1] = { 0x060, BIT(25), NULL }, + [CLK_BUS_EHCI2] = { 0x060, BIT(26), NULL }, + [CLK_BUS_EHCI3] = { 0x060, BIT(27), NULL }, + [CLK_BUS_OHCI0] = { 0x060, BIT(28), NULL }, + [CLK_BUS_OHCI1] = { 0x060, BIT(29), NULL }, + [CLK_BUS_OHCI2] = { 0x060, BIT(30), NULL }, + [CLK_BUS_OHCI3] = { 0x060, BIT(31), NULL }, + + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, + [CLK_USB_PHY1] = { 0x0cc, BIT(9), NULL }, + [CLK_USB_PHY2] = { 0x0cc, BIT(10), NULL }, + [CLK_USB_PHY3] = { 0x0cc, BIT(11), NULL }, + [CLK_USB_OHCI0] = { 0x0cc, BIT(16), NULL }, + [CLK_USB_OHCI1] = { 0x0cc, BIT(17), NULL }, + [CLK_USB_OHCI2] = { 0x0cc, BIT(18), NULL }, + [CLK_USB_OHCI3] = { 0x0cc, BIT(19), NULL }, +}; + +static struct ccu_reset_map h3_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, + [RST_USB_PHY2] = { 0x0cc, BIT(2) }, + [RST_USB_PHY3] = { 0x0cc, BIT(3) }, + + [RST_BUS_OTG] = { 0x2c0, BIT(23) }, + [RST_BUS_EHCI0] = { 0x2c0, BIT(24) }, + [RST_BUS_EHCI1] = { 0x2c0, BIT(25) }, + [RST_BUS_EHCI2] = { 0x2c0, BIT(26) }, + [RST_BUS_EHCI3] = { 0x2c0, BIT(27) }, + [RST_BUS_OHCI0] = { 0x2c0, BIT(28) }, + [RST_BUS_OHCI1] = { 0x2c0, BIT(29) }, + [RST_BUS_OHCI2] = { 0x2c0, BIT(30) }, + [RST_BUS_OHCI3] = { 0x2c0, BIT(31) }, +}; + +static const struct ccu_desc sun8i_h3_ccu_desc = { + .clks = h3_clks, + .num_clks = ARRAY_SIZE(h3_clks), + + .resets = h3_resets, + .num_resets = ARRAY_SIZE(h3_resets), +}; + +static int h3_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int h3_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 53); +} + +static const struct udevice_id h3_clk_ids[] = { + { .compatible = "allwinner,sun8i-h3-ccu", + .data = (ulong)&sun8i_h3_ccu_desc }, + { .compatible = "allwinner,sun50i-h5-ccu", + .data = (ulong)&sun8i_h3_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun8i_h3) = { + .name = "sun8i_h3_ccu", + .id = UCLASS_CLK, + .of_match = h3_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = h3_clk_probe, + .bind = h3_clk_bind, +};

Add initial clock driver for Allwinner A10/A20.

- Implement USB ahb and USB clocks via ccu_clk_map descriptor for A10/A20, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB resets via ccu_reset_map descriptor for A10/A20, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by: Jagan Teki jagan@amarulasolutions.com # A20-OLinuXino-Lime2 Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 ++++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_a10.c | 77 +++++++++++++++++++++++++++++++++++++ 3 files changed, 85 insertions(+) create mode 100644 drivers/clk/sunxi/clk_a10.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index c3713bbac2..fbbf94ef55 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -9,6 +9,13 @@ config CLK_SUNXI

if CLK_SUNXI

+config CLK_SUN4I_A10 + bool "Clock driver for Allwinner A10/A20" + default MACH_SUN4I || MACH_SUN7I + help + This enables common clock driver support for platforms based + on Allwinner A10/A20 SoC. + config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index dec49f27a1..bba830922f 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -6,5 +6,6 @@

obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o

+obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c new file mode 100644 index 0000000000..b40af5c5a3 --- /dev/null +++ b/drivers/clk/sunxi/clk_a10.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun4i-a10-ccu.h> +#include <dt-bindings/reset/sun4i-a10-ccu.h> + +static struct ccu_clk_map a10_clks[] = { + [CLK_AHB_OTG] = { 0x060, BIT(0), NULL }, + [CLK_AHB_EHCI0] = { 0x060, BIT(1), NULL }, + [CLK_AHB_OHCI0] = { 0x060, BIT(2), NULL }, + [CLK_AHB_EHCI1] = { 0x060, BIT(3), NULL }, + [CLK_AHB_OHCI1] = { 0x060, BIT(4), NULL }, + + [CLK_USB_OHCI0] = { 0x0cc, BIT(6), NULL }, + [CLK_USB_OHCI1] = { 0x0cc, BIT(7), NULL }, + [CLK_USB_PHY] = { 0x0cc, BIT(8), NULL }, +}; + +static struct ccu_reset_map a10_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, + [RST_USB_PHY2] = { 0x0cc, BIT(2) }, +}; + +static const struct ccu_desc sun4i_a10_ccu_desc = { + .clks = a10_clks, + .num_clks = ARRAY_SIZE(a10_clks), + + .resets = a10_resets, + .num_resets = ARRAY_SIZE(a10_resets), +}; + +static int a10_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int a10_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 22); +} + +static const struct udevice_id a10_clk_ids[] = { + { .compatible = "allwinner,sun4i-a10-ccu", + .data = (ulong)&sun4i_a10_ccu_desc }, + { .compatible = "allwinner,sun7i-a20-ccu", + .data = (ulong)&sun4i_a10_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun4i_a10) = { + .name = "sun4i_a10_ccu", + .id = UCLASS_CLK, + .of_match = a10_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = a10_clk_probe, + .bind = a10_clk_bind, +};

Add initial clock driver for Allwinner A10s/A13.

- Implement USB ahb and USB clocks via ccu_clk_map descriptor for A10s/A13, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB resets via ccu_reset_map descriptor for A10s/A13, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 ++++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_a10s.c | 74 ++++++++++++++++++++++++++++++++++++ 3 files changed, 82 insertions(+) create mode 100644 drivers/clk/sunxi/clk_a10s.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index fbbf94ef55..b228c2fa3a 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -16,6 +16,13 @@ config CLK_SUN4I_A10 This enables common clock driver support for platforms based on Allwinner A10/A20 SoC.

+config CLK_SUN5I_A10S + bool "Clock driver for Allwinner A10s/A13" + default MACH_SUN5I + help + This enables common clock driver support for platforms based + on Allwinner A10s/A13 SoC. + config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index bba830922f..466d4b79d6 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -7,5 +7,6 @@ obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o

obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o +obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c new file mode 100644 index 0000000000..6a0cf18cc3 --- /dev/null +++ b/drivers/clk/sunxi/clk_a10s.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun5i-ccu.h> +#include <dt-bindings/reset/sun5i-ccu.h> + +static struct ccu_clk_map a10s_clks[] = { + [CLK_AHB_OTG] = { 0x060, BIT(0), NULL }, + [CLK_AHB_EHCI] = { 0x060, BIT(1), NULL }, + [CLK_AHB_OHCI] = { 0x060, BIT(2), NULL }, + + [CLK_USB_OHCI] = { 0x0cc, BIT(6), NULL }, + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, + [CLK_USB_PHY1] = { 0x0cc, BIT(9), NULL }, +}; + +static struct ccu_reset_map a10s_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, +}; + +static const struct ccu_desc sun5i_a10s_ccu_desc = { + .clks = a10s_clks, + .num_clks = ARRAY_SIZE(a10s_clks), + + .resets = a10s_resets, + .num_resets = ARRAY_SIZE(a10s_resets), +}; + +static int a10s_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int a10s_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 10); +} + +static const struct udevice_id a10s_clk_ids[] = { + { .compatible = "allwinner,sun5i-a10s-ccu", + .data = (ulong)&sun5i_a10s_ccu_desc }, + { .compatible = "allwinner,sun5i-a13-ccu", + .data = (ulong)&sun5i_a10s_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun5i_a10s) = { + .name = "sun5i_a10s_ccu", + .id = UCLASS_CLK, + .of_match = a10s_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = a10s_clk_probe, + .bind = a10s_clk_bind, +};

Add initial clock driver for Allwinner A31.

- Implement USB ahb1 and USB clocks via ccu_clk_map descriptor for A31, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB ahb1 and USB resets via ccu_reset_map descriptor for A31, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 +++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_a31.c | 86 +++++++++++++++++++++++++++++++++++++ 3 files changed, 94 insertions(+) create mode 100644 drivers/clk/sunxi/clk_a31.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index b228c2fa3a..535b0dc02c 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -23,6 +23,13 @@ config CLK_SUN5I_A10S This enables common clock driver support for platforms based on Allwinner A10s/A13 SoC.

+config CLK_SUN6I_A31 + bool "Clock driver for Allwinner A31/A31s" + default MACH_SUN6I + help + This enables common clock driver support for platforms based + on Allwinner A31/A31s SoC. + config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 466d4b79d6..3cf0071b0c 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -8,5 +8,6 @@ obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o

obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o +obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c new file mode 100644 index 0000000000..9a9d87896f --- /dev/null +++ b/drivers/clk/sunxi/clk_a31.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions B.V. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun6i-a31-ccu.h> +#include <dt-bindings/reset/sun6i-a31-ccu.h> + +static struct ccu_clk_map a31_clks[] = { + [CLK_AHB1_OTG] = { 0x060, BIT(24), NULL }, + [CLK_AHB1_EHCI0] = { 0x060, BIT(26), NULL }, + [CLK_AHB1_EHCI1] = { 0x060, BIT(27), NULL }, + [CLK_AHB1_OHCI0] = { 0x060, BIT(29), NULL }, + [CLK_AHB1_OHCI1] = { 0x060, BIT(30), NULL }, + [CLK_AHB1_OHCI2] = { 0x060, BIT(31), NULL }, + + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, + [CLK_USB_PHY1] = { 0x0cc, BIT(9), NULL }, + [CLK_USB_PHY2] = { 0x0cc, BIT(10), NULL }, + [CLK_USB_OHCI0] = { 0x0cc, BIT(16), NULL }, + [CLK_USB_OHCI1] = { 0x0cc, BIT(17), NULL }, + [CLK_USB_OHCI2] = { 0x0cc, BIT(18), NULL }, +}; + +static struct ccu_reset_map a31_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, + [RST_USB_PHY2] = { 0x0cc, BIT(2) }, + + [RST_AHB1_OTG] = { 0x2c0, BIT(24) }, + [RST_AHB1_EHCI0] = { 0x2c0, BIT(26) }, + [RST_AHB1_EHCI1] = { 0x2c0, BIT(27) }, + [RST_AHB1_OHCI0] = { 0x2c0, BIT(29) }, + [RST_AHB1_OHCI1] = { 0x2c0, BIT(30) }, + [RST_AHB1_OHCI2] = { 0x2c0, BIT(31) }, +}; + +static const struct ccu_desc sun6i_a31_ccu_desc = { + .clks = a31_clks, + .num_clks = ARRAY_SIZE(a31_clks), + + .resets = a31_resets, + .num_resets = ARRAY_SIZE(a31_resets), +}; + +static int a31_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int a31_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 56); +} + +static const struct udevice_id a31_clk_ids[] = { + { .compatible = "allwinner,sun6i-a31-ccu", + .data = (ulong)&sun6i_a31_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun6i_a31) = { + .name = "sun6i_a31_ccu", + .id = UCLASS_CLK, + .of_match = a31_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = a31_clk_probe, + .bind = a31_clk_bind, +};

Add initial clock driver for Allwinner A23.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for A23, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset_map descriptor for A23, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 ++++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_a23.c | 79 +++++++++++++++++++++++++++++++++++++ 3 files changed, 87 insertions(+) create mode 100644 drivers/clk/sunxi/clk_a23.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index 535b0dc02c..54600e8e1f 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -30,6 +30,13 @@ config CLK_SUN6I_A31 This enables common clock driver support for platforms based on Allwinner A31/A31s SoC.

+config CLK_SUN8I_A23 + bool "Clock driver for Allwinner A23" + default MACH_SUN8I_A23 + help + This enables common clock driver support for platforms based + on Allwinner A23 SoC. + config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 3cf0071b0c..6924897036 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -9,5 +9,6 @@ obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o +obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c new file mode 100644 index 0000000000..165dea8cb2 --- /dev/null +++ b/drivers/clk/sunxi/clk_a23.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions B.V. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-a23-a33-ccu.h> +#include <dt-bindings/reset/sun8i-a23-a33-ccu.h> + +static struct ccu_clk_map a23_clks[] = { + [CLK_BUS_OTG] = { 0x060, BIT(24), NULL }, + [CLK_BUS_EHCI] = { 0x060, BIT(26), NULL }, + [CLK_BUS_OHCI] = { 0x060, BIT(29), NULL }, + + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, + [CLK_USB_PHY1] = { 0x0cc, BIT(9), NULL }, + [CLK_USB_HSIC] = { 0x0cc, BIT(10), NULL }, + [CLK_USB_HSIC_12M] = { 0x0cc, BIT(11), NULL }, + [CLK_USB_OHCI] = { 0x0cc, BIT(16), NULL }, +}; + +static struct ccu_reset_map a23_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, + [RST_USB_HSIC] = { 0x0cc, BIT(2) }, + + [RST_BUS_OTG] = { 0x2c0, BIT(24) }, + [RST_BUS_EHCI] = { 0x2c0, BIT(26) }, + [RST_BUS_OHCI] = { 0x2c0, BIT(29) }, +}; + +static const struct ccu_desc sun8i_a23_ccu_desc = { + .clks = a23_clks, + .num_clks = ARRAY_SIZE(a23_clks), + + .resets = a23_resets, + .num_resets = ARRAY_SIZE(a23_resets), +}; + +static int a23_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int a23_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 39); +} + +static const struct udevice_id a23_clk_ids[] = { + { .compatible = "allwinner,sun8i-a23-ccu", + .data = (ulong)&sun8i_a23_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun8i_a23) = { + .name = "sun8i_a23_ccu", + .id = UCLASS_CLK, + .of_match = a23_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = a23_clk_probe, + .bind = a23_clk_bind, +};

A33 has separate clock driver in Linux because of few clock differences wrt to A23 like audio etc,. these may not useful for U-Boot so added a33 ccu compatible on existing a23 clock driver.

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 6 +++--- drivers/clk/sunxi/clk_a23.c | 2 ++ 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index 54600e8e1f..38ff99d345 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -31,11 +31,11 @@ config CLK_SUN6I_A31 on Allwinner A31/A31s SoC.

config CLK_SUN8I_A23 - bool "Clock driver for Allwinner A23" - default MACH_SUN8I_A23 + bool "Clock driver for Allwinner A23/A33" + default MACH_SUN8I_A23 || MACH_SUN8I_A33 help This enables common clock driver support for platforms based - on Allwinner A23 SoC. + on Allwinner A23/A33 SoC.

config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c index 165dea8cb2..4b30fe608c 100644 --- a/drivers/clk/sunxi/clk_a23.c +++ b/drivers/clk/sunxi/clk_a23.c @@ -65,6 +65,8 @@ static int a23_clk_bind(struct udevice *dev) static const struct udevice_id a23_clk_ids[] = { { .compatible = "allwinner,sun8i-a23-ccu", .data = (ulong)&sun8i_a23_ccu_desc }, + { .compatible = "allwinner,sun8i-a33-ccu", + .data = (ulong)&sun8i_a23_ccu_desc }, { } };

Add initial clock driver for Allwinner A83T.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for A83T, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset_map descriptor for A83T, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by: Jagan Teki jagan@amarulasolutions.com # BPI-M3 Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 ++++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_a83t.c | 81 ++++++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+) create mode 100644 drivers/clk/sunxi/clk_a83t.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index 38ff99d345..90af70d171 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -37,6 +37,13 @@ config CLK_SUN8I_A23 This enables common clock driver support for platforms based on Allwinner A23/A33 SoC.

+config CLK_SUN8I_A83T + bool "Clock driver for Allwinner A83T" + default MACH_SUN8I_A83T + help + This enables common clock driver support for platforms based + on Allwinner A83T SoC. + config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 6924897036..4a254c8671 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -10,5 +10,6 @@ obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o +obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c new file mode 100644 index 0000000000..9f1de1e405 --- /dev/null +++ b/drivers/clk/sunxi/clk_a83t.c @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-a83t-ccu.h> +#include <dt-bindings/reset/sun8i-a83t-ccu.h> + +static struct ccu_clk_map a83t_clks[] = { + [CLK_BUS_OTG] = { 0x060, BIT(24), NULL }, + [CLK_BUS_EHCI0] = { 0x060, BIT(26), NULL }, + [CLK_BUS_EHCI1] = { 0x060, BIT(27), NULL }, + [CLK_BUS_OHCI0] = { 0x060, BIT(29), NULL }, + + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, + [CLK_USB_PHY1] = { 0x0cc, BIT(9), NULL }, + [CLK_USB_HSIC] = { 0x0cc, BIT(10), NULL }, + [CLK_USB_HSIC_12M] = { 0x0cc, BIT(11), NULL }, + [CLK_USB_OHCI0] = { 0x0cc, BIT(16), NULL }, +}; + +static struct ccu_reset_map a83t_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, + [RST_USB_HSIC] = { 0x0cc, BIT(2) }, + + [RST_BUS_OTG] = { 0x2c0, BIT(24) }, + [RST_BUS_EHCI0] = { 0x2c0, BIT(26) }, + [RST_BUS_EHCI1] = { 0x2c0, BIT(27) }, + [RST_BUS_OHCI0] = { 0x2c0, BIT(29) }, +}; + +static const struct ccu_desc sun8i_a83t_ccu_desc = { + .clks = a83t_clks, + .num_clks = ARRAY_SIZE(a83t_clks), + + .resets = a83t_resets, + .num_resets = ARRAY_SIZE(a83t_resets), +}; + +static int a83t_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int a83t_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 44); +} + +static const struct udevice_id a83t_clk_ids[] = { + { .compatible = "allwinner,sun8i-a83t-ccu", + .data = (ulong)&sun8i_a83t_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun8i_a83t) = { + .name = "sun8i_a83t_ccu", + .id = UCLASS_CLK, + .of_match = a83t_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = a83t_clk_probe, + .bind = a83t_clk_bind, +};

Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for R40, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset_map descriptor for R40, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Tested-by: Jagan Teki jagan@amarulasolutions.com # BPI-M2U, BPI-M2B Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 +++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_r40.c | 88 +++++++++++++++++++++++++++++++++++++ 3 files changed, 96 insertions(+) create mode 100644 drivers/clk/sunxi/clk_r40.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index 90af70d171..c45a4ba378 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -44,6 +44,13 @@ config CLK_SUN8I_A83T This enables common clock driver support for platforms based on Allwinner A83T SoC.

+config CLK_SUN8I_R40 + bool "Clock driver for Allwinner R40" + default MACH_SUN8I_R40 + help + This enables common clock driver support for platforms based + on Allwinner R40 SoC. + config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 4a254c8671..61f8b87396 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -11,5 +11,6 @@ obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o +obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c new file mode 100644 index 0000000000..a91fd8bc69 --- /dev/null +++ b/drivers/clk/sunxi/clk_r40.c @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-r40-ccu.h> +#include <dt-bindings/reset/sun8i-r40-ccu.h> + +static struct ccu_clk_map r40_clks[] = { + [CLK_BUS_OTG] = { 0x060, BIT(25), NULL }, + [CLK_BUS_EHCI0] = { 0x060, BIT(26), NULL }, + [CLK_BUS_EHCI1] = { 0x060, BIT(27), NULL }, + [CLK_BUS_EHCI2] = { 0x060, BIT(28), NULL }, + [CLK_BUS_OHCI0] = { 0x060, BIT(29), NULL }, + [CLK_BUS_OHCI1] = { 0x060, BIT(30), NULL }, + [CLK_BUS_OHCI2] = { 0x060, BIT(31), NULL }, + + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, + [CLK_USB_PHY1] = { 0x0cc, BIT(9), NULL }, + [CLK_USB_PHY2] = { 0x0cc, BIT(10), NULL }, + [CLK_USB_OHCI0] = { 0x0cc, BIT(16), NULL }, + [CLK_USB_OHCI1] = { 0x0cc, BIT(17), NULL }, + [CLK_USB_OHCI2] = { 0x0cc, BIT(18), NULL }, +}; + +static struct ccu_reset_map r40_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + [RST_USB_PHY1] = { 0x0cc, BIT(1) }, + [RST_USB_PHY2] = { 0x0cc, BIT(2) }, + + [RST_BUS_OTG] = { 0x2c0, BIT(25) }, + [RST_BUS_EHCI0] = { 0x2c0, BIT(26) }, + [RST_BUS_EHCI1] = { 0x2c0, BIT(27) }, + [RST_BUS_EHCI2] = { 0x2c0, BIT(28) }, + [RST_BUS_OHCI0] = { 0x2c0, BIT(29) }, + [RST_BUS_OHCI1] = { 0x2c0, BIT(30) }, + [RST_BUS_OHCI2] = { 0x2c0, BIT(31) }, +}; + +static const struct ccu_desc sun8i_r40_ccu_desc = { + .clks = r40_clks, + .num_clks = ARRAY_SIZE(r40_clks), + + .resets = r40_resets, + .num_resets = ARRAY_SIZE(r40_resets), +}; + +static int r40_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int r40_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 80); +} + +static const struct udevice_id r40_clk_ids[] = { + { .compatible = "allwinner,sun8i-r40-ccu", + .data = (ulong)&sun8i_r40_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun8i_r40) = { + .name = "sun8i_r40_ccu", + .id = UCLASS_CLK, + .of_match = r40_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = r40_clk_probe, + .bind = r40_clk_bind, +};

Add initial clock driver for Allwinner V3S.

- Implement USB bus and USB clocks via ccu_clk_map descriptor for V3S, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset_map descriptor for V3S, so it can accessed in common reset deassert and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/clk/sunxi/Kconfig | 7 ++++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_v3s.c | 69 +++++++++++++++++++++++++++++++++++++ 3 files changed, 77 insertions(+) create mode 100644 drivers/clk/sunxi/clk_v3s.c

diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig index c45a4ba378..a6f84e9e56 100644 --- a/drivers/clk/sunxi/Kconfig +++ b/drivers/clk/sunxi/Kconfig @@ -51,6 +51,13 @@ config CLK_SUN8I_R40 This enables common clock driver support for platforms based on Allwinner R40 SoC.

+config CLK_SUN8I_V3S + bool "Clock driver for Allwinner V3S" + default MACH_SUN8I_V3S + help + This enables common clock driver support for platforms based + on Allwinner V3S SoC. + config CLK_SUN8I_H3 bool "Clock driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 61f8b87396..fbd43527a6 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -12,5 +12,6 @@ obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o +obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c new file mode 100644 index 0000000000..fce1ab78bd --- /dev/null +++ b/drivers/clk/sunxi/clk_v3s.c @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-v3s-ccu.h> +#include <dt-bindings/reset/sun8i-v3s-ccu.h> + +static struct ccu_clk_map v3s_clks[] = { + [CLK_BUS_OTG] = { 0x060, BIT(24), NULL }, + + [CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL }, +}; + +static struct ccu_reset_map v3s_resets[] = { + [RST_USB_PHY0] = { 0x0cc, BIT(0) }, + + [RST_BUS_OTG] = { 0x2c0, BIT(24) }, +}; + +static const struct ccu_desc sun8i_v3s_ccu_desc = { + .clks = v3s_clks, + .num_clks = ARRAY_SIZE(v3s_clks), + + .resets = v3s_resets, + .num_resets = ARRAY_SIZE(v3s_resets), +}; + +static int v3s_clk_probe(struct udevice *dev) +{ + struct sunxi_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} + +static int v3s_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, 53); +} + +static const struct udevice_id v3s_clk_ids[] = { + { .compatible = "allwinner,sun8i-v3s-ccu", + .data = (ulong)&sun8i_v3s_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun8i_v3s) = { + .name = "sun8i_v3s_ccu", + .id = UCLASS_CLK, + .of_match = v3s_clk_ids, + .priv_auto_alloc_size = sizeof(struct sunxi_clk_priv), + .ops = &sunxi_clk_ops, + .probe = v3s_clk_probe, + .bind = v3s_clk_bind, +};

CLK and DM_RESET drivers are now available for most of the Allwinner platforms, so enable in mach-sunxi/Kconfig

Enabling CLK will select DM_RESET by default.

Tested-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/mach-sunxi/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 686f38fec4..b9575c6b92 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -132,6 +132,7 @@ endif

config MACH_SUNXI_H3_H5 bool + select CLK select DM_I2C select PHY_SUN4I_USB select SUNXI_DE2 @@ -147,6 +148,7 @@ choice config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7A + select CLK select ARM_CORTEX_CPU_IS_UP select DM_MMC if MMC select DM_SCSI if SCSI @@ -158,6 +160,7 @@ config MACH_SUN4I config MACH_SUN5I bool "sun5i (Allwinner A13)" select CPU_V7A + select CLK select ARM_CORTEX_CPU_IS_UP select DRAM_SUN4I select PHY_SUN4I_USB @@ -171,6 +174,7 @@ config MACH_SUN6I select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI + select CLK select DRAM_SUN6I select PHY_SUN4I_USB select SUN6I_P2WI @@ -185,6 +189,7 @@ config MACH_SUN7I select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI + select CLK select DRAM_SUN4I select PHY_SUN4I_USB select SUNXI_GEN_SUN4I @@ -197,6 +202,7 @@ config MACH_SUN8I_A23 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI + select CLK select DRAM_SUN8I_A23 select PHY_SUN4I_USB select SUNXI_GEN_SUN6I @@ -210,6 +216,7 @@ config MACH_SUN8I_A33 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI + select CLK select DRAM_SUN8I_A33 select PHY_SUN4I_USB select SUNXI_GEN_SUN6I @@ -220,6 +227,7 @@ config MACH_SUN8I_A33 config MACH_SUN8I_A83T bool "sun8i (Allwinner A83T)" select CPU_V7A + select CLK select DRAM_SUN8I_A83T select PHY_SUN4I_USB select SUNXI_GEN_SUN6I @@ -231,6 +239,7 @@ config MACH_SUN8I_H3 select CPU_V7A select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select CLK select ARCH_SUPPORT_PSCI select MACH_SUNXI_H3_H5 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -241,6 +250,7 @@ config MACH_SUN8I_R40 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI + select CLK select SUNXI_GEN_SUN6I select SUPPORT_SPL select SUNXI_DRAM_DW @@ -252,6 +262,7 @@ config MACH_SUN8I_V3S select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI + select CLK select SUNXI_GEN_SUN6I select SUNXI_DRAM_DW select SUNXI_DRAM_DW_16BIT @@ -270,6 +281,7 @@ config MACH_SUN9I config MACH_SUN50I bool "sun50i (Allwinner A64)" select ARM64 + select CLK select DM_I2C select PHY_SUN4I_USB select SUNXI_DE2

Once of key blocker for using USB Generic host controller drivers in Allwinner are CLK and RESET drivers, now these available for USB usage. So switch to use EHCI and OHCI Generic controllers.

Enabling USB is wisely a board choise, so Enable USB_OHCI_HCD where it already have USB_EHCI_HCD

Tested-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/A10-OLinuXino-Lime_defconfig | 1 + configs/A10s-OLinuXino-M_defconfig | 1 + configs/A13-OLinuXinoM_defconfig | 1 + configs/A13-OLinuXino_defconfig | 1 + configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 + configs/A20-OLinuXino-Lime2_defconfig | 1 + configs/A20-OLinuXino-Lime_defconfig | 1 + configs/A20-Olimex-SOM204-EVB_defconfig | 2 ++ configs/Auxtek-T003_defconfig | 1 + configs/Auxtek-T004_defconfig | 1 + configs/Bananapi_defconfig | 1 + configs/Bananapi_m2m_defconfig | 1 + configs/Bananapro_defconfig | 1 + configs/CHIP_defconfig | 1 + configs/CHIP_pro_defconfig | 1 + configs/CSQ_CS908_defconfig | 1 + configs/Colombus_defconfig | 1 + configs/Cubieboard2_defconfig | 1 + configs/Cubieboard_defconfig | 1 + configs/Cubietruck_plus_defconfig | 1 + configs/Hummingbird_A31_defconfig | 1 + configs/Itead_Ibox_A20_defconfig | 1 + configs/Linksprite_pcDuino3_Nano_defconfig | 1 + configs/Linksprite_pcDuino3_defconfig | 1 + configs/Linksprite_pcDuino_defconfig | 1 + configs/MK808C_defconfig | 1 + configs/Marsboard_A10_defconfig | 1 + configs/Mele_A1000G_quad_defconfig | 1 + configs/Mele_A1000_defconfig | 1 + configs/Mele_I7_defconfig | 1 + configs/Mele_M3_defconfig | 1 + configs/Mele_M5_defconfig | 1 + configs/Mele_M9_defconfig | 1 + configs/Mini-X_defconfig | 1 + configs/Orangepi_defconfig | 1 + configs/Orangepi_mini_defconfig | 1 + configs/Sinlinx_SinA31s_defconfig | 1 + configs/Sinlinx_SinA33_defconfig | 1 + configs/Sinovoip_BPI_M2_Plus_defconfig | 1 + configs/Sinovoip_BPI_M2_defconfig | 1 + configs/Sinovoip_BPI_M3_defconfig | 1 + configs/Wexler_TAB7200_defconfig | 1 + configs/Wobo_i5_defconfig | 1 + configs/a64-olinuxino_defconfig | 1 + configs/ba10_tv_box_defconfig | 1 + configs/bananapi_m1_plus_defconfig | 1 + configs/bananapi_m64_defconfig | 1 + configs/ga10h_v1_1_defconfig | 1 + configs/h8_homlet_v2_defconfig | 1 + configs/i12-tvbox_defconfig | 1 + configs/icnova-a20-swac_defconfig | 1 + configs/inet1_defconfig | 1 + configs/inet_q972_defconfig | 1 + configs/jesurun_q5_defconfig | 1 + configs/libretech_all_h3_cc_h2_plus_defconfig | 1 + configs/libretech_all_h3_cc_h3_defconfig | 1 + configs/libretech_all_h3_cc_h5_defconfig | 1 + configs/mixtile_loftq_defconfig | 1 + configs/mk802_a10s_defconfig | 1 + configs/mk802_defconfig | 1 + configs/mk802ii_defconfig | 1 + configs/nanopi_a64_defconfig | 1 + configs/nanopi_m1_defconfig | 1 + configs/nanopi_m1_plus_defconfig | 1 + configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_air_defconfig | 1 + configs/nanopi_neo_defconfig | 1 + configs/nanopi_neo_plus2_defconfig | 1 + configs/orangepi_2_defconfig | 1 + configs/orangepi_lite_defconfig | 1 + configs/orangepi_one_defconfig | 1 + configs/orangepi_pc2_defconfig | 1 + configs/orangepi_pc_defconfig | 1 + configs/orangepi_pc_plus_defconfig | 1 + configs/orangepi_plus2e_defconfig | 1 + configs/orangepi_plus_defconfig | 1 + configs/orangepi_prime_defconfig | 1 + configs/orangepi_r1_defconfig | 1 + configs/orangepi_win_defconfig | 1 + configs/orangepi_zero_defconfig | 1 + configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + configs/parrot_r16_defconfig | 1 + configs/pine64_plus_defconfig | 1 + configs/r7-tv-dongle_defconfig | 1 + configs/sopine_baseboard_defconfig | 1 + configs/sun8i_a23_evb_defconfig | 1 + configs/sunxi_Gemei_G9_defconfig | 1 + configs/tbs_a711_defconfig | 1 + drivers/usb/host/Kconfig | 2 ++ include/configs/sun4i.h | 4 ---- include/configs/sun50i.h | 5 ----- include/configs/sun5i.h | 4 ---- include/configs/sun6i.h | 4 ---- include/configs/sun7i.h | 4 ---- include/configs/sun8i.h | 4 ---- include/configs/sunxi-common.h | 1 - 97 files changed, 92 insertions(+), 26 deletions(-)

diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 3d56756114..74545b26e2 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -22,5 +22,6 @@ CONFIG_SUN4I_EMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index ab576ba99e..f6b03d2424 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -18,5 +18,6 @@ CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_AXP152_POWER=y CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 04d588c0ff..6f5b335bd5 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -19,5 +19,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUNXI_NO_PMIC=y CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index b02fe5bc53..fbe2151848 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -26,6 +26,7 @@ CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index dfbf311093..5c55b6f174 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -29,6 +29,7 @@ CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 632482a8da..26b1b615e4 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -28,6 +28,7 @@ CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index dd6febfe52..abfb912059 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -21,5 +21,6 @@ CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index fd4629e3db..e73be2a5f5 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_USB_OHCI_HCD=y CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN7I=y @@ -29,6 +30,7 @@ CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index 8877d8acfa..a650298214 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_AXP152_POWER=y CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 3b32240337..0a8eb7a473 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -13,5 +13,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_AXP152_POWER=y CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 3b7c56cfee..4109075250 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -21,5 +21,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index 71e21ac1cb..71e0e217d6 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -15,6 +15,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_FUNCTION_MASS_STORAGE=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index ca2bd8c024..fb71756206 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -24,5 +24,6 @@ CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO4_VOLT=2500 CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index b674b6cc74..e3cb48fe5a 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -17,6 +17,7 @@ CONFIG_DFU_RAM=y CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index ae3ca4d14f..84c5bdd1f2 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_NAND_OOBSIZE=0x100 CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index a739806687..875343d097 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -16,6 +16,7 @@ CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_AXP_DLDO1_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 18f2f2f5c2..5970d31b2f 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -26,5 +26,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index a08f538602..181bd55fba 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -18,5 +18,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index cc0569c669..85d463d04c 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -17,5 +17,6 @@ CONFIG_SCSI_AHCI=y CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index ff5d3b595c..2c98fae745 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -23,6 +23,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_AXP_DLDO3_VOLT=2500 CONFIG_AXP_DLDO4_VOLT=3300 CONFIG_AXP_FLDO1_VOLT=1200 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index e49a34ad08..271d574aaf 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -18,5 +18,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index ff2839511c..cf6ae6c5ea 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -18,5 +18,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 92dd99e212..9f9a4d99bd 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -21,5 +21,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 1dae7c0f6d..029db8e9ba 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -20,5 +20,6 @@ CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_DM_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index 439f502dad..e1e2b9db56 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -13,5 +13,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_MII=y CONFIG_SUN4I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index d0a8f7aba8..5944607676 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -10,5 +10,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 4226fdecf3..9de3c97bfa 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -14,5 +14,6 @@ CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_SUNXI_NO_PMIC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index 2306963ca6..ceb29acc6a 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -19,6 +19,7 @@ CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO4_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index 353d4c8137..5f9ffafdd5 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -17,5 +17,6 @@ CONFIG_SCSI_AHCI=y CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index eb22c7b862..a09ca86023 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -18,5 +18,6 @@ CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO4_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 7666a3b3bd..0a0f62332a 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -17,5 +17,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index edd2201dfb..f77ec57bbf 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index fcb9ea93d3..b448517f94 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -18,5 +18,6 @@ CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO4_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index ab507b4fb6..91a9903958 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index cf2e3cd792..b77f66e939 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -23,5 +23,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index a837f26c25..eb1968b735 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -25,5 +25,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 03fbb2a12f..57b046b0b6 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -19,5 +19,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_DLDO1_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index bbe2c18465..9e0cf7b70f 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_DFU=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig b/configs/Sinovoip_BPI_M2_Plus_defconfig index ba11e35296..abebbd279f 100644 --- a/configs/Sinovoip_BPI_M2_Plus_defconfig +++ b/configs/Sinovoip_BPI_M2_Plus_defconfig @@ -14,6 +14,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index d21b71df5b..c094b747c0 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -18,5 +18,6 @@ CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_AXP_ALDO2_VOLT=1800 CONFIG_AXP_DLDO1_VOLT=3000 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index 2fb61a5898..c4c482de51 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -24,6 +24,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_AXP_DCDC5_VOLT=1200 CONFIG_AXP_DLDO3_VOLT=2500 CONFIG_AXP_SW_ON=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 926106545f..cad5fed798 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index ae0e7f9604..d8d74331e9 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index b0f66310a6..2db89f5be7 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 78cef27753..8be5b24dd6 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_MII=y CONFIG_SUN4I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index b915a774bd..e2f35cf99b 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -21,4 +21,5 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index ebc29e3ed6..d33794c405 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -12,6 +12,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index 8b10aa54c9..1ac64a5349 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -23,6 +23,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_EFI_PARTITION is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index 502064522c..d7314f1c7a 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_AXP_DLDO4_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 9a15bbd51f..d76e991a7f 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index cadd967a27..f7282a6e76 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -22,5 +22,6 @@ CONFIG_CMD_UNZIP=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index 0cd3ec4d93..eed075e264 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index 739a65be11..8381101be9 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -20,6 +20,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_AXP_DLDO1_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 32e648d44b..fda1f97b19 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_MII=y CONFIG_SUN4I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index 9d3ad854f0..cf5af20df1 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index 1b67939546..d0dbd53e2d 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index a4c59d747c..a42568552a 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index b90316a4b4..7138846b66 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -18,5 +18,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 9235e29235..87b69acab9 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -14,5 +14,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_AXP152_POWER=y CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index a7e8f0f890..e4291bd2c4 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -10,5 +10,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUNXI_NO_PMIC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 6fbe2b0114..3585c12f8d 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -9,5 +9,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index c9593fe833..9f9cc1c5f7 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -10,5 +10,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index dfbf219b2b..abeffe4d06 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index 6fb6e5790e..151ed7655c 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 0e3b65348a..a8fb828f08 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 00817a9e29..423adbcc34 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -13,5 +13,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index c43457cb49..3ecbbb4c27 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -14,5 +14,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index c33eb109b1..e2b3df770f 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -13,4 +13,5 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index 4f892cf5d8..3f360732c3 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -16,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_SY8106A_POWER=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index f8069fe9bd..338abea498 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 924165339e..fdb3a86a5a 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -12,5 +12,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index ed1a071642..c47e3e2ada 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -13,6 +13,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 84bf48fec6..d8f567e961 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -14,5 +14,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_SY8106A_POWER=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index bf70773cc5..4f2e9d9c55 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -15,5 +15,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_SY8106A_POWER=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index fa06d77ce3..7861523633 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -16,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_SY8106A_POWER=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index 01d8ac8c00..8c7fdeda4e 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -18,5 +18,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_SY8106A_POWER=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index adceaf2852..63a8cf29b4 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -11,6 +11,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index bd43efefd3..5dc11fc18b 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 33ae053dcb..930ab18a69 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -11,5 +11,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 44c3144d55..0e463d70a7 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 38de6a0697..b3768d3be4 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index b10741b3e8..dc53b87a5b 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -13,5 +13,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index 88f4891e6b..b26df194a3 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -18,6 +18,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index d20604d01a..6832f3581f 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -13,5 +13,6 @@ CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index ca398d9d6e..3bc23a2e1f 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -13,5 +13,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_AXP152_POWER=y CONFIG_CONS_INDEX=2 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index ea826aabad..85db9ad341 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -16,5 +16,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index 8a636c4e66..a89ac8c955 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -14,5 +14,6 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_CONS_INDEX=5 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index 041103cafc..6530a4dc20 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -16,5 +16,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index 7094384a89..faf3fd53bb 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -19,6 +19,7 @@ CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_EFI_PARTITION is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_DCDC5_VOLT=1200 +CONFIG_USB_OHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_FUNCTION_MASS_STORAGE=y diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index b4dd005651..60a152704a 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -191,6 +191,7 @@ config USB_EHCI_GENERIC bool "Support for generic EHCI USB controller" depends on OF_CONTROL depends on DM_USB + default ARCH_SUNXI default n ---help--- Enables support for generic EHCI controller. @@ -221,6 +222,7 @@ config USB_OHCI_GENERIC bool "Support for generic OHCI USB controller" depends on OF_CONTROL depends on DM_USB + default ARCH_SUNXI select USB_HOST ---help--- Enables support for generic OHCI controller. diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index af079a71ee..6033760583 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -11,10 +11,6 @@ * A10 specific configuration */

-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_SUNXI -#endif - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun50i.h b/include/configs/sun50i.h index 2d73c75b8c..e050a5299f 100644 --- a/include/configs/sun50i.h +++ b/include/configs/sun50i.h @@ -10,11 +10,6 @@ * A64 specific configuration */

-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_SUNXI -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - #ifndef CONFIG_MACH_SUN50I_H6 #define GICD_BASE 0x1c81000 #define GICC_BASE 0x1c82000 diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h index c3692caa73..ee42af80d4 100644 --- a/include/configs/sun5i.h +++ b/include/configs/sun5i.h @@ -11,10 +11,6 @@ * High Level Configuration Options */

-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_SUNXI -#endif - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 1523684fad..1e490daac1 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -14,10 +14,6 @@ * A31 specific configuration */

-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_SUNXI -#endif - #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */

diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index bb8f217b25..d2fd586672 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -12,10 +12,6 @@ * A20 specific configuration */

-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_SUNXI -#endif - #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */

diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index 7dc8693b76..9b4675e4c3 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -12,10 +12,6 @@ * A23 specific configuration */

-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_SUNXI -#endif - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 9819d9980c..ed0cfc24f5 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -295,7 +295,6 @@ extern int soft_i2c_gpio_scl;

#ifdef CONFIG_USB_EHCI_HCD #define CONFIG_USB_OHCI_NEW -#define CONFIG_USB_OHCI_SUNXI #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif

Now Allwinner platform is all set to use Generic USB controller drivers, so remove the legacy sunxi drivers.

Tested-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/usb/host/Makefile | 2 - drivers/usb/host/ehci-sunxi.c | 204 ----------------------------- drivers/usb/host/ohci-sunxi.c | 233 ---------------------------------- scripts/config_whitelist.txt | 2 - 4 files changed, 441 deletions(-) delete mode 100644 drivers/usb/host/ehci-sunxi.c delete mode 100644 drivers/usb/host/ohci-sunxi.c

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index cb8c315a15..b62fdbb1d2 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -15,7 +15,6 @@ obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o -obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o

@@ -37,7 +36,6 @@ obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o -obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c deleted file mode 100644 index 7a79931a97..0000000000 --- a/drivers/usb/host/ehci-sunxi.c +++ /dev/null @@ -1,204 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Sunxi ehci glue - * - * Copyright (C) 2015 Hans de Goede hdegoede@redhat.com - * Copyright (C) 2014 Roman Byshko rbyshko@gmail.com - * - * Based on code from - * Allwinner Technology Co., Ltd. <www.allwinnertech.com> - */ - -#include <common.h> -#include <asm/arch/clock.h> -#include <asm/io.h> -#include <dm.h> -#include "ehci.h" -#include <generic-phy.h> - -#ifdef CONFIG_SUNXI_GEN_SUN4I -#define BASE_DIST 0x8000 -#define AHB_CLK_DIST 2 -#else -#define BASE_DIST 0x1000 -#define AHB_CLK_DIST 1 -#endif - -#define SUN6I_AHB_RESET0_CFG_OFFSET 0x2c0 -#define SUN9I_AHB_RESET0_CFG_OFFSET 0x5a0 - -struct ehci_sunxi_cfg { - bool has_reset; - u32 extra_ahb_gate_mask; - u32 reset0_cfg_offset; -}; - -struct ehci_sunxi_priv { - struct ehci_ctrl ehci; - struct sunxi_ccm_reg *ccm; - u32 *reset0_cfg; - int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ - struct phy phy; - const struct ehci_sunxi_cfg *cfg; -}; - -static int ehci_usb_probe(struct udevice *dev) -{ - struct usb_platdata *plat = dev_get_platdata(dev); - struct ehci_sunxi_priv *priv = dev_get_priv(dev); - struct ehci_hccr *hccr = (struct ehci_hccr *)devfdt_get_addr(dev); - struct ehci_hcor *hcor; - int extra_ahb_gate_mask = 0; - u8 reg_mask = 0; - int phys, ret; - - priv->cfg = (const struct ehci_sunxi_cfg *)dev_get_driver_data(dev); - priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - if (IS_ERR(priv->ccm)) - return PTR_ERR(priv->ccm); - - priv->reset0_cfg = (void *)priv->ccm + - priv->cfg->reset0_cfg_offset; - - phys = dev_count_phandle_with_args(dev, "phys", "#phy-cells"); - if (phys < 0) { - phys = 0; - goto no_phy; - } - - ret = generic_phy_get_by_name(dev, "usb", &priv->phy); - if (ret) { - pr_err("failed to get %s usb PHY\n", dev->name); - return ret; - } - - ret = generic_phy_init(&priv->phy); - if (ret) { - pr_err("failed to init %s USB PHY\n", dev->name); - return ret; - } - - ret = generic_phy_power_on(&priv->phy); - if (ret) { - pr_err("failed to power on %s USB PHY\n", dev->name); - return ret; - } - -no_phy: - /* - * This should go away once we've moved to the driver model for - * clocks resp. phys. - */ - reg_mask = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST; - priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0; - extra_ahb_gate_mask = priv->cfg->extra_ahb_gate_mask; - priv->ahb_gate_mask <<= reg_mask * AHB_CLK_DIST; - extra_ahb_gate_mask <<= reg_mask * AHB_CLK_DIST; - - setbits_le32(&priv->ccm->ahb_gate0, - priv->ahb_gate_mask | extra_ahb_gate_mask); - if (priv->cfg->has_reset) - setbits_le32(priv->reset0_cfg, - priv->ahb_gate_mask | extra_ahb_gate_mask); - - hcor = (struct ehci_hcor *)((uintptr_t)hccr + - HC_LENGTH(ehci_readl(&hccr->cr_capbase))); - - return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type); -} - -static int ehci_usb_remove(struct udevice *dev) -{ - struct ehci_sunxi_priv *priv = dev_get_priv(dev); - int ret; - - if (generic_phy_valid(&priv->phy)) { - ret = generic_phy_exit(&priv->phy); - if (ret) { - pr_err("failed to exit %s USB PHY\n", dev->name); - return ret; - } - } - - ret = ehci_deregister(dev); - if (ret) - return ret; - - if (priv->cfg->has_reset) - clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask); - clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask); - - return 0; -} - -static const struct ehci_sunxi_cfg sun4i_a10_cfg = { - .has_reset = false, -}; - -static const struct ehci_sunxi_cfg sun6i_a31_cfg = { - .has_reset = true, - .reset0_cfg_offset = SUN6I_AHB_RESET0_CFG_OFFSET, -}; - -static const struct ehci_sunxi_cfg sun8i_h3_cfg = { - .has_reset = true, - .extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0, - .reset0_cfg_offset = SUN6I_AHB_RESET0_CFG_OFFSET, -}; - -static const struct ehci_sunxi_cfg sun9i_a80_cfg = { - .has_reset = true, - .reset0_cfg_offset = SUN9I_AHB_RESET0_CFG_OFFSET, -}; - -static const struct udevice_id ehci_usb_ids[] = { - { - .compatible = "allwinner,sun4i-a10-ehci", - .data = (ulong)&sun4i_a10_cfg, - }, - { - .compatible = "allwinner,sun5i-a13-ehci", - .data = (ulong)&sun4i_a10_cfg, - }, - { - .compatible = "allwinner,sun6i-a31-ehci", - .data = (ulong)&sun6i_a31_cfg, - }, - { - .compatible = "allwinner,sun7i-a20-ehci", - .data = (ulong)&sun4i_a10_cfg, - }, - { - .compatible = "allwinner,sun8i-a23-ehci", - .data = (ulong)&sun6i_a31_cfg, - }, - { - .compatible = "allwinner,sun8i-a83t-ehci", - .data = (ulong)&sun6i_a31_cfg, - }, - { - .compatible = "allwinner,sun8i-h3-ehci", - .data = (ulong)&sun8i_h3_cfg, - }, - { - .compatible = "allwinner,sun9i-a80-ehci", - .data = (ulong)&sun9i_a80_cfg, - }, - { - .compatible = "allwinner,sun50i-a64-ehci", - .data = (ulong)&sun8i_h3_cfg, - }, - { /* sentinel */ } -}; - -U_BOOT_DRIVER(ehci_sunxi) = { - .name = "ehci_sunxi", - .id = UCLASS_USB, - .of_match = ehci_usb_ids, - .probe = ehci_usb_probe, - .remove = ehci_usb_remove, - .ops = &ehci_usb_ops, - .platdata_auto_alloc_size = sizeof(struct usb_platdata), - .priv_auto_alloc_size = sizeof(struct ehci_sunxi_priv), - .flags = DM_FLAG_ALLOC_PRIV_DMA, -}; diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c deleted file mode 100644 index bb3c2475df..0000000000 --- a/drivers/usb/host/ohci-sunxi.c +++ /dev/null @@ -1,233 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Sunxi ohci glue - * - * Copyright (C) 2015 Hans de Goede hdegoede@redhat.com - * - * Based on code from - * Allwinner Technology Co., Ltd. <www.allwinnertech.com> - */ - -#include <common.h> -#include <asm/arch/clock.h> -#include <asm/io.h> -#include <dm.h> -#include <usb.h> -#include "ohci.h" -#include <generic-phy.h> - -#ifdef CONFIG_SUNXI_GEN_SUN4I -#define BASE_DIST 0x8000 -#define AHB_CLK_DIST 2 -#else -#define BASE_DIST 0x1000 -#define AHB_CLK_DIST 1 -#endif - -#define SUN6I_AHB_RESET0_CFG_OFFSET 0x2c0 -#define SUN9I_AHB_RESET0_CFG_OFFSET 0x5a0 - -struct ohci_sunxi_cfg { - bool has_reset; - u32 extra_ahb_gate_mask; - u32 extra_usb_gate_mask; - u32 reset0_cfg_offset; -}; - -struct ohci_sunxi_priv { - ohci_t ohci; - struct sunxi_ccm_reg *ccm; - u32 *reset0_cfg; - int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ - int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */ - struct phy phy; - const struct ohci_sunxi_cfg *cfg; -}; - -static fdt_addr_t last_ohci_addr = 0; - -static int ohci_usb_probe(struct udevice *dev) -{ - struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev); - struct ohci_sunxi_priv *priv = dev_get_priv(dev); - struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev); - int extra_ahb_gate_mask = 0; - u8 reg_mask = 0; - int phys, ret; - - if ((fdt_addr_t)regs > last_ohci_addr) - last_ohci_addr = (fdt_addr_t)regs; - - priv->cfg = (const struct ohci_sunxi_cfg *)dev_get_driver_data(dev); - priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - if (IS_ERR(priv->ccm)) - return PTR_ERR(priv->ccm); - - priv->reset0_cfg = (void *)priv->ccm + - priv->cfg->reset0_cfg_offset; - - phys = dev_count_phandle_with_args(dev, "phys", "#phy-cells"); - if (phys < 0) { - phys = 0; - goto no_phy; - } - - ret = generic_phy_get_by_name(dev, "usb", &priv->phy); - if (ret) { - pr_err("failed to get %s usb PHY\n", dev->name); - return ret; - } - - ret = generic_phy_init(&priv->phy); - if (ret) { - pr_err("failed to init %s USB PHY\n", dev->name); - return ret; - } - - ret = generic_phy_power_on(&priv->phy); - if (ret) { - pr_err("failed to power on %s USB PHY\n", dev->name); - return ret; - } - -no_phy: - bus_priv->companion = true; - - /* - * This should go away once we've moved to the driver model for - * clocks resp. phys. - */ - reg_mask = ((uintptr_t)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST; - priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0; - extra_ahb_gate_mask = priv->cfg->extra_ahb_gate_mask; - priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK; - priv->ahb_gate_mask <<= reg_mask * AHB_CLK_DIST; - extra_ahb_gate_mask <<= reg_mask * AHB_CLK_DIST; - priv->usb_gate_mask <<= reg_mask; - - setbits_le32(&priv->ccm->ahb_gate0, - priv->ahb_gate_mask | extra_ahb_gate_mask); - setbits_le32(&priv->ccm->usb_clk_cfg, - priv->usb_gate_mask | priv->cfg->extra_usb_gate_mask); - if (priv->cfg->has_reset) - setbits_le32(priv->reset0_cfg, - priv->ahb_gate_mask | extra_ahb_gate_mask); - - return ohci_register(dev, regs); -} - -static int ohci_usb_remove(struct udevice *dev) -{ - struct ohci_sunxi_priv *priv = dev_get_priv(dev); - fdt_addr_t base_addr = devfdt_get_addr(dev); - int ret; - - if (generic_phy_valid(&priv->phy)) { - ret = generic_phy_exit(&priv->phy); - if (ret) { - pr_err("failed to exit %s USB PHY\n", dev->name); - return ret; - } - } - - ret = ohci_deregister(dev); - if (ret) - return ret; - - if (priv->cfg->has_reset) - clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask); - /* - * On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so - * we have to wait with bringing down any clock until the last - * OHCI controller is removed. - */ - if (!priv->cfg->extra_usb_gate_mask || base_addr == last_ohci_addr) { - u32 usb_gate_mask = priv->usb_gate_mask; - - usb_gate_mask |= priv->cfg->extra_usb_gate_mask; - clrbits_le32(&priv->ccm->usb_clk_cfg, usb_gate_mask); - } - - clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask); - - return 0; -} - -static const struct ohci_sunxi_cfg sun4i_a10_cfg = { - .has_reset = false, -}; - -static const struct ohci_sunxi_cfg sun6i_a31_cfg = { - .has_reset = true, - .reset0_cfg_offset = SUN6I_AHB_RESET0_CFG_OFFSET, -}; - -static const struct ohci_sunxi_cfg sun8i_h3_cfg = { - .has_reset = true, - .extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, - .reset0_cfg_offset = SUN6I_AHB_RESET0_CFG_OFFSET, -}; - -static const struct ohci_sunxi_cfg sun9i_a80_cfg = { - .has_reset = true, - .reset0_cfg_offset = SUN9I_AHB_RESET0_CFG_OFFSET, -}; - -static const struct ohci_sunxi_cfg sun50i_a64_cfg = { - .has_reset = true, - .extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, - .extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK, - .reset0_cfg_offset = SUN6I_AHB_RESET0_CFG_OFFSET, -}; - -static const struct udevice_id ohci_usb_ids[] = { - { - .compatible = "allwinner,sun4i-a10-ohci", - .data = (ulong)&sun4i_a10_cfg, - }, - { - .compatible = "allwinner,sun5i-a13-ohci", - .data = (ulong)&sun4i_a10_cfg, - }, - { - .compatible = "allwinner,sun6i-a31-ohci", - .data = (ulong)&sun6i_a31_cfg, - }, - { - .compatible = "allwinner,sun7i-a20-ohci", - .data = (ulong)&sun4i_a10_cfg, - }, - { - .compatible = "allwinner,sun8i-a23-ohci", - .data = (ulong)&sun6i_a31_cfg, - }, - { - .compatible = "allwinner,sun8i-a83t-ohci", - .data = (ulong)&sun6i_a31_cfg, - }, - { - .compatible = "allwinner,sun8i-h3-ohci", - .data = (ulong)&sun8i_h3_cfg, - }, - { - .compatible = "allwinner,sun9i-a80-ohci", - .data = (ulong)&sun9i_a80_cfg, - }, - { - .compatible = "allwinner,sun50i-a64-ohci", - .data = (ulong)&sun50i_a64_cfg, - }, - { /* sentinel */ } -}; - -U_BOOT_DRIVER(usb_ohci) = { - .name = "ohci_sunxi", - .id = UCLASS_USB, - .of_match = ohci_usb_ids, - .probe = ohci_usb_probe, - .remove = ohci_usb_remove, - .ops = &ohci_usb_ops, - .platdata_auto_alloc_size = sizeof(struct usb_platdata), - .priv_auto_alloc_size = sizeof(struct ohci_sunxi_priv), - .flags = DM_FLAG_ALLOC_PRIV_DMA, -}; diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index fc37099cbe..96d8798348 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -4573,7 +4573,6 @@ CONFIG_USB_EHCI_MX5 CONFIG_USB_EHCI_MXC CONFIG_USB_EHCI_MXS CONFIG_USB_EHCI_SPEAR -CONFIG_USB_EHCI_SUNXI CONFIG_USB_EHCI_TEGRA CONFIG_USB_EHCI_TXFIFO_THRESH CONFIG_USB_EHCI_VCT @@ -4612,7 +4611,6 @@ CONFIG_USB_MUSB_TUSB6010 CONFIG_USB_OHCI_EP93XX CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW -CONFIG_USB_OHCI_SUNXI CONFIG_USB_OTG CONFIG_USB_OTG_BLACKLIST_HUB CONFIG_USB_PHY_CFG_BASE