DDR-ODT require cfg_dram_type switch set properly as per DDR type. T1040RDB, T1042RDB boards have DDR3L type DDR, so cfg_dram_type should be set to OFF for DDR3L Update t104xrdb/README for switch setting

Signed-off-by: Priyanka Jain Priyanka.Jain@freescale.com --- board/freescale/t104xrdb/README | 6 +++--- board/freescale/t104xrdb/ddr.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index cdbe1fa..fe1621c 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -259,15 +259,15 @@ Switch Settings: (ON is 0, OFF is 1) =============== NAND boot SW setting: SW1: 10001000 -SW2: 00111001 +SW2: 00111011 SW3: 11110001

SPI boot SW setting: SW1: 00100010 -SW2: 10111001 +SW2: 10111011 SW3: 11100001

SD boot SW setting: SW1: 00100000 -SW2: 00111001 +SW2: 00111011 SW3: 11100001 diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index 34c9224..2c331ee 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -105,8 +105,8 @@ found: popts->zq_en = 1;

/* DHC_EN =1, ODT = 75 Ohm */ - popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_OFF); - popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_OFF); + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); }

phys_size_t initdram(int board_type)