[U-Boot] [PATCH 1/2] dm: pci: Check board information pointer in decode_regions()
PCI enumeration may happen very early on an x86 board. The board information pointer should have been checked in decode_regions() as its space may not be allocated yet.
With this commit, Intel Galileo board boots again.
Fixes: 664758c ("pci: Fix decode regions for memory banks") Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index ad43e8a..9d51236 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -876,6 +876,9 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node, #ifdef CONFIG_NR_DRAM_BANKS bd_t *bd = gd->bd;
+ if (!bd) + return 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { if (bd->bi_dram[i].size) { pci_set_region(hose->regions + hose->region_count++,
It makes no sense to set a PCI region that has 0 size.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
drivers/pci/pci-uclass.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 9d51236..a2e8296 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -897,8 +897,9 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node, #endif if (gd->pci_ram_top && gd->pci_ram_top < base + size) size = gd->pci_ram_top - base; - pci_set_region(hose->regions + hose->region_count++, base, base, - size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); + if (size) + pci_set_region(hose->regions + hose->region_count++, base, + base, size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); #endif
return 0;
On 27 March 2018 at 15:46, Bin Meng bmeng.cn@gmail.com wrote:
It makes no sense to set a PCI region that has 0 size.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
drivers/pci/pci-uclass.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
On Fri, Mar 30, 2018 at 6:43 AM, Simon Glass sjg@chromium.org wrote:
On 27 March 2018 at 15:46, Bin Meng bmeng.cn@gmail.com wrote:
It makes no sense to set a PCI region that has 0 size.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
drivers/pci/pci-uclass.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
applied to u-boot-x86, thanks!
On 27 March 2018 at 15:46, Bin Meng bmeng.cn@gmail.com wrote:
PCI enumeration may happen very early on an x86 board. The board information pointer should have been checked in decode_regions() as its space may not be allocated yet.
With this commit, Intel Galileo board boots again.
Fixes: 664758c ("pci: Fix decode regions for memory banks") Signed-off-by: Bin Meng bmeng.cn@gmail.com
drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On Fri, Mar 30, 2018 at 6:43 AM, Simon Glass sjg@chromium.org wrote:
On 27 March 2018 at 15:46, Bin Meng bmeng.cn@gmail.com wrote:
PCI enumeration may happen very early on an x86 board. The board information pointer should have been checked in decode_regions() as its space may not be allocated yet.
With this commit, Intel Galileo board boots again.
Fixes: 664758c ("pci: Fix decode regions for memory banks") Signed-off-by: Bin Meng bmeng.cn@gmail.com
drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
applied to u-boot-x86, thanks!
participants (2)
-
Bin Meng -
Simon Glass