[U-Boot] [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
Add MT35XU512ABA1G12 parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is 64MB. --- drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 2 ++ drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 #define SPI_FLASH_CFI_MFR_SST 0xbf #define SPI_FLASH_CFI_MFR_WINBOND 0xef diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 0034a28..23b8adf 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -903,6 +903,7 @@ static int set_quad_mode(struct spi_flash *flash, #endif #ifdef CONFIG_SPI_FLASH_STMICRO case SPI_FLASH_CFI_MFR_STMICRO: + case SPI_FLASH_CFI_MFR_MICRON: debug("SF: QEB is volatile for %02x flash\n", JEDEC_MFR(info)); return 0; #endif @@ -976,6 +977,7 @@ int spi_flash_scan(struct spi_flash *flash) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO || + JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MICRON || JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) { flash->flash_lock = stm_lock; flash->flash_unlock = stm_unlock; diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index edca94e..f144cc3 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -133,6 +133,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, {"mt25qu02g", INFO(0x20bb22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, {"mt25ql02g", INFO(0x20ba22, 0x0, 64 * 1024, 4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"mt35xu512g", INFO6(0x2c5b1a, 0x104100, 128 * 1024, 512, E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ {"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur yogeshnarayan.gaur@nxp.com wrote:
Add MT35XU512ABA1G12 parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is 64MB.
drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 2 ++ drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C
Does this new mfr id from micro? so 0x20 still exists?
thanks!
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:25 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur yogeshnarayan.gaur@nxp.com wrote:
Add MT35XU512ABA1G12 parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is 64MB.
drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 2 ++ drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C
Does this new mfr id from micro? so 0x20 still exists?
On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer flash, MT35X, it's been changed to 0x2c.
-- Regards Yogesh Gaur.
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:25 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur yogeshnarayan.gaur@nxp.com wrote:
Add MT35XU512ABA1G12 parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is 64MB.
drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 2 ++ drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C
Does this new mfr id from micro? so 0x20 still exists?
On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer flash, MT35X, it's been changed to 0x2c.
OK, so the flash features like quad ennoblements, opcodes remains same? except the mfr?
thanks!
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:32 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:25 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur yogeshnarayan.gaur@nxp.com wrote:
Add MT35XU512ABA1G12 parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is 64MB.
drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 2 ++ drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C
Does this new mfr id from micro? so 0x20 still exists?
On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer
flash, MT35X, it's been changed to 0x2c.
OK, so the flash features like quad ennoblements, opcodes remains same? except the mfr?
This flash support single bit and octal bit cmds no dual or quad support. Opcode for read/write/erase and other register operation related cmds are similar to already supported flashes like MT25QU512ABB(n25q512a in existing table). Only mfr id has been modified.
-- Regards Yogesh Gaur.
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
On Fri, Aug 11, 2017 at 3:38 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:32 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:25 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur yogeshnarayan.gaur@nxp.com wrote:
Add MT35XU512ABA1G12 parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is 64MB.
drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 2 ++ drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C
Does this new mfr id from micro? so 0x20 still exists?
On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer
flash, MT35X, it's been changed to 0x2c.
OK, so the flash features like quad ennoblements, opcodes remains same? except the mfr?
This flash support single bit and octal bit cmds no dual or quad support. Opcode for read/write/erase and other register operation related cmds are similar to already supported flashes like MT25QU512ABB(n25q512a in existing table). Only mfr id has been modified.
OK.
And better remove the new CONFIG_ macro since the both chips have equal functionalities and anyway changes should managed by id table. the chip you defined under STMICRO ifdef :)
thanks!
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 4:03 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:38 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:32 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:25 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur yogeshnarayan.gaur@nxp.com wrote:
Add MT35XU512ABA1G12 parameters to NOR flash parameters array. Since the manufactory ID is changed to 0x2C, add it for micron and using it for relevant settings.
The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is
64MB.
drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi_flash.c | 2 ++ drivers/mtd/spi/spi_flash_ids.c | 1 + 3 files changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -33,6 +33,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C
Does this new mfr id from micro? so 0x20 still exists?
On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer
flash, MT35X, it's been changed to 0x2c.
OK, so the flash features like quad ennoblements, opcodes remains same? except the mfr?
This flash support single bit and octal bit cmds no dual or quad support. Opcode for read/write/erase and other register operation related cmds are
similar to already supported flashes like MT25QU512ABB(n25q512a in existing table).
Only mfr id has been modified.
OK.
Did this patch needs to be modified further or can be upstreamed?
And better remove the new CONFIG_ macro since the both chips have equal functionalities and anyway changes should managed by id table. the chip you defined under STMICRO ifdef :)
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
On Tue, Aug 29, 2017 at 9:42 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 4:03 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:38 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:32 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:25 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur yogeshnarayan.gaur@nxp.com wrote: > Add MT35XU512ABA1G12 parameters to NOR flash parameters array. > Since the manufactory ID is changed to 0x2C, add it for micron > and using it for relevant settings. > > The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It > can't support dual and quad. Supports subsector erase with 4KB > granularity, have support of FSR(flag status register) and flash size is
64MB.
> --- > drivers/mtd/spi/sf_internal.h | 1 + > drivers/mtd/spi/spi_flash.c | 2 ++ > drivers/mtd/spi/spi_flash_ids.c | 1 + > 3 files changed, 4 insertions(+) > > diff --git a/drivers/mtd/spi/sf_internal.h > b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 > --- a/drivers/mtd/spi/sf_internal.h > +++ b/drivers/mtd/spi/sf_internal.h > @@ -33,6 +33,7 @@ enum spi_nor_option_flags { > /* CFI Manufacture ID's */ > #define SPI_FLASH_CFI_MFR_SPANSION 0x01 > #define SPI_FLASH_CFI_MFR_STMICRO 0x20 > +#define SPI_FLASH_CFI_MFR_MICRON 0x2C
Does this new mfr id from micro? so 0x20 still exists?
On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer
flash, MT35X, it's been changed to 0x2c.
OK, so the flash features like quad ennoblements, opcodes remains same? except the mfr?
This flash support single bit and octal bit cmds no dual or quad support. Opcode for read/write/erase and other register operation related cmds are
similar to already supported flashes like MT25QU512ABB(n25q512a in existing table).
Only mfr id has been modified.
OK.
Did this patch needs to be modified further or can be upstreamed?
Yes, ie what I commented in previous thread.
thanks!
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Tuesday, August 29, 2017 10:48 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Tue, Aug 29, 2017 at 9:42 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 4:03 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:38 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Friday, August 11, 2017 3:32 PM To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com wrote:
> -----Original Message----- > From: Jagan Teki [mailto:jagannadh.teki@gmail.com] > Sent: Friday, August 11, 2017 3:25 PM > To: Yogesh Narayan Gaur yogeshnarayan.gaur@nxp.com > Cc: u-boot@lists.denx.de; York Sun york.sun@nxp.com > Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash > support > > On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur > yogeshnarayan.gaur@nxp.com > wrote: > > Add MT35XU512ABA1G12 parameters to NOR flash parameters
array.
> > Since the manufactory ID is changed to 0x2C, add it for > > micron and using it for relevant settings. > > > > The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It > > can't support dual and quad. Supports subsector erase with > > 4KB granularity, have support of FSR(flag status register) > > and flash size is
64MB.
> > --- > > drivers/mtd/spi/sf_internal.h | 1 + > > drivers/mtd/spi/spi_flash.c | 2 ++ > > drivers/mtd/spi/spi_flash_ids.c | 1 + > > 3 files changed, 4 insertions(+) > > > > diff --git a/drivers/mtd/spi/sf_internal.h > > b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644 > > --- a/drivers/mtd/spi/sf_internal.h > > +++ b/drivers/mtd/spi/sf_internal.h > > @@ -33,6 +33,7 @@ enum spi_nor_option_flags { > > /* CFI Manufacture ID's */ > > #define SPI_FLASH_CFI_MFR_SPANSION 0x01 > > #define SPI_FLASH_CFI_MFR_STMICRO 0x20 > > +#define SPI_FLASH_CFI_MFR_MICRON 0x2C > > Does this new mfr id from micro? so 0x20 still exists? > On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in newer
flash, MT35X, it's been changed to 0x2c.
OK, so the flash features like quad ennoblements, opcodes remains same? except the mfr?
This flash support single bit and octal bit cmds no dual or quad support. Opcode for read/write/erase and other register operation related cmds are
similar to already supported flashes like MT25QU512ABB(n25q512a in existing table).
Only mfr id has been modified.
OK.
Did this patch needs to be modified further or can be upstreamed?
Yes, ie what I commented in previous thread.
Updated the patch and sent on mailing list again.
-- Thanks
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
participants (3)
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Jagan Teki -
Yogesh Gaur -
Yogesh Narayan Gaur