Hi Steve,

On 18.09.2013 13:26, Steve Miller wrote:

I have inherited a design using the PPC405EX that was based on the Kilauea reference design. One of the changes was Kilauea uses on-board DDR2 DRAM ICs and this design uses DDR2 DIMMs. The u-boot is working, except only 256MB of RAM is available instead of the 1GIG that the module supports. This working 256MB matches the memory that the Kilauea had. In looking into this, the CONFIG_SPD_EEPROM was undefined, as that was what was appropriate for the Kilauea. I defined this but got lots of compiler errors. So I did the following:

1.    Updated the eldk to 5.4
   
   

2.   Downloaded the latest u-boot source code I could find.
   

(Version 2013)

Good. Using the latest version is always a "good thing" to do.

I still get compiler errors. The first error is in 40x_spd_sdram.c I do not believe it should be attempting to compile this as it appears to be SPD setting for SDRAM modules and not DDR2 modules. I added another check to line 50 of 40x_spd_sdram.c to skip that file if it is a 405EX. This of course, eliminated those compiler errors.

Yes, this file should not be used on 405ex. Its for the "older" 405 variants with SDRAM and not DDR2.

Next place is has trouble is 44x_spd_ddr2.c In line 460 it cannot find SDR0_SRST0_DMC for example. Another example is line 821, it cannot find SDR0_DDR0. In searching the PPC405EX datasheet, I do not find that these registers exist in this part. I believe it is supposed to compile this file, as the file has specific references to the 405EX. However, I do not know what I am missing to get this to compile for that processor.

Questions:

1.    Has anyone compiled u-boot for the 405EX using a DIMM, aka an
   

SPD defined RAM?

I don't remember one. Not 100% sure, since 4xx development is quite dead since a few years.

2.   Is there something obvious that I need to place in the config
   

to get this to work? I compared this config to another product that uses a 460SX. I did not see anything special that the 460SX was configuring to make the system work with the SPD of the DIMM.

IIRC, then 405EX uses the same DDR2 controller as for example 460EX does. Most likely a different version of this IP core though. Perhaps with some extensions missing because of 460EX supporting bigger address spaces. So you should take the canyonlands defines as a reference:

#define CONFIG_SPD_EEPROM #define SPD_EEPROM_ADDRESS {0x50, 0x51}

You need to adjust the EEPROM addresses to your board of course. And its very likely that you need to change/fix the 44x_spd_ddr2.c code to really support the 405EX.

Best regards, Stefan

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