In the Linux DT the recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. The newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Sort aliases on reg order when available and without number gap.

Signed-off-by: Johan Jonker jbx6244@gmail.com --- arch/arm/dts/rk3328-evb.dts | 6 ++++++ arch/arm/dts/rk3328-nanopi-r2s.dts | 4 ++++ arch/arm/dts/rk3328-roc-cc.dts | 5 +++++ arch/arm/dts/rk3328-rock-pi-e.dts | 5 +++++ arch/arm/dts/rk3328-rock64.dts | 5 +++++ arch/arm/dts/rk3328-u-boot.dtsi | 2 -- 6 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts index a0000d072c..832773d0fd 100644 --- a/arch/arm/dts/rk3328-evb.dts +++ b/arch/arm/dts/rk3328-evb.dts @@ -10,6 +10,12 @@ model = "Rockchip RK3328 EVB"; compatible = "rockchip,rk3328-evb", "rockchip,rk3328";

+ aliases { + mmc0 = &sdmmc; + mmc1 = &sdio; + mmc2 = &emmc; + }; + chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts index b1e45c01a9..92bb282ed9 100644 --- a/arch/arm/dts/rk3328-nanopi-r2s.dts +++ b/arch/arm/dts/rk3328-nanopi-r2s.dts @@ -13,6 +13,10 @@ model = "FriendlyElec NanoPi R2S"; compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";

+ aliases { + mmc0 = &sdmmc; + }; + chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts index 8dc4c57fbb..401be93364 100644 --- a/arch/arm/dts/rk3328-roc-cc.dts +++ b/arch/arm/dts/rk3328-roc-cc.dts @@ -10,6 +10,11 @@ model = "Firefly roc-rk3328-cc"; compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";

+ aliases { + mmc0 = &sdmmc; + mmc1 = &emmc; + }; + chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts index 57e36ec609..63e73781f1 100644 --- a/arch/arm/dts/rk3328-rock-pi-e.dts +++ b/arch/arm/dts/rk3328-rock-pi-e.dts @@ -10,6 +10,11 @@ model = "Radxa Rockpi E"; compatible = "radxa,rock-pi-e", "rockchip,rk3328";

+ aliases { + mmc0 = &sdmmc; + mmc1 = &emmc; + }; + chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts index 7a78255f52..57a796e220 100644 --- a/arch/arm/dts/rk3328-rock64.dts +++ b/arch/arm/dts/rk3328-rock64.dts @@ -10,6 +10,11 @@ model = "Pine64 Rock64"; compatible = "pine64,rock64", "rockchip,rk3328";

+ aliases { + mmc0 = &sdmmc; + mmc1 = &emmc; + }; + chosen { stdout-path = "serial2:1500000n8"; }; diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index 1d7bf19192..e00e466d8d 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -5,8 +5,6 @@

/ { aliases { - mmc0 = &emmc; - mmc1 = &sdmmc; spi0 = &spi0; };

This commit adds the default configuration file and relevant description for A95X Z2 board

Signed-off-by: Johan Jonker jbx6244@gmail.com --- board/rockchip/evb_rk3328/MAINTAINERS | 6 ++ configs/a95x-z2-rk3318_defconfig | 102 ++++++++++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 2 + 3 files changed, 110 insertions(+) create mode 100644 configs/a95x-z2-rk3318_defconfig

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 14fda46e8f..a4573c2ff9 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -1,3 +1,9 @@ +A95X-Z2-RK3318 +M: Johan Jonker jbx6244@gmail.com +S: Maintained +F: configs/a95x-z2-rk3318_defconfig +F: arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi + EVB-RK3328 M: Kever Yang kever.yang@rock-chips.com S: Maintained diff --git a/configs/a95x-z2-rk3318_defconfig b/configs/a95x-z2-rk3318_defconfig new file mode 100644 index 0000000000..cba0f6c659 --- /dev/null +++ b/configs/a95x-z2-rk3318_defconfig @@ -0,0 +1,102 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ROCKCHIP_RK3328=y +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_TPL_LIBCOMMON_SUPPORT=y +CONFIG_TPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_DEBUG_UART_BASE=0xFF130000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEFAULT_DEVICE_TREE="rk3318-a95x-z2" +CONFIG_DEBUG_UART=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3318-a95x-z2.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_TPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_TPL_OF_PLATDATA=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set +CONFIG_TPL_DM=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_BUF_ADDR=0x800800 +CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y +CONFIG_FASTBOOT_MMC_USER_SUPPORT=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_DM_RESET=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_SYSRESET=y +# CONFIG_TPL_SYSRESET is not set +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_TPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index fbb9983988..49a2dd2dd3 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -44,6 +44,8 @@ List of mainline supported rockchip boards: * rk3308 - Rockchip Evb-RK3308 (evb-rk3308) - Roc-cc-RK3308 (roc-cc-rk3308) +* rk3318 + - A95X Z2 (a95x-z2-rk3318) * rk3328 - Rockchip Evb-RK3328 (evb-rk3328) - Pine64 Rock64 (rock64-rk3328)

The rk3318 A95X Z2 boards are sold as TV box. No further documentation is given, but from the dts files extracted it seems that the rk3318 processor is simulair to the rk3328. This dts file contains only the basic nodes that have support in the mainline kernel. Included extra dtsi file for U-boot specific properties.

Features:

CPU: RK3318 Quad-Core Cortex-A53 GPU: Mali-450 RAM: 2/4GB DDR3 ROM: EMMC 16/32/64GB HDMI: HDMI 2.0a for 4k@60Hz Ethernet: 10/100M standard RJ-45 WiFi: 2.4G+5G WIFI, 802.11 b/g/n Bluetooth: 4.0 1 x USB 3.0 1 x USB 2.0 1 x Micro SD card slot 1 x SPDIF 1 x AV 1 x DC IN

Signed-off-by: Johan Jonker jbx6244@gmail.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++ arch/arm/dts/rk3318-a95x-z2.dts | 384 ++++++++++++++++++++++++++++++++ 3 files changed, 444 insertions(+) create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9918e46633..3e1e2209b7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -107,6 +107,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ rk3308-roc-cc.dtb

dtb-$(CONFIG_ROCKCHIP_RK3328) += \ + rk3318-a95x-z2.dtb \ rk3328-evb.dtb \ rk3328-nanopi-r2s.dtb \ rk3328-roc-cc.dtb \ diff --git a/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi new file mode 100644 index 0000000000..5010925e9a --- /dev/null +++ b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3328-u-boot.dtsi" +#include "rk3328-sdram-ddr3-666.dtsi" + +/ { + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; + }; + + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "zkmagic"; + product = "a95x-z2_rk3318"; + }; + + baseboard { + manufacturer = "zkmagic"; + product = "a95x-z2_rk3318"; + }; + + chassis { + manufacturer = "zkmagic"; + product = "a95x-z2_rk3318"; + }; + }; + }; +}; + +&gmac2phy { + status = "broken"; +}; + +&gpio0 { + u-boot,dm-spl; +}; + +&pcfg_pull_up_4ma { + u-boot,dm-spl; +}; + +&pinctrl { + u-boot,dm-spl; +}; + +&sdmmc0m1_pin { + u-boot,dm-spl; +}; + +&usb20_otg { + dr_mode = "otg"; +}; + +&vcc_sd { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/rk3318-a95x-z2.dts b/arch/arm/dts/rk3318-a95x-z2.dts new file mode 100644 index 0000000000..d41f786b2f --- /dev/null +++ b/arch/arm/dts/rk3318-a95x-z2.dts @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include <dt-bindings/input/input.h> +#include "rk3328.dtsi" + +/ { + model = "A95X Z2"; + compatible = "zkmagic,a95x-z2", "rockchip,rk3318"; + + aliases { + mmc0 = &sdmmc; + mmc1 = &sdio; + mmc2 = &emmc; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + recovery { + label = "recovery"; + linux,code = <KEY_VENDOR>; + press-threshold-microvolt = <17000>; + }; + }; + + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&ir_int>; + pinctrl-names = "default"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&cyx_led_pin>; + pinctrl-names = "default"; + + cyx_led: led-0 { + default-state = "on"; + gpios = <&gpio2 RK_PC7 GPIO_ACTIVE_LOW>; + label = "CYX_LED"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-0 = <&wifi_enable_h>; + pinctrl-names = "default"; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + + spdif-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; + + /* Power tree */ + vccio_1v8: vccio-1v8-regulator { + compatible = "regulator-fixed"; + regulator-name = "vccio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vccio_3v3: vccio-3v3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vccio_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vcc_otg_vbus: otg-vbus-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&otg_vbus_drv>; + pinctrl-names = "default"; + regulator-name = "vcc_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&sdmmc0m1_pin>; + pinctrl-names = "default"; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vccio_3v3>; + }; + + vdd_arm: vdd-arm { + compatible = "pwm-regulator"; + pwms = <&pwm0 0 5000 1>; + regulator-name = "vdd_arm"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1400000>; + regulator-settling-time-up-us = <250>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm1 0 5000 1>; + regulator-name = "vdd_log"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1300000>; + regulator-settling-time-up-us = <250>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&analog_sound { + status = "okay"; +}; + +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&cpu0_opp_table { + opp-1200000000 { + status = "disabled"; + }; + + opp-1296000000 { + status = "disabled"; + }; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + non-removable; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gmac2phy { + assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; + assigned-clock-rate = <50000000>; + assigned-clocks = <&cru SCLK_MAC2PHY>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_log>; +}; + +&hdmi { + ddc-i2c-scl-high-time-ns = <9625>; + ddc-i2c-scl-low-time-ns = <10000>; + status = "okay"; +}; + +&hdmiphy { + status = "okay"; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2s0 { + status = "okay"; +}; + +&i2s1 { + status = "okay"; +}; + +&io_domains { + pmuio-supply = <&vccio_3v3>; + vccio1-supply = <&vccio_3v3>; + vccio2-supply = <&vccio_1v8>; + vccio3-supply = <&vccio_3v3>; + vccio4-supply = <&vccio_1v8>; + vccio5-supply = <&vccio_3v3>; + vccio6-supply = <&vccio_3v3>; + status = "okay"; +}; + +&pinctrl { + ir { + ir_int: ir-int { + rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + cyx_led_pin: cyx-led-pin { + rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pwm0 { + pwm0_pin_pull_up: pwm0-pin-pull-up { + rockchip,pins = <2 RK_PA4 1 &pcfg_pull_up>; + }; + }; + + pwm1 { + pwm1_pin_pull_up: pwm1-pin-pull-up { + rockchip,pins = <2 RK_PA5 1 &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc1 { + clk_32k_out: clk-32k-out { + rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>; + }; + }; + + usb { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otg_vbus_drv: otg-vbus-drv { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + pinctrl-0 = <&pwm0_pin_pull_up>; + pinctrl-names = "active"; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_pin_pull_up>; + pinctrl-names = "active"; + status = "okay"; +}; + +&saradc { + vref-supply = <&vccio_1v8>; + status = "okay"; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + max-frequency = <125000000>; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &clk_32k_out>; + pinctrl-names = "default"; + sd-uhs-sdr104; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&spdif { + pinctrl-0 = <&spdifm0_tx>; + status = "okay"; +}; + +&soc_crit { + temperature = <115000>; /* millicelsius */ +}; + +&target { + temperature = <105000>; /* millicelsius */ +}; + +&threshold { + temperature = <90000>; /* millicelsius */ +}; + +&tsadc { + rockchip,hw-tshut-temp = <120000>; + status = "okay"; +}; + +&u2phy { + status = "okay"; +}; + +&u2phy_host { + status = "okay"; +}; + +&u2phy_otg { + phy-supply = <&vcc_otg_vbus>; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb20_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbdrd3 { + dr_mode = "host"; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +};