RE: [U-Boot-Users] Probelm with 8266ADS board.
This is of course a problem with the SDRAM.
Check that CONFIG_PBI is set to 0 (set in top of mpc8266ads.c) This stets the controller in Bank Based interleave. I have seen this excact problem when running Page Based access to the standard 16MB devices.
Page Based is supposed to be faster, and is necessary to use more than 128MB per chip select.
-----Original Message----- From: *L/E<a [mailto:houcheng@turbonetworks.com.tw] Sent: Thursday, July 10, 2003 21:56 To: U-Boot Users (E-mail) Subject: [U-Boot-Users] Probelm with 8266ADS board.
Hi All: I am using MPC8266ADS-PCI board, my board seems crash at "relocate_code:" and reboot again and again. So I can see the boot messages repeatly printed on my console. Any good ideas ? Thanks a lot.
>>>>>>>>>>>>>>>>>>>>>>>>>>>>> MESSAGES DRUING BOOTING, REPEATED
U-Boot 0.4.0 (Jul 10 2003 - 17:37:18)
MPC8260 Reset Status: Check Stop, External Soft, External Hard
MPC8260 Clock Configuration
- Bus-to-Core Mult 4x, VCO Div 2, 60x Bus Freq 25-75 , Core
Freq 100-300
- dfbrg 0, corecnf 0x0a, busdf 5, cpmdf 1, plldf 0, pllmf 2
- vco_out 396000000, scc_clk 99000000, brg_clk 99000000
- cpu_clk 264000000, cpm_clk 198000000, bus_clk 66000000
CPU: MPC8260 (Rev 14, Mask A.0(A) 2K25A) at 264 MHz Board: Motorola MPC8266ADS I2C: ready DRAM: SDRAM configuration read from SPD Size per side = 16MB Organization: 1 sides, 2 banks, 9 Columns, 11 Rows, Data width = 64 bits Refresh rate = 33, CAS latency = 3 Total size: 16 MB Top of RAM usable for U-Boot at: 01000000 haha Reserving 190k for U-Boot at: 00fd0000 Reserving 384k for malloc() at: 00f70000 Reserving 76 Bytes for Board Info at: 00f6ffb4 Reserving 68 Bytes for Global Data at: 00f6ff70 Stack Pointer at: 00f6ff58 New Stack Pointer is: 00f6ff58 before memcpy 16187248, -268419200, 68 after memcpy
U-Boot 0.4.0 (Jul 10 2003 - 17:37:18)
MPC8260 Reset Status: Check Stop, External Soft, External Hard
MPC8260 Clock Configuration
- Bus-to-Core Mult 4x, VCO Div 2, 60x Bus Freq 25-75 , Core
Freq 100-300
- dfbrg 0, corecnf 0x0a, busdf 5, cpmdf 1, plldf 0, pllmf 2
- vco_out 396000000, scc_clk 99000000, brg_clk 99000000
- cpu_clk 264000000, cpm_clk 198000000, bus_clk 66000000
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Rune Torgersen